/* BFD back-end for Hitachi Super-H COFF binaries.
- Copyright 1993, 94, 95, 96, 97, 98, 1999, 2000 Free Software Foundation, Inc.
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+ Free Software Foundation, Inc.
Contributed by Cygnus Support.
Written by Steve Chamberlain, <sac@cygnus.com>.
Relaxing code written by Ian Lance Taylor, <ian@cygnus.com>.
#include "bfdlink.h"
#include "coff/sh.h"
#include "coff/internal.h"
+
+#ifdef COFF_WITH_PE
+#include "coff/pe.h"
+
+#ifndef COFF_IMAGE_WITH_PE
+static boolean sh_align_load_span
+ PARAMS ((bfd *, asection *, bfd_byte *,
+ boolean (*) (bfd *, asection *, PTR, bfd_byte *, bfd_vma),
+ PTR, bfd_vma **, bfd_vma *, bfd_vma, bfd_vma, boolean *));
+
+#define _bfd_sh_align_load_span sh_align_load_span
+#endif
+#endif
+
#include "libcoff.h"
/* Internal functions. */
PARAMS ((bfd *, asection *, struct bfd_link_info *, boolean *));
static boolean sh_relax_delete_bytes
PARAMS ((bfd *, asection *, bfd_vma, int));
+#ifndef COFF_IMAGE_WITH_PE
static const struct sh_opcode *sh_insn_info PARAMS ((unsigned int));
+#endif
static boolean sh_align_loads
PARAMS ((bfd *, asection *, struct internal_reloc *, bfd_byte *, boolean *));
static boolean sh_swap_insns
PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *,
bfd_byte *, boolean, asymbol **));
+#ifdef COFF_WITH_PE
+/* Can't build import tables with 2**4 alignment. */
+#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
+#else
/* Default section alignment to 2**4. */
-#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (4)
+#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 4
+#endif
+
+#ifdef COFF_IMAGE_WITH_PE
+/* Align PE executables. */
+#define COFF_PAGE_SIZE 0x1000
+#endif
/* Generate long file names. */
#define COFF_LONG_FILENAMES
+#ifdef COFF_WITH_PE
+/* Return true if this relocation should
+ appear in the output .reloc section. */
+static boolean in_reloc_p (abfd, howto)
+ bfd * abfd ATTRIBUTE_UNUSED;
+ reloc_howto_type * howto;
+{
+ return ! howto->pc_relative && howto->type != R_SH_IMAGEBASE;
+}
+#endif
+
/* The supported relocations. There are a lot of relocations defined
in coff/internal.h which we do not expect to ever see. */
static reloc_howto_type sh_coff_howtos[] =
{
EMPTY_HOWTO (0),
EMPTY_HOWTO (1),
+#ifdef COFF_WITH_PE
+ /* Windows CE */
+ HOWTO (R_SH_IMM32CE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ sh_reloc, /* special_function */
+ "r_imm32ce", /* name */
+ true, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ false), /* pcrel_offset */
+#else
EMPTY_HOWTO (2),
+#endif
EMPTY_HOWTO (3), /* R_SH_PCREL8 */
EMPTY_HOWTO (4), /* R_SH_PCREL16 */
EMPTY_HOWTO (5), /* R_SH_HIGH8 */
false), /* pcrel_offset */
EMPTY_HOWTO (15),
+#ifdef COFF_WITH_PE
+ HOWTO (R_SH_IMAGEBASE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ sh_reloc, /* special_function */
+ "rva32", /* name */
+ true, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ false), /* pcrel_offset */
+#else
EMPTY_HOWTO (16), /* R_SH_IMM8 */
+#endif
EMPTY_HOWTO (17), /* R_SH_IMM8BY2 */
EMPTY_HOWTO (18), /* R_SH_IMM8BY4 */
EMPTY_HOWTO (19), /* R_SH_IMM4 */
/* FIXME: This should not be set here. */
#define __A_MAGIC_SET__
+#ifndef COFF_WITH_PE
/* Swap the r_offset field in and out. */
#define SWAP_IN_RELOC_OFFSET bfd_h_get_32
#define SWAP_OUT_RELOC_OFFSET bfd_h_put_32
dst->r_stuff[1] = 'C'; \
} \
while (0)
+#endif
/* Get the value of a symbol, when performing a relocation. */
static long
-get_symbol_value (symbol)
+get_symbol_value (symbol)
asymbol *symbol;
-{
+{
bfd_vma relocation;
if (bfd_is_com_section (symbol->section))
- relocation = 0;
- else
+ relocation = 0;
+ else
relocation = (symbol->value +
symbol->section->output_section->vma +
symbol->section->output_offset);
return relocation;
}
+#ifdef COFF_WITH_PE
+/* Convert an rtype to howto for the COFF backend linker.
+ Copied from coff-i386. */
+#define coff_rtype_to_howto coff_sh_rtype_to_howto
+
+static reloc_howto_type *
+coff_sh_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
+ bfd * abfd ATTRIBUTE_UNUSED;
+ asection * sec;
+ struct internal_reloc * rel;
+ struct coff_link_hash_entry * h;
+ struct internal_syment * sym;
+ bfd_vma * addendp;
+{
+ reloc_howto_type * howto;
+
+ howto = sh_coff_howtos + rel->r_type;
+
+ *addendp = 0;
+
+ if (howto->pc_relative)
+ *addendp += sec->vma;
+
+ if (sym != NULL && sym->n_scnum == 0 && sym->n_value != 0)
+ {
+ /* This is a common symbol. The section contents include the
+ size (sym->n_value) as an addend. The relocate_section
+ function will be adding in the final value of the symbol. We
+ need to subtract out the current size in order to get the
+ correct result. */
+ BFD_ASSERT (h != NULL);
+ }
+
+ if (howto->pc_relative)
+ {
+ *addendp -= 4;
+
+ /* If the symbol is defined, then the generic code is going to
+ add back the symbol value in order to cancel out an
+ adjustment it made to the addend. However, we set the addend
+ to 0 at the start of this function. We need to adjust here,
+ to avoid the adjustment the generic code will make. FIXME:
+ This is getting a bit hackish. */
+ if (sym != NULL && sym->n_scnum != 0)
+ *addendp -= sym->n_value;
+ }
+
+ if (rel->r_type == R_SH_IMAGEBASE)
+ *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
+
+ return howto;
+}
+
+/* This structure is used to map BFD reloc codes to SH PE relocs. */
+struct shcoff_reloc_map
+{
+ unsigned char bfd_reloc_val;
+ unsigned char shcoff_reloc_val;
+};
+
+/* An array mapping BFD reloc codes to SH PE relocs. */
+static const struct shcoff_reloc_map sh_reloc_map[] =
+{
+ { BFD_RELOC_32, R_SH_IMM32CE },
+ { BFD_RELOC_RVA, R_SH_IMAGEBASE },
+ { BFD_RELOC_CTOR, R_SH_IMM32CE },
+};
+
+/* Given a BFD reloc code, return the howto structure for the
+ corresponding SH PE reloc. */
+#define coff_bfd_reloc_type_lookup sh_coff_reloc_type_lookup
+
+static reloc_howto_type *
+sh_coff_reloc_type_lookup (abfd, code)
+ bfd * abfd ATTRIBUTE_UNUSED;
+ bfd_reloc_code_real_type code;
+{
+ unsigned int i;
+
+ for (i = 0; i < sizeof (sh_reloc_map) / sizeof (struct shcoff_reloc_map); i++)
+ {
+ if (sh_reloc_map[i].bfd_reloc_val == code)
+ return &sh_coff_howtos[(int) sh_reloc_map[i].shcoff_reloc_val];
+ }
+
+ fprintf (stderr, "SH Error: unknown reloc type %d\n", code);
+ return NULL;
+}
+#endif /* COFF_WITH_PE */
+
/* This macro is used in coffcode.h to get the howto corresponding to
an internal reloc. */
/* Almost all relocs have to do with relaxing. If any work must be
done for them, it has been done in sh_relax_section. */
if (r_type != R_SH_IMM32
+#ifdef COFF_WITH_PE
+ && r_type != R_SH_IMM32CE
+ && r_type != R_SH_IMAGEBASE
+#endif
&& (r_type != R_SH_PCDISP
|| (symbol_in->flags & BSF_LOCAL) != 0))
return bfd_reloc_ok;
switch (r_type)
{
case R_SH_IMM32:
+#ifdef COFF_WITH_PE
+ case R_SH_IMM32CE:
+#endif
insn = bfd_get_32 (abfd, hit_data);
insn += sym_value + reloc_entry->addend;
bfd_put_32 (abfd, insn, hit_data);
break;
+#ifdef COFF_WITH_PE
+ case R_SH_IMAGEBASE:
+ insn = bfd_get_32 (abfd, hit_data);
+ insn += (sym_value + reloc_entry->addend
+ - pe_data (input_section->output_section->owner)->pe_opthdr.ImageBase);
+ bfd_put_32 (abfd, insn, hit_data);
+ break;
+#endif
case R_SH_PCDISP:
insn = bfd_get_16 (abfd, hit_data);
sym_value += reloc_entry->addend;
align load and store instructions on four byte boundaries if we
can, by swapping them with one of the adjacent instructions. */
-static boolean
+static boolean
sh_relax_section (abfd, sec, link_info, again)
bfd *abfd;
asection *sec;
paddr += sec->vma;
for (irelfn = internal_relocs; irelfn < irelend; irelfn++)
if (irelfn->r_vaddr == paddr
+#ifdef COFF_WITH_PE
+ && (irelfn->r_type == R_SH_IMM32
+ || irelfn->r_type == R_SH_IMM32CE
+ || irelfn->r_type == R_SH_IMAGEBASE))
+
+#else
&& irelfn->r_type == R_SH_IMM32)
+#endif
break;
if (irelfn >= irelend)
{
break;
case R_SH_IMM32:
+#ifdef COFF_WITH_PE
+ case R_SH_IMM32CE:
+ case R_SH_IMAGEBASE:
+#endif
/* If this reloc is against a symbol defined in this
section, and the symbol will not be adjusted below, we
must check the addend to see it will put the value in
{
struct internal_syment sym;
+#ifdef COFF_WITH_PE
+ if (irelscan->r_type != R_SH_IMM32
+ && irelscan->r_type != R_SH_IMAGEBASE
+ && irelscan->r_type != R_SH_IMM32CE)
+#else
if (irelscan->r_type != R_SH_IMM32)
+#endif
continue;
bfd_coff_swap_sym_in (abfd,
mask value in the sh_major_opcode structure. */
unsigned short opcode;
/* Flags for this instruction. */
- unsigned flags;
+ unsigned long flags;
};
/* Flag which appear in the sh_opcode structure. */
#define SETSAS (0x40000)
#define SETSAS_REG(x) USESAS_REG (x)
+#ifndef COFF_IMAGE_WITH_PE
static boolean sh_insn_uses_reg
PARAMS ((unsigned int, const struct sh_opcode *, unsigned int));
static boolean sh_insn_sets_reg
static boolean sh_load_use
PARAMS ((unsigned int, const struct sh_opcode *, unsigned int,
const struct sh_opcode *));
-
+#endif
/* The opcode maps. */
#define MAP(a) a, sizeof a / sizeof a[0]
{ MAP (sh_dsp_opcodef0), 0xfc0d }
};
+#ifndef COFF_IMAGE_WITH_PE
/* Given an instruction, return a pointer to the corresponding
sh_opcode structure. Return NULL if the instruction is not
recognized. */
return op;
}
- return NULL;
+ return NULL;
}
/* See whether an instruction uses or sets a general purpose register */
return false;
}
+
/* See whether an instruction sets a general purpose register. */
static boolean
of a double precision value.
So what this all boils down to is that we have to ignore the lowest
bit of the register number. */
-
+
if ((f & USESF1) != 0
&& (USESF1_REG (insn) & 0xe) == (freg & 0xe))
return true;
of a double precision value.
So what this all boils down to is that we have to ignore the lowest
bit of the register number. */
-
+
if ((f & SETSF1) != 0
&& (SETSF1_REG (insn) & 0xe) == (freg & 0xe))
return true;
STOP are the range of memory to examine. If a swap is made,
*PSWAPPED is set to true. */
+#ifdef COFF_WITH_PE
+static
+#endif
boolean
_bfd_sh_align_load_span (abfd, sec, contents, swap, relocs,
plabel, label_end, start, stop, pswapped)
if (dsp && i - 2 > start)
{
unsigned pprev_insn = bfd_get_16 (abfd, contents + i - 4);
-
+
if ((pprev_insn & 0xfc00) == 0xf800)
prev_op = NULL;
else
return true;
}
+#endif /* not COFF_IMAGE_WITH_PE */
/* Look for loads and stores which we can align to four byte
boundaries. See the longer comment above sh_relax_section for why
/* Almost all relocs have to do with relaxing. If any work must
be done for them, it has been done in sh_relax_section. */
if (rel->r_type != R_SH_IMM32
+#ifdef COFF_WITH_PE
+ && rel->r_type != R_SH_IMM32CE
+ && rel->r_type != R_SH_IMAGEBASE
+#endif
&& rel->r_type != R_SH_PCDISP)
continue;
sym = NULL;
}
else
- {
+ {
if (symndx < 0
|| (unsigned long) symndx >= obj_raw_syment_count (input_bfd))
{
return false;
}
+#ifdef COFF_WITH_PE
+ if (rel->r_type == R_SH_IMAGEBASE)
+ addend -= pe_data (input_section->output_section->owner)->pe_opthdr.ImageBase;
+#endif
+
val = 0;
if (h == NULL)
{
if (! ((*info->callbacks->undefined_symbol)
(info, h->root.root.string, input_bfd, input_section,
- rel->r_vaddr - input_section->vma)))
+ rel->r_vaddr - input_section->vma, true)))
return false;
}
}
/* The target vectors. */
+#ifndef TARGET_SHL_SYM
CREATE_BIG_COFF_TARGET_VEC (shcoff_vec, "coff-sh", BFD_IS_RELAXABLE, 0, '_', NULL)
+#endif
#ifdef TARGET_SHL_SYM
#define TARGET_SYM TARGET_SHL_SYM
#else
#define TARGET_SYM shlcoff_vec
#endif
-
+
#ifndef TARGET_SHL_NAME
#define TARGET_SHL_NAME "coff-shl"
#endif
-CREATE_LITTLE_COFF_TARGET_VEC (TARGET_SYM, TARGET_SHL_NAME, BFD_IS_RELAXABLE, 0, '_', NULL)
-
+#ifdef COFF_WITH_PE
+CREATE_LITTLE_COFF_TARGET_VEC (TARGET_SYM, TARGET_SHL_NAME, BFD_IS_RELAXABLE,
+ SEC_CODE | SEC_DATA, '_', NULL);
+#else
+CREATE_LITTLE_COFF_TARGET_VEC (TARGET_SYM, TARGET_SHL_NAME, BFD_IS_RELAXABLE,
+ 0, '_', NULL)
+#endif
+#ifndef TARGET_SHL_SYM
/* Some people want versions of the SH COFF target which do not align
to 16 byte boundaries. We implement that by adding a couple of new
target vectors. These are just like the ones above, but they
false,
#endif
2,
+#ifdef COFF_FORCE_SYMBOLS_IN_STRINGS
+ true,
+#else
+ false,
+#endif
+#ifdef COFF_DEBUG_STRING_WIDE_PREFIX
+ 4,
+#else
+ 2,
+#endif
coff_swap_filehdr_in, coff_swap_aouthdr_in, coff_swap_scnhdr_in,
coff_swap_reloc_in, coff_bad_format_hook, coff_set_arch_mach_hook,
coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
& shlcoff_small_vec,
-
+
(PTR) &bfd_coff_small_swap_table
};
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
{_bfd_dummy_target, coff_small_object_p, /* bfd_check_format */
- bfd_generic_archive_p, _bfd_dummy_target},
+ bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
& shcoff_small_vec,
-
+
(PTR) &bfd_coff_small_swap_table
};
+#endif
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