DEFAULT, \
mips_compatible, \
bfd_default_scan, \
+ bfd_arch_default_fill, \
NEXT, \
}
I_sb1,
I_loongson_2e,
I_loongson_2f,
+ I_loongson_3a,
I_mipsocteon,
- I_xlr
+ I_mipsocteonp,
+ I_mipsocteon2,
+ I_xlr,
+ I_micromips
};
#define NN(index) (&arch_info_struct[(index) + 1])
N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, NN(I_sb1)),
N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, NN(I_loongson_2f)),
+ N (64, 64, bfd_mach_mips_loongson_3a, "mips:loongson_3a", FALSE, NN(I_loongson_3a)),
N (64, 64, bfd_mach_mips_octeon,"mips:octeon", FALSE, NN(I_mipsocteon)),
- N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr))
+ N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
+ N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
+ N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
+ N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0)
};
/* The default architecture is mips:3000, but with a machine number of