enum elf32_arm_stub_type {
arm_stub_none,
DEF_STUBS
+ /* Note the first a8_veneer type */
+ arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
};
#undef DEF_STUB
typedef struct
{
- const insn_sequence* template;
+ const insn_sequence* template_sequence;
int template_size;
} stub_def;
eh->stub_offset = 0;
eh->target_value = 0;
eh->target_section = NULL;
+ eh->target_addend = 0;
+ eh->orig_insn = 0;
eh->stub_type = arm_stub_none;
eh->stub_size = 0;
eh->stub_template = NULL;
eh->stub_template_size = 0;
eh->h = NULL;
eh->id_sec = NULL;
+ eh->output_name = NULL;
}
return entry;
return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
}
+/* Determine what kind of NOPs are available. */
+
+static bfd_boolean
+arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
+{
+ const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
+ Tag_CPU_arch);
+ return arch == TAG_CPU_ARCH_V6T2
+ || arch == TAG_CPU_ARCH_V6K
+ || arch == TAG_CPU_ARCH_V7;
+}
+
+static bfd_boolean
+arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
+{
+ const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
+ Tag_CPU_arch);
+ return arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7;
+}
+
static bfd_boolean
arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
{
bfd_vma sym_value;
int template_size;
int size;
- const insn_sequence *template;
+ const insn_sequence *template_sequence;
int i;
struct elf32_arm_link_hash_table * globals;
int stub_reloc_idx[MAXRELOCS] = {-1, -1};
htab = elf32_arm_hash_table (info);
stub_sec = stub_entry->stub_sec;
+ if ((htab->fix_cortex_a8 < 0)
+ != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
+ /* We have to do the a8 fixes last, as they are less aligned than
+ the other veneers. */
+ return TRUE;
+
/* Make a note of the offset within the stubs for this entry. */
stub_entry->stub_offset = stub_sec->size;
loc = stub_sec->contents + stub_entry->stub_offset;
+ stub_entry->target_section->output_offset
+ stub_entry->target_section->output_section->vma);
- template = stub_entry->stub_template;
+ template_sequence = stub_entry->stub_template;
template_size = stub_entry->stub_template_size;
size = 0;
for (i = 0; i < template_size; i++)
{
- switch (template[i].type)
+ switch (template_sequence[i].type)
{
case THUMB16_TYPE:
{
- bfd_vma data = template[i].data;
- if (template[i].reloc_addend != 0)
+ bfd_vma data = (bfd_vma) template_sequence[i].data;
+ if (template_sequence[i].reloc_addend != 0)
{
/* We've borrowed the reloc_addend field to mean we should
insert a condition code into this (Thumb-1 branch)
break;
case THUMB32_TYPE:
- put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
+ put_thumb_insn (globals, stub_bfd,
+ (template_sequence[i].data >> 16) & 0xffff,
loc + size);
- put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
+ put_thumb_insn (globals, stub_bfd, template_sequence[i].data & 0xffff,
loc + size + 2);
- if (template[i].r_type != R_ARM_NONE)
+ if (template_sequence[i].r_type != R_ARM_NONE)
{
stub_reloc_idx[nrelocs] = i;
stub_reloc_offset[nrelocs++] = size;
break;
case ARM_TYPE:
- put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
+ put_arm_insn (globals, stub_bfd, template_sequence[i].data,
+ loc + size);
/* Handle cases where the target is encoded within the
instruction. */
- if (template[i].r_type == R_ARM_JUMP24)
+ if (template_sequence[i].r_type == R_ARM_JUMP24)
{
stub_reloc_idx[nrelocs] = i;
stub_reloc_offset[nrelocs++] = size;
break;
case DATA_TYPE:
- bfd_put_32 (stub_bfd, template[i].data, loc + size);
+ bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
stub_reloc_idx[nrelocs] = i;
stub_reloc_offset[nrelocs++] = size;
size += 4;
BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
for (i = 0; i < nrelocs; i++)
- if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
- || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
- || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
- || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
+ if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
+ || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
+ || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
+ || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
{
Elf_Internal_Rela rel;
bfd_boolean unresolved_reloc;
char *error_message;
int sym_flags
- = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
+ = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
? STT_ARM_TFUNC : 0;
bfd_vma points_to = sym_value + stub_entry->target_addend;
rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
- rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
- rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
+ rel.r_info = ELF32_R_INFO (0,
+ template_sequence[stub_reloc_idx[i]].r_type);
+ rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
/* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
branch. */
points_to = sym_value;
+ /* There may be unintended consequences if this is not true. */
+ BFD_ASSERT (stub_entry->h == NULL);
+
/* Note: _bfd_final_link_relocate doesn't handle these relocations
properly. We should probably use this function unconditionally,
rather than only for certain relocations listed in the enclosing
conditional, for the sake of consistency. */
elf32_arm_final_link_relocate (elf32_arm_howto_from_type
- (template[stub_reloc_idx[i]].r_type),
+ (template_sequence[stub_reloc_idx[i]].r_type),
stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
points_to, info, stub_entry->target_section, "", sym_flags,
- (struct elf_link_hash_entry *) stub_entry, &unresolved_reloc,
+ (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
&error_message);
}
else
{
_bfd_final_link_relocate (elf32_arm_howto_from_type
- (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
+ (template_sequence[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
sym_value + stub_entry->target_addend,
- template[stub_reloc_idx[i]].reloc_addend);
+ template_sequence[stub_reloc_idx[i]].reloc_addend);
}
return TRUE;
const insn_sequence **stub_template,
int *stub_template_size)
{
- const insn_sequence *template = NULL;
+ const insn_sequence *template_sequence = NULL;
int template_size = 0, i;
unsigned int size;
- template = stub_definitions[stub_type].template;
+ template_sequence = stub_definitions[stub_type].template_sequence;
template_size = stub_definitions[stub_type].template_size;
size = 0;
for (i = 0; i < template_size; i++)
{
- switch (template[i].type)
+ switch (template_sequence[i].type)
{
case THUMB16_TYPE:
size += 2;
}
if (stub_template)
- *stub_template = template;
+ *stub_template = template_sequence;
if (stub_template_size)
*stub_template_size = template_size;
{
struct elf32_arm_stub_hash_entry *stub_entry;
struct elf32_arm_link_hash_table *htab;
- const insn_sequence *template;
+ const insn_sequence *template_sequence;
int template_size, size;
/* Massage our args to the form they really have. */
BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
&& stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
- size = find_stub_size_and_template (stub_entry->stub_type, &template,
+ size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
&template_size);
stub_entry->stub_size = size;
- stub_entry->stub_template = template;
+ stub_entry->stub_template = template_sequence;
stub_entry->stub_template_size = template_size;
size = (size + 7) & ~7;
unsigned int *num_a8_fixes_p,
unsigned int *a8_fix_table_size_p,
struct a8_erratum_reloc *a8_relocs,
- unsigned int num_a8_relocs)
+ unsigned int num_a8_relocs,
+ unsigned prev_num_a8_fixes,
+ bfd_boolean *stub_changed_p)
{
asection *section;
struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
{
- char *stub_name;
+ char *stub_name = NULL;
if (num_a8_fixes == a8_fix_table_size)
{
* a8_fix_table_size);
}
- stub_name = bfd_malloc (8 + 1 + 8 + 1);
- if (stub_name != NULL)
- sprintf (stub_name, "%x:%x", section->id, i);
+ if (num_a8_fixes < prev_num_a8_fixes)
+ {
+ /* If we're doing a subsequent scan,
+ check if we've found the same fix as
+ before, and try and reuse the stub
+ name. */
+ stub_name = a8_fixes[num_a8_fixes].stub_name;
+ if ((a8_fixes[num_a8_fixes].section != section)
+ || (a8_fixes[num_a8_fixes].offset != i))
+ {
+ free (stub_name);
+ stub_name = NULL;
+ *stub_changed_p = TRUE;
+ }
+ }
+
+ if (!stub_name)
+ {
+ stub_name = bfd_malloc (8 + 1 + 8 + 1);
+ if (stub_name != NULL)
+ sprintf (stub_name, "%x:%x", section->id, i);
+ }
a8_fixes[num_a8_fixes].input_bfd = input_bfd;
a8_fixes[num_a8_fixes].section = section;
{
bfd_size_type stub_group_size;
bfd_boolean stubs_always_after_branch;
- bfd_boolean stub_changed = 0;
struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
struct a8_erratum_fix *a8_fixes = NULL;
- unsigned int num_a8_fixes = 0, prev_num_a8_fixes = 0, a8_fix_table_size = 10;
+ unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
struct a8_erratum_reloc *a8_relocs = NULL;
unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
group_sections (htab, stub_group_size, stubs_always_after_branch);
+ /* If we're applying the cortex A8 fix, we need to determine the
+ program header size now, because we cannot change it later --
+ that could alter section placements. Notice the A8 erratum fix
+ ends up requiring the section addresses to remain unchanged
+ modulo the page size. That's something we cannot represent
+ inside BFD, and we don't want to force the section alignment to
+ be the page size. */
+ if (htab->fix_cortex_a8)
+ (*htab->layout_sections_again) ();
+
while (1)
{
bfd *input_bfd;
unsigned int bfd_indx;
asection *stub_sec;
+ bfd_boolean stub_changed = FALSE;
+ unsigned prev_num_a8_fixes = num_a8_fixes;
num_a8_fixes = 0;
-
for (input_bfd = info->input_bfds, bfd_indx = 0;
input_bfd != NULL;
input_bfd = input_bfd->link_next, bfd_indx++)
sym = local_syms + r_indx;
hdr = elf_elfsections (input_bfd)[sym->st_shndx];
sym_sec = hdr->bfd_section;
+ if (!sym_sec)
+ /* This is an undefined symbol. It can never
+ be resolved. */
+ continue;
+
if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
sym_value = sym->st_value;
destination = (sym_value + irela->r_addend
{
sym_sec = hash->root.root.u.def.section;
sym_value = hash->root.root.u.def.value;
- if (sym_sec->output_section != NULL)
+
+ struct elf32_arm_link_hash_table *globals =
+ elf32_arm_hash_table (info);
+
+ /* For a destination in a shared library,
+ use the PLT stub as target address to
+ decide whether a branch stub is
+ needed. */
+ if (globals->splt != NULL && hash != NULL
+ && hash->root.plt.offset != (bfd_vma) -1)
+ {
+ sym_sec = globals->splt;
+ sym_value = hash->root.plt.offset;
+ if (sym_sec->output_section != NULL)
+ destination = (sym_value
+ + sym_sec->output_offset
+ + sym_sec->output_section->vma);
+ }
+ else if (sym_sec->output_section != NULL)
destination = (sym_value + irela->r_addend
+ sym_sec->output_offset
+ sym_sec->output_section->vma);
{
/* The proper stub has already been created. */
free (stub_name);
+ stub_entry->target_value = sym_value;
break;
}
if (htab->fix_cortex_a8)
{
/* Sort relocs which might apply to Cortex-A8 erratum. */
- qsort (a8_relocs, num_a8_relocs, sizeof (struct a8_erratum_reloc),
+ qsort (a8_relocs, num_a8_relocs,
+ sizeof (struct a8_erratum_reloc),
&a8_reloc_compare);
/* Scan for branches which might trigger Cortex-A8 erratum. */
if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
&num_a8_fixes, &a8_fix_table_size,
- a8_relocs, num_a8_relocs) != 0)
+ a8_relocs, num_a8_relocs,
+ prev_num_a8_fixes, &stub_changed)
+ != 0)
goto error_ret_free_local;
}
}
- if (htab->fix_cortex_a8 && num_a8_fixes != prev_num_a8_fixes)
+ if (prev_num_a8_fixes != num_a8_fixes)
stub_changed = TRUE;
if (!stub_changed)
/* Ask the linker to do its stuff. */
(*htab->layout_sections_again) ();
- stub_changed = FALSE;
- prev_num_a8_fixes = num_a8_fixes;
}
/* Add stubs for Cortex-A8 erratum fixes now. */
unsigned int section_id = a8_fixes[i].section->id;
asection *link_sec = htab->stub_group[section_id].link_sec;
asection *stub_sec = htab->stub_group[section_id].stub_sec;
- const insn_sequence *template;
+ const insn_sequence *template_sequence;
int template_size, size = 0;
stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
stub_entry->orig_insn = a8_fixes[i].orig_insn;
stub_entry->st_type = STT_ARM_TFUNC;
- size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
+ size = find_stub_size_and_template (a8_fixes[i].stub_type,
+ &template_sequence,
&template_size);
stub_entry->stub_size = size;
- stub_entry->stub_template = template;
+ stub_entry->stub_template = template_sequence;
stub_entry->stub_template_size = template_size;
}
/* Build the stubs as directed by the stub hash table. */
table = &htab->stub_hash_table;
bfd_hash_traverse (table, arm_build_one_stub, info);
+ if (htab->fix_cortex_a8)
+ {
+ /* Place the cortex a8 stubs last. */
+ htab->fix_cortex_a8 = -1;
+ bfd_hash_traverse (table, arm_build_one_stub, info);
+ }
return TRUE;
}
case R_ARM_PC24: /* Arm B/BL instruction. */
case R_ARM_PLT32:
{
- bfd_vma from;
bfd_signed_vma branch_offset;
struct elf32_arm_stub_hash_entry *stub_entry = NULL;
|| r_type == R_ARM_JUMP24
|| r_type == R_ARM_PLT32)
{
+ bfd_vma from;
+
/* If the call goes through a PLT entry, make sure to
check distance to the right destination address. */
if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
+ splt->output_offset
+ h->plt.offset);
*unresolved_reloc_p = FALSE;
+ /* The PLT entry is in ARM mode, regardless of the
+ target function. */
+ sym_flags = STT_FUNC;
}
from = (input_section->output_section->vma
signed_addend >>= howto->rightshift;
/* A branch to an undefined weak symbol is turned into a jump to
- the next instruction unless a PLT entry will be created. */
- if (h && h->root.type == bfd_link_hash_undefweak
- && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
+ the next instruction unless a PLT entry will be created.
+ Do the same for local undefined symbols.
+ The jump to the next instruction is optimized as a NOP depending
+ on the architecture. */
+ if (h ? (h->root.type == bfd_link_hash_undefweak
+ && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
+ : bfd_is_und_section (sym_sec))
{
- value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
- | 0x0affffff;
+ value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
+
+ if (arch_has_arm_nop (globals))
+ value |= 0x0320f000;
+ else
+ value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
}
else
{
return bfd_reloc_ok;
}
+ case R_ARM_THM_PC8:
+ /* PR 10073: This reloc is not generated by the GNU toolchain,
+ but it is supported for compatibility with third party libraries
+ generated by other compilers, specifically the ARM/IAR. */
+ {
+ bfd_vma insn;
+ bfd_signed_vma relocation;
+
+ insn = bfd_get_16 (input_bfd, hit_data);
+
+ if (globals->use_rel)
+ addend = (insn & 0x00ff) << 2;
+
+ relocation = value + addend;
+ relocation -= (input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_offset);
+
+ value = abs (relocation);
+
+ /* We do not check for overflow of this reloc. Although strictly
+ speaking this is incorrect, it appears to be necessary in order
+ to work with IAR generated relocs. Since GCC and GAS do not
+ generate R_ARM_THM_PC8 relocs, the lack of a check should not be
+ a problem for them. */
+ value &= 0x3fc;
+
+ insn = (insn & 0xff00) | (value >> 2);
+
+ bfd_put_16 (input_bfd, insn, hit_data);
+
+ return bfd_reloc_ok;
+ }
+
case R_ARM_THM_PC12:
/* Corresponds to: ldr.w reg, [pc, #offset]. */
{
bfd_vma check;
bfd_signed_vma signed_check;
int bitsize;
- int thumb2 = using_thumb2 (globals);
+ const int thumb2 = using_thumb2 (globals);
/* A branch to an undefined weak symbol is turned into a jump to
- the next instruction unless a PLT entry will be created. */
+ the next instruction unless a PLT entry will be created.
+ The jump to the next instruction is optimized as a NOP.W for
+ Thumb-2 enabled architectures. */
if (h && h->root.type == bfd_link_hash_undefweak
&& !(splt != NULL && h->plt.offset != (bfd_vma) -1))
{
- bfd_put_16 (input_bfd, 0xe000, hit_data);
- bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
+ if (arch_has_thumb2_nop (globals))
+ {
+ bfd_put_16 (input_bfd, 0xf3af, hit_data);
+ bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
+ }
+ else
+ {
+ bfd_put_16 (input_bfd, 0xe000, hit_data);
+ bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
+ }
return bfd_reloc_ok;
}
/* If the Thumb BLX instruction is available, convert the
BL to a BLX instruction to call the ARM-mode PLT entry. */
lower_insn = (lower_insn & ~0x1000) | 0x0800;
+ sym_flags = STT_FUNC;
}
else
- /* Target the Thumb stub before the ARM PLT entry. */
- value -= PLT_THUMB_STUB_SIZE;
+ {
+ /* Target the Thumb stub before the ARM PLT entry. */
+ value -= PLT_THUMB_STUB_SIZE;
+ sym_flags = STT_ARM_TFUNC;
+ }
*unresolved_reloc_p = FALSE;
}
sym = local_syms + r_symndx;
sym_type = ELF32_ST_TYPE (sym->st_info);
sec = local_sections[r_symndx];
+
+ /* An object file might have a reference to a local
+ undefined symbol. This is a daft object file, but we
+ should at least do something about it. V4BX & NONE
+ relocations do not use the symbol and are explicitly
+ allowed to use the undefined symbol, so allow those. */
+ if (r_type != R_ARM_V4BX
+ && r_type != R_ARM_NONE
+ && bfd_is_und_section (sec)
+ && ELF_ST_BIND (sym->st_info) != STB_WEAK)
+ {
+ if (!info->callbacks->undefined_symbol
+ (info, bfd_elf_string_from_elf_section
+ (input_bfd, symtab_hdr->sh_link, sym->st_name),
+ input_bfd, input_section,
+ rel->r_offset, TRUE))
+ return FALSE;
+ }
+
if (globals->use_rel)
{
relocation = (sec->output_section->vma
bfd_vma addr;
char *stub_name;
output_arch_syminfo *osi;
- const insn_sequence *template;
+ const insn_sequence *template_sequence;
enum stub_insn_type prev_type;
int size;
int i;
addr = (bfd_vma) stub_entry->stub_offset;
stub_name = stub_entry->output_name;
- template = stub_entry->stub_template;
- switch (template[0].type)
+ template_sequence = stub_entry->stub_template;
+ switch (template_sequence[0].type)
{
case ARM_TYPE:
if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
size = 0;
for (i = 0; i < stub_entry->stub_template_size; i++)
{
- switch (template[i].type)
+ switch (template_sequence[i].type)
{
case ARM_TYPE:
sym_type = ARM_MAP_ARM;
return FALSE;
}
- if (template[i].type != prev_type)
+ if (template_sequence[i].type != prev_type)
{
- prev_type = template[i].type;
+ prev_type = template_sequence[i].type;
if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
return FALSE;
}
- switch (template[i].type)
+ switch (template_sequence[i].type)
{
case ARM_TYPE:
case THUMB32_TYPE: