Automatic date update in version.in
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
index 384063e5c1ea52ee2a662611f35b53ddd81f4f15..434649f1ca18841320345e7fdf437c4ad47a1428 100644 (file)
@@ -1,5 +1,5 @@
 /* 32-bit ELF support for ARM
-   Copyright (C) 1998-2016 Free Software Foundation, Inc.
+   Copyright (C) 1998-2017 Free Software Foundation, Inc.
 
    This file is part of BFD, the Binary File Descriptor library.
 
@@ -4024,10 +4024,12 @@ arm_type_of_stub (struct bfd_link_info *info,
              if (!thumb_only)
                {
                  if (input_sec->flags & SEC_ELF_PURECODE)
-                   _bfd_error_handler (_("\
-%B(%A): warning: long branch  veneers used in section with SHF_ARM_PURECODE section \
-attribute is only supported for M-profile targets that implement the movw instruction."),
-                                       input_sec);
+                   _bfd_error_handler
+                     (_("%B(%A): warning: long branch veneers used in"
+                        " section with SHF_ARM_PURECODE section"
+                        " attribute is only supported for M-profile"
+                        " targets that implement the movw instruction."),
+                      input_bfd, input_sec);
 
                  stub_type = (bfd_link_pic (info) | globals->pic_veneer)
                    /* PIC stubs.  */
@@ -4056,10 +4058,12 @@ attribute is only supported for M-profile targets that implement the movw instru
                  else
                    {
                      if (input_sec->flags & SEC_ELF_PURECODE)
-                       _bfd_error_handler (_("\
-%B(%A): warning: long branch  veneers used in section with SHF_ARM_PURECODE section \
-attribute is only supported for M-profile targets that implement the movw instruction."),
-                                           input_sec);
+                       _bfd_error_handler
+                         (_("%B(%A): warning: long branch veneers used in"
+                            " section with SHF_ARM_PURECODE section"
+                            " attribute is only supported for M-profile"
+                            " targets that implement the movw instruction."),
+                          input_bfd, input_sec);
 
                      stub_type = (bfd_link_pic (info) | globals->pic_veneer)
                        /* PIC stub.  */
@@ -4073,13 +4077,12 @@ attribute is only supported for M-profile targets that implement the movw instru
          else
            {
              if (input_sec->flags & SEC_ELF_PURECODE)
-               _bfd_error_handler (_("%B(%s): warning: long branch "
-                                     " veneers used in section with "
-                                     "SHF_ARM_PURECODE section "
-                                     "attribute is only supported"
-                                     " for M-profile targets that "
-                                     "implement the movw "
-                                     "instruction."));
+               _bfd_error_handler
+                 (_("%B(%A): warning: long branch veneers used in"
+                    " section with SHF_ARM_PURECODE section"
+                    " attribute is only supported" " for M-profile"
+                    " targets that implement the movw instruction."),
+                  input_bfd, input_sec);
 
              /* Thumb to arm.  */
              if (sym_sec != NULL
@@ -4089,7 +4092,7 @@ attribute is only supported for M-profile targets that implement the movw instru
                  _bfd_error_handler
                    (_("%B(%s): warning: interworking not enabled.\n"
                       "  first occurrence: %B: Thumb call to ARM"),
-                    sym_sec->owner, input_bfd, name);
+                    sym_sec->owner, name, input_bfd);
                }
 
              stub_type =
@@ -4126,13 +4129,12 @@ attribute is only supported for M-profile targets that implement the movw instru
           || r_type == R_ARM_TLS_CALL)
     {
       if (input_sec->flags & SEC_ELF_PURECODE)
-       _bfd_error_handler (_("%B(%s): warning: long branch "
-                             " veneers used in section with "
-                             "SHF_ARM_PURECODE section "
-                             "attribute is only supported"
-                             " for M-profile targets that "
-                             "implement the movw "
-                             "instruction."));
+       _bfd_error_handler
+         (_("%B(%A): warning: long branch veneers used in"
+            " section with SHF_ARM_PURECODE section"
+            " attribute is only supported for M-profile"
+            " targets that implement the movw instruction."),
+          input_bfd, input_sec);
       if (branch_type == ST_BRANCH_TO_THUMB)
        {
          /* Arm to thumb.  */
@@ -4491,7 +4493,7 @@ elf32_arm_add_stub (const char *stub_name, asection *section,
     {
       if (section == NULL)
        section = stub_sec;
-      _bfd_error_handler (_("%s: cannot create stub entry %s"),
+      _bfd_error_handler (_("%B: cannot create stub entry %s"),
                          section->owner, stub_name);
       return NULL;
     }
@@ -6628,7 +6630,7 @@ elf32_arm_size_stubs (bfd *output_bfd,
                                             TRUE, FALSE);
          if (stub_entry == NULL)
            {
-             _bfd_error_handler (_("%s: cannot create stub entry %s"),
+             _bfd_error_handler (_("%B: cannot create stub entry %s"),
                                  section->owner, stub_name);
              return FALSE;
            }
@@ -8618,11 +8620,12 @@ bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
                        if (is_not_last_in_it_block)
                          {
                            _bfd_error_handler
-                             /* Note - overlong line used here to allow for translation.  */
                              /* xgettext:c-format */
-                             (_("\
-%B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
-                                "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
+                             (_("%B(%A+0x%lx): error: multiple load detected"
+                                " in non-last IT block instruction :"
+                                " STM32L4XX veneer cannot be generated.\n"
+                                "Use gcc option -mrestrict-it to generate"
+                                " only one instruction per IT block.\n"),
                               abfd, sec, (long) i);
                          }
                        else
@@ -8808,7 +8811,7 @@ elf32_thumb_to_arm_stub (struct bfd_link_info * info,
          _bfd_error_handler
            (_("%B(%s): warning: interworking not enabled.\n"
               "  first occurrence: %B: Thumb call to ARM"),
-            sym_sec->owner, input_bfd, name);
+            sym_sec->owner, name, input_bfd);
 
          return FALSE;
        }
@@ -8898,7 +8901,7 @@ elf32_arm_create_thumb_stub (struct bfd_link_info * info,
          _bfd_error_handler
            (_("%B(%s): warning: interworking not enabled.\n"
               "  first occurrence: %B: arm call to thumb"),
-            sym_sec->owner, input_bfd, name);
+            sym_sec->owner, name, input_bfd);
        }
 
       --my_offset;
@@ -16021,8 +16024,7 @@ elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
       if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
          || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
          || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
-       _bfd_error_handler (_("Errors encountered processing file %s"),
-                           ibfd->filename);
+       _bfd_error_handler (_("Errors encountered processing file %B"), ibfd);
     }
 
   /* Allocate space for the glue sections now that we've sized them.  */
@@ -16311,7 +16313,7 @@ elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
                      + h->root.u.def.section->output_section->vma
                      + h->root.u.def.section->output_offset);
       rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
-      if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
+      if (h->root.u.def.section == htab->root.sdynrelro)
        s = htab->root.sreldynrelro;
       else
        s = htab->root.srelbss;
@@ -19695,9 +19697,8 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
     {
       _bfd_error_handler
        (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
-        ibfd, obfd,
-        (in_flags & EF_ARM_EABIMASK) >> 24,
-        (out_flags & EF_ARM_EABIMASK) >> 24);
+        ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
+        obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
       return FALSE;
     }
 
@@ -19711,9 +19712,8 @@ elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
        {
          _bfd_error_handler
            (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
-            ibfd, obfd,
-            in_flags & EF_ARM_APCS_26 ? 26 : 32,
-            out_flags & EF_ARM_APCS_26 ? 26 : 32);
+            ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
+            obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
          flags_compatible = FALSE;
        }
 
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