/* 32-bit ELF support for ARM
- Copyright (C) 1998-2016 Free Software Foundation, Inc.
+ Copyright (C) 1998-2017 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
/* How many R_ARM_TLS_DESC relocations were generated so far. */
bfd_vma num_tls_desc;
- /* Short-cuts to get to dynamic linker sections. */
- asection *sdynbss;
- asection *srelbss;
-
/* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
asection *srelplt2;
}
static inline int
-popcount (unsigned int mask)
+elf32_arm_popcount (unsigned int mask)
{
#if GCC_VERSION >= 3004
return __builtin_popcount (mask);
#else
- unsigned int i, sum = 0;
+ unsigned int i;
+ int sum = 0;
for (i = 0; i < 8 * sizeof (mask); i++)
{
arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
if (arch == TAG_CPU_ARCH_V6_M
|| arch == TAG_CPU_ARCH_V6S_M
arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
return (arch == TAG_CPU_ARCH_V6T2
|| arch == TAG_CPU_ARCH_V7
|| arch == TAG_CPU_ARCH_V7E_M
|| arch == TAG_CPU_ARCH_V8
+ || arch == TAG_CPU_ARCH_V8R
|| arch == TAG_CPU_ARCH_V8M_MAIN);
}
bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
/* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
return (arch == TAG_CPU_ARCH_V6T2
if (!_bfd_elf_create_dynamic_sections (dynobj, info))
return FALSE;
- htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
- if (!bfd_link_pic (info))
- htab->srelbss = bfd_get_linker_section (dynobj,
- RELOC_SECTION (htab, ".bss"));
-
if (htab->vxworks_p)
{
if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
if (!htab->root.splt
|| !htab->root.srelplt
- || !htab->sdynbss
- || (!bfd_link_pic (info) && !htab->srelbss))
+ || !htab->root.sdynbss
+ || (!bfd_link_pic (info) && !htab->root.srelbss))
abort ();
return TRUE;
Tag_CPU_arch);
/* Force return logic to be reviewed for each new architecture. */
- BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
- || arch == TAG_CPU_ARCH_V8M_BASE
- || arch == TAG_CPU_ARCH_V8M_MAIN);
+ BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
return (arch == TAG_CPU_ARCH_V6T2
|| arch == TAG_CPU_ARCH_V6K
|| arch == TAG_CPU_ARCH_V7
- || arch == TAG_CPU_ARCH_V8);
+ || arch == TAG_CPU_ARCH_V8
+ || arch == TAG_CPU_ARCH_V8R);
}
static bfd_boolean
- it's a Thumb->Arm call and blx is not available, or it's a
Thumb->Arm branch (not bl). A stub is needed in this case,
but only if this call is not through a PLT entry. Indeed,
- PLT stubs handle mode switching already.
- */
+ PLT stubs handle mode switching already. */
if ((!thumb2_bl
&& (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
|| (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
PLT, use one that branches directly to the ARM PLT
stub. If we pretended we'd use the pre-PLT Thumb->ARM
stub, undo this now. */
- if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) {
- branch_type = ST_BRANCH_TO_ARM;
- branch_offset += PLT_THUMB_STUB_SIZE;
- }
+ if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
+ {
+ branch_type = ST_BRANCH_TO_ARM;
+ branch_offset += PLT_THUMB_STUB_SIZE;
+ }
if (branch_type == ST_BRANCH_TO_THUMB)
{
if (!thumb_only)
{
if (input_sec->flags & SEC_ELF_PURECODE)
- (*_bfd_error_handler) (_("%B(%s): warning: long branch "
- " veneers used in section with "
- "SHF_ARM_PURECODE section "
- "attribute is only supported"
- " for M-profile targets that "
- "implement the movw "
- "instruction."));
+ _bfd_error_handler
+ (_("%B(%A): warning: long branch veneers used in"
+ " section with SHF_ARM_PURECODE section"
+ " attribute is only supported for M-profile"
+ " targets that implement the movw instruction."),
+ input_bfd, input_sec);
stub_type = (bfd_link_pic (info) | globals->pic_veneer)
/* PIC stubs. */
else
{
if (input_sec->flags & SEC_ELF_PURECODE)
- (*_bfd_error_handler) (_("%B(%s): warning: long branch "
- " veneers used in section with "
- "SHF_ARM_PURECODE section "
- "attribute is only supported"
- " for M-profile targets that "
- "implement the movw "
- "instruction."));
+ _bfd_error_handler
+ (_("%B(%A): warning: long branch veneers used in"
+ " section with SHF_ARM_PURECODE section"
+ " attribute is only supported for M-profile"
+ " targets that implement the movw instruction."),
+ input_bfd, input_sec);
stub_type = (bfd_link_pic (info) | globals->pic_veneer)
/* PIC stub. */
else
{
if (input_sec->flags & SEC_ELF_PURECODE)
- (*_bfd_error_handler) (_("%B(%s): warning: long branch "
- " veneers used in section with "
- "SHF_ARM_PURECODE section "
- "attribute is only supported"
- " for M-profile targets that "
- "implement the movw "
- "instruction."));
+ _bfd_error_handler
+ (_("%B(%A): warning: long branch veneers used in"
+ " section with SHF_ARM_PURECODE section"
+ " attribute is only supported" " for M-profile"
+ " targets that implement the movw instruction."),
+ input_bfd, input_sec);
/* Thumb to arm. */
if (sym_sec != NULL
&& sym_sec->owner != NULL
&& !INTERWORK_FLAG (sym_sec->owner))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: Thumb call to ARM"),
- sym_sec->owner, input_bfd, name);
+ sym_sec->owner, name, input_bfd);
}
stub_type =
|| r_type == R_ARM_TLS_CALL)
{
if (input_sec->flags & SEC_ELF_PURECODE)
- (*_bfd_error_handler) (_("%B(%s): warning: long branch "
- " veneers used in section with "
- "SHF_ARM_PURECODE section "
- "attribute is only supported"
- " for M-profile targets that "
- "implement the movw "
- "instruction."));
+ _bfd_error_handler
+ (_("%B(%A): warning: long branch veneers used in"
+ " section with SHF_ARM_PURECODE section"
+ " attribute is only supported for M-profile"
+ " targets that implement the movw instruction."),
+ input_bfd, input_sec);
if (branch_type == ST_BRANCH_TO_THUMB)
{
/* Arm to thumb. */
&& sym_sec->owner != NULL
&& !INTERWORK_FLAG (sym_sec->owner))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: ARM call to Thumb"),
- sym_sec->owner, input_bfd, name);
+ sym_sec->owner, name, input_bfd);
}
/* We have an extra 2-bytes reach because of
out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
if (out_sec == NULL)
{
- (*_bfd_error_handler) (_("No address assigned to the veneers output "
- "section %s"), out_sec_name);
+ _bfd_error_handler (_("No address assigned to the veneers output "
+ "section %s"), out_sec_name);
return NULL;
}
}
{
if (section == NULL)
section = stub_sec;
- (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
- section->owner,
- stub_name);
+ _bfd_error_handler (_("%B: cannot create stub entry %s"),
+ section->owner, stub_name);
return NULL;
}
if (!is_v8m)
{
- (*_bfd_error_handler) (_("%B: Special symbol `%s' only allowed for "
- "ARMv8-M architecture or later."),
- input_bfd, sym_name);
+ _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
+ "ARMv8-M architecture or later."),
+ input_bfd, sym_name);
is_v8m = TRUE; /* Avoid multiple warning. */
ret = FALSE;
}
if (cmse_invalid)
{
- (*_bfd_error_handler) (_("%B: invalid special symbol `%s'."),
- input_bfd, sym_name);
- (*_bfd_error_handler) (_("It must be a global or weak function "
- "symbol."));
+ _bfd_error_handler (_("%B: invalid special symbol `%s'."),
+ input_bfd, sym_name);
+ _bfd_error_handler (_("It must be a global or weak function "
+ "symbol."));
ret = FALSE;
if (i < ext_start)
continue;
if (hash || j < ext_start)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("It must be a global or weak function symbol."));
}
else
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
ret = FALSE;
if (!hash)
if (cmse_hash->root.root.u.def.section != section)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: `%s' and its special symbol are in different sections."),
input_bfd, sym_name);
ret = FALSE;
don't create any stubs. */
if (section->output_section == NULL)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: entry function `%s' not output."), input_bfd, sym_name);
continue;
}
if (hash->root.size == 0)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: entry function `%s' is empty."), input_bfd, sym_name);
ret = FALSE;
}
return TRUE;
if (stub_entry->stub_offset == (bfd_vma) -1)
- (*_bfd_error_handler) (" %s", stub_entry->output_name);
+ _bfd_error_handler (" %s", stub_entry->output_name);
return TRUE;
}
in_implib_bfd = htab->in_implib_bfd;
if (!htab->cmse_implib)
{
- (*_bfd_error_handler) (_("%B: --in-implib only supported for Secure "
- "Gateway import libraries."), in_implib_bfd);
+ _bfd_error_handler (_("%B: --in-implib only supported for Secure "
+ "Gateway import libraries."), in_implib_bfd);
return FALSE;
}
|| (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
!= ST_BRANCH_TO_THUMB))
{
- (*_bfd_error_handler) (_("%B: invalid import library entry: `%s'."),
- in_implib_bfd, sym_name);
- (*_bfd_error_handler) (_("Symbol should be absolute, global and "
- "refer to Thumb functions."));
+ _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
+ in_implib_bfd, sym_name);
+ _bfd_error_handler (_("Symbol should be absolute, global and "
+ "refer to Thumb functions."));
ret = FALSE;
continue;
}
{
bfd_boolean new_stub;
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("Entry function `%s' disappeared from secure code."), sym_name);
hash = (struct elf32_arm_link_hash_entry *)
elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
{
if (!cmse_entry_fct_p (hash))
{
- (*_bfd_error_handler) (_("`%s' refers to a non entry function."),
- sym_name);
+ _bfd_error_handler (_("`%s' refers to a non entry function."),
+ sym_name);
ret = FALSE;
}
continue;
/* Check visibility hasn't changed. */
if (!!(flags & BSF_GLOBAL)
!= (hash->root.root.type == bfd_link_hash_defined))
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
sym_name);
/* Size should match that of a SG veneer. */
if (intsym->st_size != cmse_stub_size)
{
- (*_bfd_error_handler) (_("%B: incorrect size for symbol `%s'."),
- in_implib_bfd, sym_name);
+ _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
+ in_implib_bfd, sym_name);
ret = FALSE;
}
/* Complain if stub offset not a multiple of stub size. */
if (stub_offset % cmse_stub_size)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("Offset of veneer for entry function `%s' not a multiple of "
"its size."), sym_name);
ret = FALSE;
if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
{
BFD_ASSERT (new_cmse_stubs_created > 0);
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("new entry function(s) introduced but no output import library "
"specified:"));
bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
if (cmse_stub_array_start != cmse_stub_sec_vma)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("Start address of `%s' is different from previous link."),
out_sec_name);
ret = FALSE;
TRUE, FALSE);
if (stub_entry == NULL)
{
- (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
- section->owner,
- stub_name);
+ _bfd_error_handler (_("%B: cannot create stub entry %s"),
+ section->owner, stub_name);
return FALSE;
}
default:
/* Give a warning, but do as the user requests anyway. */
- (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
+ _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
"workaround is not necessary for target architecture"), obfd);
}
}
{
if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
/* Give a warning, but do as the user requests anyway. */
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: warning: selected STM32L4XX erratum "
"workaround is not necessary for target architecture"), obfd);
}
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%B: unable to find VFP11 veneer "
+ "`%s'"), abfd, tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%B: unable to find VFP11 veneer "
+ "`%s'"), abfd, tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
+ "`%s'"), abfd, tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
+ "`%s'"), abfd, tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
/* The field encoding the register list is the same for both LDMIA
and LDMDB encodings. */
if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
- nb_words = popcount (insn & 0x0000ffff);
+ nb_words = elf32_arm_popcount (insn & 0x0000ffff);
else if (is_thumb2_vldm (insn))
nb_words = (insn & 0xff);
{
if (is_not_last_in_it_block)
{
- (*_bfd_error_handler)
- /* Note - overlong line used here to allow for translation. */
- (_("\
-%B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
- "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
- abfd, sec, (long)i);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#x): error: multiple load detected"
+ " in non-last IT block instruction :"
+ " STM32L4XX veneer cannot be generated.\n"
+ "Use gcc option -mrestrict-it to generate"
+ " only one instruction per IT block.\n"),
+ abfd, sec, i);
}
else
{
&& sym_sec->owner != NULL
&& !INTERWORK_FLAG (sym_sec->owner))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: Thumb call to ARM"),
- sym_sec->owner, input_bfd, name);
+ sym_sec->owner, name, input_bfd);
return FALSE;
}
&& sym_sec->owner != NULL
&& !INTERWORK_FLAG (sym_sec->owner))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: arm call to thumb"),
- sym_sec->owner, input_bfd, name);
+ sym_sec->owner, name, input_bfd);
}
--my_offset;
error generation. */
insn = (insn << 16)
| bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
- input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' in TLS trampoline"),
+ input_bfd, input_sec, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
break;
}
else
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
- input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' in TLS trampoline"),
+ input_bfd, input_sec, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
break;
bfd_vma plt_offset;
bfd_vma gotplt_offset;
bfd_boolean has_iplt_entry;
+ bfd_boolean resolved_to_zero;
globals = elf32_arm_hash_table (info);
if (globals == NULL)
return bfd_reloc_notsupported;
BFD_ASSERT (is_arm_elf (input_bfd));
+ BFD_ASSERT (howto != NULL);
/* Some relocation types map to different relocations depending on the
target. We pick the right one here. */
gotplt_offset = (bfd_vma) -1;
}
+ resolved_to_zero = (h != NULL
+ && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
+
switch (r_type)
{
case R_ARM_NONE:
case R_ARM_ABS12:
if (!globals->vxworks_p)
return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
+ /* Fall through. */
case R_ARM_PC24:
case R_ARM_ABS32:
&& !(input_bfd == globals->stub_bfd
&& strstr (input_section->name, STUB_SUFFIX))
&& (h == NULL
- || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ && !resolved_to_zero)
|| h->root.type != bfd_link_hash_undefweak)
&& r_type != R_ARM_PC24
&& r_type != R_ARM_CALL
if (bfd_link_executable (info))
v = _("PIE executable");
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: relocation %s against external or undefined symbol `%s'"
" can not be used when making a %s; recompile with -fPIC"), input_bfd,
elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
else if (h != NULL
&& h->dynindx != -1
&& (!bfd_link_pic (info)
- || !SYMBOLIC_BIND (info, h)
+ || !(bfd_link_pie (info)
+ || SYMBOLIC_BIND (info, h))
|| !h->def_regular))
outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
else
/* FIXME: Should we translate the instruction into a BL
instruction instead ? */
if (branch_type != ST_BRANCH_TO_THUMB)
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
input_bfd,
h ? h->root.root.string : "(local)");
+ input_section->output_offset
+ rel->r_offset);
- value = relocation;
+ /* PR 21523: Use an absolute value. The user of this reloc will
+ have already selected an ADD or SUB insn appropriately. */
+ value = labs (relocation);
if (value >= 0x1000)
return bfd_reloc_overflow;
+ /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
+ if (branch_type == ST_BRANCH_TO_THUMB)
+ value |= 1;
+
insn = (insn & 0xfb0f8f00) | (value & 0xff)
| ((value & 0x700) << 4)
| ((value & 0x800) << 15);
/* FIXME: Should we translate the instruction into a BL
instruction instead ? */
if (branch_type == ST_BRANCH_TO_THUMB)
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
input_bfd,
h ? h->root.root.string : "(local)");
if ((bfd_link_pic (info) || indx != 0)
&& (h == NULL
- || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
+ && !resolved_to_zero)
|| h->root.type != bfd_link_hash_undefweak))
{
need_relocs = TRUE;
value = -5;
else
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
- input_bfd, input_section,
- (unsigned long)rel->r_offset, insn);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): unexpected Thumb instruction '%#lx' referenced by TLS_GOTDESC"),
+ input_bfd, input_section, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
}
break;
default:
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
- input_bfd, input_section,
- (unsigned long)rel->r_offset, insn);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): unexpected ARM instruction '%#lx' referenced by TLS_GOTDESC"),
+ input_bfd, input_section, rel->r_offset, insn);
return bfd_reloc_notsupported;
}
}
case R_ARM_TLS_LE32:
if (bfd_link_dll (info))
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
- input_bfd, input_section,
- (long) rel->r_offset, howto->name);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): %s relocation not permitted in shared object"),
+ input_bfd, input_section, rel->r_offset, howto->name);
return bfd_reloc_notsupported;
}
else
negative = identify_add_or_sub (insn);
if (negative == 0)
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
- input_bfd, input_section,
- (long) rel->r_offset, howto->name);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
+ input_bfd, input_section, rel->r_offset);
return bfd_reloc_overflow;
}
|| r_type == R_ARM_ALU_SB_G1
|| r_type == R_ARM_ALU_SB_G2) && residual != 0)
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
- howto->name);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
/* Check for overflow. */
if (residual >= 0x1000)
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, labs (signed_value), howto->name);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
/* Check for overflow. */
if (residual >= 0x100)
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, labs (signed_value), howto->name);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
fit in eight bits.) */
if ((residual & 0x3) != 0 || residual >= 0x400)
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
- input_bfd, input_section,
- (long) rel->r_offset, labs (signed_value), howto->name);
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): Overflow whilst splitting %#Lx for group relocation %s"),
+ input_bfd, input_section, rel->r_offset,
+ signed_value < 0 ? -signed_value : signed_value, howto->name);
return bfd_reloc_overflow;
}
|| r_type == R_ARM_GNU_VTINHERIT)
continue;
- bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
- howto = bfd_reloc.howto;
+ howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
+
+ if (howto == NULL)
+ return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
h = NULL;
sym = NULL;
if (howto->rightshift
|| (howto->src_mask & (howto->src_mask + 1)))
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): %s relocation against SEC_MERGE section"),
input_bfd, input_section,
- (long) rel->r_offset, howto->name);
+ rel->r_offset, howto->name);
return FALSE;
}
|| h->root.type == bfd_link_hash_defweak)
&& IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
((sym_type == STT_TLS
- ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
- : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
+ /* xgettext:c-format */
+ ? _("%B(%A+%#Lx): %s used with TLS symbol %s")
+ /* xgettext:c-format */
+ : _("%B(%A+%#Lx): %s used with non-TLS symbol %s")),
input_bfd,
input_section,
- (long) rel->r_offset,
+ rel->r_offset,
howto->name,
name);
}
&& _bfd_elf_section_offset (output_bfd, info, input_section,
rel->r_offset) != (bfd_vma) -1)
{
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+%#Lx): unresolvable %s relocation against symbol `%s'"),
input_bfd,
input_section,
- (long) rel->r_offset,
+ rel->r_offset,
howto->name,
h->root.root.string);
return FALSE;
if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
{
if (flags & EF_ARM_INTERWORK)
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
abfd);
else
T(V8), /* V7E_M. */
T(V8) /* V8. */
};
+ const int v8r[] =
+ {
+ T(V8R), /* PRE_V4. */
+ T(V8R), /* V4. */
+ T(V8R), /* V4T. */
+ T(V8R), /* V5T. */
+ T(V8R), /* V5TE. */
+ T(V8R), /* V5TEJ. */
+ T(V8R), /* V6. */
+ T(V8R), /* V6KZ. */
+ T(V8R), /* V6T2. */
+ T(V8R), /* V6K. */
+ T(V8R), /* V7. */
+ T(V8R), /* V6_M. */
+ T(V8R), /* V6S_M. */
+ T(V8R), /* V7E_M. */
+ T(V8), /* V8. */
+ T(V8R), /* V8R. */
+ };
const int v8m_baseline[] =
{
-1, /* PRE_V4. */
T(V8M_BASE), /* V6S_M. */
-1, /* V7E_M. */
-1, /* V8. */
- -1,
+ -1, /* V8R. */
T(V8M_BASE) /* V8-M BASELINE. */
};
const int v8m_mainline[] =
T(V8M_MAIN), /* V6S_M. */
T(V8M_MAIN), /* V7E_M. */
-1, /* V8. */
- -1,
+ -1, /* V8R. */
T(V8M_MAIN), /* V8-M BASELINE. */
T(V8M_MAIN) /* V8-M MAINLINE. */
};
T(V6S_M), /* V6S_M. */
T(V7E_M), /* V7E_M. */
T(V8), /* V8. */
- -1, /* Unused. */
+ -1, /* V8R. */
T(V8M_BASE), /* V8-M BASELINE. */
T(V8M_MAIN), /* V8-M MAINLINE. */
T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
v6s_m,
v7e_m,
v8,
- NULL,
+ v8r,
v8m_baseline,
v8m_mainline,
/* Pseudo-architecture. */
are conflicting attributes. */
static bfd_boolean
-elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
+elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
{
+ bfd *obfd = info->output_bfd;
obj_attribute *in_attr;
obj_attribute *out_attr;
/* Some tags have 0 = don't care, 1 = strong requirement,
follow the requirement of the input. */
if (out_attr[i].i == 0)
{
+ /* This assert is still reasonable, we shouldn't
+ produce the suspicious build attribute
+ combination (See below for in_attr). */
BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
out_attr[i].i = in_attr[i].i;
out_attr[Tag_ABI_HardFP_use].i
nothing. */
else if (in_attr[i].i == 0)
{
- BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
+ /* We used to assert that Tag_ABI_HardFP_use was
+ zero here, but we should never assert when
+ consuming an object file that has suspicious
+ build attributes. The single precision variant
+ of 'no FP architecture' is still 'no FP
+ architecture', so we just ignore the tag in this
+ case. */
break;
}
if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
{
_bfd_error_handler
- (_("%B has has both the current and legacy "
+ (_("%B has both the current and legacy "
"Tag_MPextension_use attributes"),
ibfd);
result = FALSE;
}
/* Merge Tag_compatibility attributes and any common GNU ones. */
- if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
+ if (!_bfd_elf_merge_object_attributes (ibfd, info))
return FALSE;
/* Check for any attributes not known on ARM. */
object file when linking. */
static bfd_boolean
-elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
+elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
/* Display the flags field. */
/* Ignore init flag - it may not be set, despite the flags field
containing valid data. */
- /* xgettext:c-format */
fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
switch (EF_ARM_EABI_VERSION (flags))
return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
}
-/* Update the got entry reference counts for the section being removed. */
-
-static bfd_boolean
-elf32_arm_gc_sweep_hook (bfd * abfd,
- struct bfd_link_info * info,
- asection * sec,
- const Elf_Internal_Rela * relocs)
-{
- Elf_Internal_Shdr *symtab_hdr;
- struct elf_link_hash_entry **sym_hashes;
- bfd_signed_vma *local_got_refcounts;
- const Elf_Internal_Rela *rel, *relend;
- struct elf32_arm_link_hash_table * globals;
-
- if (bfd_link_relocatable (info))
- return TRUE;
-
- globals = elf32_arm_hash_table (info);
- if (globals == NULL)
- return FALSE;
-
- elf_section_data (sec)->local_dynrel = NULL;
-
- symtab_hdr = & elf_symtab_hdr (abfd);
- sym_hashes = elf_sym_hashes (abfd);
- local_got_refcounts = elf_local_got_refcounts (abfd);
-
- check_use_blx (globals);
-
- relend = relocs + sec->reloc_count;
- for (rel = relocs; rel < relend; rel++)
- {
- unsigned long r_symndx;
- struct elf_link_hash_entry *h = NULL;
- struct elf32_arm_link_hash_entry *eh;
- int r_type;
- bfd_boolean call_reloc_p;
- bfd_boolean may_become_dynamic_p;
- bfd_boolean may_need_local_target_p;
- union gotplt_union *root_plt;
- struct arm_plt_info *arm_plt;
-
- r_symndx = ELF32_R_SYM (rel->r_info);
- if (r_symndx >= symtab_hdr->sh_info)
- {
- h = sym_hashes[r_symndx - symtab_hdr->sh_info];
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- }
- eh = (struct elf32_arm_link_hash_entry *) h;
-
- call_reloc_p = FALSE;
- may_become_dynamic_p = FALSE;
- may_need_local_target_p = FALSE;
-
- r_type = ELF32_R_TYPE (rel->r_info);
- r_type = arm_real_reloc_type (globals, r_type);
- switch (r_type)
- {
- case R_ARM_GOT32:
- case R_ARM_GOT_PREL:
- case R_ARM_TLS_GD32:
- case R_ARM_TLS_IE32:
- if (h != NULL)
- {
- if (h->got.refcount > 0)
- h->got.refcount -= 1;
- }
- else if (local_got_refcounts != NULL)
- {
- if (local_got_refcounts[r_symndx] > 0)
- local_got_refcounts[r_symndx] -= 1;
- }
- break;
-
- case R_ARM_TLS_LDM32:
- globals->tls_ldm_got.refcount -= 1;
- break;
-
- case R_ARM_PC24:
- case R_ARM_PLT32:
- case R_ARM_CALL:
- case R_ARM_JUMP24:
- case R_ARM_PREL31:
- case R_ARM_THM_CALL:
- case R_ARM_THM_JUMP24:
- case R_ARM_THM_JUMP19:
- call_reloc_p = TRUE;
- may_need_local_target_p = TRUE;
- break;
-
- case R_ARM_ABS12:
- if (!globals->vxworks_p)
- {
- may_need_local_target_p = TRUE;
- break;
- }
- /* Fall through. */
- case R_ARM_ABS32:
- case R_ARM_ABS32_NOI:
- case R_ARM_REL32:
- case R_ARM_REL32_NOI:
- case R_ARM_MOVW_ABS_NC:
- case R_ARM_MOVT_ABS:
- case R_ARM_MOVW_PREL_NC:
- case R_ARM_MOVT_PREL:
- case R_ARM_THM_MOVW_ABS_NC:
- case R_ARM_THM_MOVT_ABS:
- case R_ARM_THM_MOVW_PREL_NC:
- case R_ARM_THM_MOVT_PREL:
- /* Should the interworking branches be here also? */
- if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
- && (sec->flags & SEC_ALLOC) != 0)
- {
- if (h == NULL
- && elf32_arm_howto_from_type (r_type)->pc_relative)
- {
- call_reloc_p = TRUE;
- may_need_local_target_p = TRUE;
- }
- else
- may_become_dynamic_p = TRUE;
- }
- else
- may_need_local_target_p = TRUE;
- break;
-
- default:
- break;
- }
-
- if (may_need_local_target_p
- && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
- &arm_plt))
- {
- /* If PLT refcount book-keeping is wrong and too low, we'll
- see a zero value (going to -1) for the root PLT reference
- count. */
- if (root_plt->refcount >= 0)
- {
- BFD_ASSERT (root_plt->refcount != 0);
- root_plt->refcount -= 1;
- }
- else
- /* A value of -1 means the symbol has become local, forced
- or seeing a hidden definition. Any other negative value
- is an error. */
- BFD_ASSERT (root_plt->refcount == -1);
-
- if (!call_reloc_p)
- arm_plt->noncall_refcount--;
-
- if (r_type == R_ARM_THM_CALL)
- arm_plt->maybe_thumb_refcount--;
-
- if (r_type == R_ARM_THM_JUMP24
- || r_type == R_ARM_THM_JUMP19)
- arm_plt->thumb_refcount--;
- }
-
- if (may_become_dynamic_p)
- {
- struct elf_dyn_relocs **pp;
- struct elf_dyn_relocs *p;
-
- if (h != NULL)
- pp = &(eh->dyn_relocs);
- else
- {
- Elf_Internal_Sym *isym;
-
- isym = bfd_sym_from_r_symndx (&globals->sym_cache,
- abfd, r_symndx);
- if (isym == NULL)
- return FALSE;
- pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
- if (pp == NULL)
- return FALSE;
- }
- for (; (p = *pp) != NULL; pp = &p->next)
- if (p->sec == sec)
- {
- /* Everything must go for SEC. */
- *pp = p->next;
- break;
- }
- }
- }
-
- return TRUE;
-}
-
/* Look through the relocs for a section during the first phase. */
static bfd_boolean
Elf_Internal_Sym *isym;
struct elf_link_hash_entry *h;
struct elf32_arm_link_hash_entry *eh;
- unsigned long r_symndx;
+ unsigned int r_symndx;
int r_type;
r_symndx = ELF32_R_SYM (rel->r_info);
object file containing relocations but no symbol table. */
&& (r_symndx > STN_UNDEF || nsyms > 0))
{
- (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
- r_symndx);
+ _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
+ r_symndx);
return FALSE;
}
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
-
- /* PR15323, ref flags aren't set for references in the
- same object. */
- h->root.non_ir_ref = 1;
}
}
case R_ARM_THM_MOVT_ABS:
if (bfd_link_pic (info))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
abfd, elf32_arm_howto_table_1[r_type].name,
(h) ? h->root.root.string : "a local symbol");
{
arm_unwind_table_edit *edit_node, *edit_next;
bfd_vma bias;
- bfd_vma index;
+ bfd_vma reloc_index;
(*swap_in) (abfd, erela, irela);
- index = (irela->r_offset - offset) / 8;
+ reloc_index = (irela->r_offset - offset) / 8;
bias = 0;
edit_node = edit_list;
for (edit_next = edit_list;
- edit_next && edit_next->index <= index;
+ edit_next && edit_next->index <= reloc_index;
edit_next = edit_node->next)
{
bias++;
}
if (edit_node->type != DELETE_EXIDX_ENTRY
- || edit_node->index != index)
+ || edit_node->index != reloc_index)
{
irela->r_offset -= bias * 8;
irela++;
return found;
}
+/* Find dynamic relocs for H that apply to read-only sections. */
+
+static asection *
+readonly_dynrelocs (struct elf_link_hash_entry *h)
+{
+ struct elf_dyn_relocs *p;
+
+ for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
+ {
+ asection *s = p->sec->output_section;
+
+ if (s != NULL && (s->flags & SEC_READONLY) != 0)
+ return p->sec;
+ }
+ return NULL;
+}
+
/* Adjust a symbol defined by a dynamic object and referenced by a
regular object. The current definition is in some section of the
dynamic object, but we're not including those sections. We have to
struct elf_link_hash_entry * h)
{
bfd * dynobj;
- asection * s;
+ asection *s, *srel;
struct elf32_arm_link_hash_entry * eh;
struct elf32_arm_link_hash_table *globals;
BFD_ASSERT (dynobj != NULL
&& (h->needs_plt
|| h->type == STT_GNU_IFUNC
- || h->u.weakdef != NULL
+ || h->is_weakalias
|| (h->def_dynamic
&& h->ref_regular
&& !h->def_regular)));
/* If this is a weak symbol, and there is a real definition, the
processor independent code will have arranged for us to see the
real definition first, and we can just use the same value. */
- if (h->u.weakdef != NULL)
+ if (h->is_weakalias)
{
- BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
- || h->u.weakdef->root.type == bfd_link_hash_defweak);
- h->root.u.def.section = h->u.weakdef->root.u.def.section;
- h->root.u.def.value = h->u.weakdef->root.u.def.value;
+ struct elf_link_hash_entry *def = weakdef (h);
+ BFD_ASSERT (def->root.type == bfd_link_hash_defined);
+ h->root.u.def.section = def->root.u.def.section;
+ h->root.u.def.value = def->root.u.def.value;
return TRUE;
}
determine the address it must put in the global offset table, so
both the dynamic object and the regular object will refer to the
same memory location for the variable. */
- s = bfd_get_linker_section (dynobj, ".dynbss");
- BFD_ASSERT (s != NULL);
-
/* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
linker to copy the initial value out of the dynamic object and into
the runtime process image. We need to remember the offset into the
.rel(a).bss section we are going to use. */
+ if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
+ {
+ s = globals->root.sdynrelro;
+ srel = globals->root.sreldynrelro;
+ }
+ else
+ {
+ s = globals->root.sdynbss;
+ srel = globals->root.srelbss;
+ }
if (info->nocopyreloc == 0
&& (h->root.u.def.section->flags & SEC_ALLOC) != 0
&& h->size != 0)
{
- asection *srel;
-
- srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
elf32_arm_allocate_dynrelocs (info, srel, 1);
h->needs_copy = 1;
}
{
/* Make sure this symbol is output as a dynamic symbol.
Undefined weak syms won't yet be marked as dynamic. */
- if (h->dynindx == -1
- && !h->forced_local)
+ if (h->dynindx == -1 && !h->forced_local
+ && h->root.type == bfd_link_hash_undefweak)
{
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
/* Make sure this symbol is output as a dynamic symbol.
Undefined weak syms won't yet be marked as dynamic. */
- if (h->dynindx == -1
- && !h->forced_local)
+ if (h->dynindx == -1 && !h->forced_local
+ && h->root.type == bfd_link_hash_undefweak)
{
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
if (eh->dyn_relocs != NULL
&& h->root.type == bfd_link_hash_undefweak)
{
- if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
+ if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
eh->dyn_relocs = NULL;
/* Make sure undefined weak symbols are output as a dynamic
{
/* Make sure this symbol is output as a dynamic symbol.
Undefined weak syms won't yet be marked as dynamic. */
- if (h->dynindx == -1
- && !h->forced_local)
+ if (h->dynindx == -1 && !h->forced_local
+ && h->root.type == bfd_link_hash_undefweak)
{
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
return TRUE;
}
-/* Find any dynamic relocs that apply to read-only sections. */
+/* Set DF_TEXTREL if we find any dynamic relocs that apply to
+ read-only sections. */
static bfd_boolean
-elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
+maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
{
- struct elf32_arm_link_hash_entry * eh;
- struct elf_dyn_relocs * p;
+ asection *sec;
- eh = (struct elf32_arm_link_hash_entry *) h;
- for (p = eh->dyn_relocs; p != NULL; p = p->next)
- {
- asection *s = p->sec;
+ if (h->root.type == bfd_link_hash_indirect)
+ return TRUE;
- if (s != NULL && (s->flags & SEC_READONLY) != 0)
- {
- struct bfd_link_info *info = (struct bfd_link_info *) inf;
+ sec = readonly_dynrelocs (h);
+ if (sec != NULL)
+ {
+ struct bfd_link_info *info = (struct bfd_link_info *) info_p;
- info->flags |= DF_TEXTREL;
+ info->flags |= DF_TEXTREL;
+ info->callbacks->minfo
+ (_("%B: dynamic relocation against `%T' in read-only section `%A'\n"),
+ sec->owner, h->root.root.string, sec);
- /* Not an error, just cut short the traversal. */
- return FALSE;
- }
+ /* Not an error, just cut short the traversal. */
+ return FALSE;
}
return TRUE;
}
if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
|| !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
|| !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
- /* xgettext:c-format */
- _bfd_error_handler (_("Errors encountered processing file %s"),
- ibfd->filename);
+ _bfd_error_handler (_("Errors encountered processing file %B"), ibfd);
}
/* Allocate space for the glue sections now that we've sized them. */
&& s != htab->root.sgotplt
&& s != htab->root.iplt
&& s != htab->root.igotplt
- && s != htab->sdynbss)
+ && s != htab->root.sdynbss
+ && s != htab->root.sdynrelro)
{
/* It's not one of our sections, so don't allocate space. */
continue;
/* If any dynamic relocs apply to a read-only section,
then we need a DT_TEXTREL entry. */
if ((info->flags & DF_TEXTREL) == 0)
- elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
- info);
+ elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
if ((info->flags & DF_TEXTREL) != 0)
{
&& (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak));
- s = htab->srelbss;
- BFD_ASSERT (s != NULL);
-
rel.r_addend = 0;
rel.r_offset = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
+ if (h->root.u.def.section == htab->root.sdynrelro)
+ s = htab->root.sreldynrelro;
+ else
+ s = htab->root.srelbss;
elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
}
s = bfd_get_linker_section (dynobj, name);
if (s == NULL)
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("could not find section %s"), name);
bfd_set_error (bfd_error_invalid_operation);
return FALSE;
case DT_RELSZ:
case DT_RELASZ:
- if (!htab->symbian_p)
- {
- /* My reading of the SVR4 ABI indicates that the
- procedure linkage table relocs (DT_JMPREL) should be
- included in the overall relocs (DT_REL). This is
- what Solaris does. However, UnixWare can not handle
- that case. Therefore, we override the DT_RELSZ entry
- here to make it not include the JMPREL relocs. Since
- the linker script arranges for .rel(a).plt to follow all
- other relocation sections, we don't have to worry
- about changing the DT_REL entry. */
- s = htab->root.srelplt;
- if (s != NULL)
- dyn.d_un.d_val -= s->size;
- bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
- break;
- }
- /* Fall through. */
-
case DT_REL:
case DT_RELA:
/* In the BPABI, the DT_REL tag must point at the file
offset, not the VMA, of the first relocation
section. So, we use code similar to that in
elflink.c, but do not check for SHF_ALLOC on the
- relcoation section, since relocations sections are
- never allocated under the BPABI. The comments above
- about Unixware notwithstanding, we include all of the
- relocations here. */
+ relocation section, since relocation sections are
+ never allocated under the BPABI. PLT relocs are also
+ included. */
if (htab->symbian_p)
{
unsigned int i;
{
struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
+ /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
+ Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
+ library to be a relocatable object file. */
+ BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
if (globals->cmse_implib)
return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
else
This check is just to be on the safe side... */
if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
{
- (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
- "allocated in unsafe location"), abfd);
+ _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
+ "allocated in unsafe location"), abfd);
return FALSE;
}
{
/* There's not much we can do apart from complain if this
happens. */
- (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
- "of range (input file too large)"), abfd);
+ _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
+ "of range (input file too large)"), abfd);
return FALSE;
}
int insn_all_registers = initial_insn & 0x0000ffff;
int insn_low_registers, insn_high_registers;
int usable_register_mask;
- int nb_registers = popcount (insn_all_registers);
+ int nb_registers = elf32_arm_popcount (insn_all_registers);
int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
bfd_byte *current_stub_contents = base_stub_contents;
BFD_ASSERT (!wback || !restore_rn);
/* - nb_registers > 8. */
- BFD_ASSERT (popcount (insn_all_registers) > 8);
+ BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
/* At this point, LDMxx initial insn loads between 9 and 14 registers. */
int usable_register_mask;
int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
- int nb_registers = popcount (insn_all_registers);
+ int nb_registers = elf32_arm_popcount (insn_all_registers);
bfd_byte *current_stub_contents = base_stub_contents;
BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
BFD_ASSERT (!wback || !restore_rn);
/* - nb_registers > 8. */
- BFD_ASSERT (popcount (insn_all_registers) > 8);
+ BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
/* At this point, LDMxx initial insn loads between 9 and 14 registers. */
if ((signed) branch_to_veneer < -(1 << 25)
|| (signed) branch_to_veneer >= (1 << 25))
- (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
- "range"), output_bfd);
+ _bfd_error_handler (_("%B: error: VFP11 veneer out of "
+ "range"), output_bfd);
insn |= (branch_to_veneer >> 2) & 0xffffff;
contents[endianflip ^ target] = insn & 0xff;
if ((signed) branch_from_veneer < -(1 << 25)
|| (signed) branch_from_veneer >= (1 << 25))
- (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
- "range"), output_bfd);
+ _bfd_error_handler (_("%B: error: VFP11 veneer out of "
+ "range"), output_bfd);
/* Original instruction. */
insn = errnode->u.v.branch->u.b.vfp_insn;
((signed) branch_to_veneer >= (1 << 24)) ?
branch_to_veneer - (1 << 24) : 0;
- (*_bfd_error_handler)
- (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
- "Jump out of range by %ld bytes. "
+ _bfd_error_handler
+ (_("%B(%#Lx): error: Cannot create STM32L4XX veneer. "
+ "Jump out of range by %Ld bytes. "
"Cannot encode branch instruction. "),
output_bfd,
- (long) (stm32l4xx_errnode->vma - 4),
+ stm32l4xx_errnode->vma - 4,
out_of_range);
continue;
}
STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
|| (signed) (veneer_r - veneer) >= (1 << 24))
{
- (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
- "veneer."), output_bfd);
+ _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
+ "veneer."), output_bfd);
continue;
}
#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
-#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
#define elf_backend_check_relocs elf32_arm_check_relocs
#define elf_backend_update_relocs elf32_arm_update_relocs
#define elf_backend_relocate_section elf32_arm_relocate_section
#define elf_backend_plt_readonly 1
#define elf_backend_want_got_plt 1
#define elf_backend_want_plt_sym 0
+#define elf_backend_want_dynrelro 1
#define elf_backend_may_use_rel_p 1
#define elf_backend_may_use_rela_p 0
#define elf_backend_default_use_rela_p 0
+#define elf_backend_dtrel_excludes_plt 1
#define elf_backend_got_header_size 12
#define elf_backend_extern_protected_data 1
#undef elf_backend_lookup_section_flags_hook
#define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
+#define elf_backend_linux_prpsinfo32_ugid16 TRUE
+
#include "elf32-target.h"
/* Native Client targets. */
object file when linking. */
static bfd_boolean
-elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
+elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
{
+ bfd *obfd = info->output_bfd;
flagword out_flags;
flagword in_flags;
bfd_boolean flags_compatible = TRUE;
asection *sec;
/* Check if we have the same endianness. */
- if (! _bfd_generic_verify_endian_match (ibfd, obfd))
+ if (! _bfd_generic_verify_endian_match (ibfd, info))
return FALSE;
if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
return TRUE;
- if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
+ if (!elf32_arm_merge_eabi_attributes (ibfd, info))
return FALSE;
/* The input BFD must have had its flags initialised. */
{
_bfd_error_handler
(_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
- ibfd, obfd,
- (in_flags & EF_ARM_EABIMASK) >> 24,
- (out_flags & EF_ARM_EABIMASK) >> 24);
+ ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
+ obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
return FALSE;
}
{
_bfd_error_handler
(_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
- ibfd, obfd,
- in_flags & EF_ARM_APCS_26 ? 26 : 32,
- out_flags & EF_ARM_APCS_26 ? 26 : 32);
+ ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
+ obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
flags_compatible = FALSE;
}
#define elf_backend_default_use_rela_p 0
#undef elf_backend_want_plt_sym
#define elf_backend_want_plt_sym 0
+#undef elf_backend_dtrel_excludes_plt
+#define elf_backend_dtrel_excludes_plt 0
#undef ELF_MAXPAGESIZE
#define ELF_MAXPAGESIZE 0x8000
projects / deliverable / binutils-gdb.git / blobdiff