/* 32-bit ELF support for ARM
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
-#include "bfd.h"
#include "sysdep.h"
+#include "bfd.h"
#include "libiberty.h"
#include "libbfd.h"
#include "elf-bfd.h"
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
- /* FIXME: Has two more bits of offset in Thumb32. */
HOWTO (R_ARM_THM_CALL, /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
- 23, /* bitsize */
+ 25, /* bitsize */
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
return NULL;
}
+static reloc_howto_type *
+elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ const char *r_name)
+{
+ unsigned int i;
+
+ for (i = 0;
+ i < (sizeof (elf32_arm_howto_table_1)
+ / sizeof (elf32_arm_howto_table_1[0]));
+ i++)
+ if (elf32_arm_howto_table_1[i].name != NULL
+ && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
+ return &elf32_arm_howto_table_1[i];
+
+ for (i = 0;
+ i < (sizeof (elf32_arm_howto_table_2)
+ / sizeof (elf32_arm_howto_table_2[0]));
+ i++)
+ if (elf32_arm_howto_table_2[i].name != NULL
+ && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
+ return &elf32_arm_howto_table_2[i];
+
+ return NULL;
+}
+
/* Support for core dump NOTE sections */
static bfd_boolean
elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
+#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
+#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
+
/* The name of the dynamic interpreter. This is put in the .interp
section. */
#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
}
elf32_arm_section_map;
+/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
+
+typedef enum
+{
+ VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
+ VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
+ VFP11_ERRATUM_ARM_VENEER,
+ VFP11_ERRATUM_THUMB_VENEER
+}
+elf32_vfp11_erratum_type;
+
+typedef struct elf32_vfp11_erratum_list
+{
+ struct elf32_vfp11_erratum_list *next;
+ bfd_vma vma;
+ union
+ {
+ struct
+ {
+ struct elf32_vfp11_erratum_list *veneer;
+ unsigned int vfp_insn;
+ } b;
+ struct
+ {
+ struct elf32_vfp11_erratum_list *branch;
+ unsigned int id;
+ } v;
+ } u;
+ elf32_vfp11_erratum_type type;
+}
+elf32_vfp11_erratum_list;
+
typedef struct _arm_elf_section_data
{
struct bfd_elf_section_data elf;
unsigned int mapcount;
+ unsigned int mapsize;
elf32_arm_section_map *map;
+ unsigned int erratumcount;
+ elf32_vfp11_erratum_list *erratumlist;
}
_arm_elf_section_data;
/* The size of the thread control block. */
#define TCB_SIZE 8
-#define NUM_KNOWN_ATTRIBUTES 32
-
-typedef struct aeabi_attribute
-{
- int type;
- unsigned int i;
- char *s;
-} aeabi_attribute;
-
-typedef struct aeabi_attribute_list
-{
- struct aeabi_attribute_list *next;
- int tag;
- aeabi_attribute attr;
-} aeabi_attribute_list;
-
struct elf32_arm_obj_tdata
{
struct elf_obj_tdata root;
/* tls_type for each local got entry. */
char *local_got_tls_type;
- aeabi_attribute known_eabi_attributes[NUM_KNOWN_ATTRIBUTES];
- aeabi_attribute_list *other_eabi_attributes;
+ /* Zero to warn when linking objects with incompatible enum sizes. */
+ int no_enum_size_warning;
};
#define elf32_arm_tdata(abfd) \
so that we can emit the Thumb trampoline only if needed. */
bfd_signed_vma plt_thumb_refcount;
+ /* Some references from Thumb code may be eliminated by BL->BLX
+ conversion, so record them separately. */
+ bfd_signed_vma plt_maybe_thumb_refcount;
+
/* Since PLT entries have variable size if the Thumb prologue is
used, we need to record the index into .got.plt instead of
recomputing it from the PLT offset. */
/* The size in bytes of the section containing the ARM-to-Thumb glue. */
bfd_size_type arm_glue_size;
+ /* The size in bytes of the section containing glue for VFP11 erratum
+ veneers. */
+ bfd_size_type vfp11_erratum_glue_size;
+
/* An arbitrary input BFD chosen to hold the glue sections. */
bfd * bfd_of_glue_owner;
/* Nonzero if the ARM/Thumb BLX instructions are available for use. */
int use_blx;
+ /* What sort of code sequences we should look for which may trigger the
+ VFP11 denorm erratum. */
+ bfd_arm_vfp11_fix vfp11_fix;
+
+ /* Global counter for the number of fixes we have emitted. */
+ int num_vfp11_fixes;
+
+ /* Nonzero to force PIC branch veneers. */
+ int pic_veneer;
+
/* The number of bytes in the initial entry in the PLT. */
bfd_size_type plt_header_size;
ret->relocs_copied = NULL;
ret->tls_type = GOT_UNKNOWN;
ret->plt_thumb_refcount = 0;
+ ret->plt_maybe_thumb_refcount = 0;
ret->plt_got_offset = -1;
ret->export_glue = NULL;
}
const char *name, asection *s)
{
if (htab->use_rel)
- return strncmp (name, ".rel", 4) == 0 && strcmp (s->name, name + 4) == 0;
+ return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
else
- return strncmp (name, ".rela", 5) == 0 && strcmp (s->name, name + 5) == 0;
+ return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
}
/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
/* Copy over PLT info. */
edir->plt_thumb_refcount += eind->plt_thumb_refcount;
eind->plt_thumb_refcount = 0;
+ edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
+ eind->plt_maybe_thumb_refcount = 0;
if (dir->got.refcount <= 0)
{
ret->srelplt2 = NULL;
ret->thumb_glue_size = 0;
ret->arm_glue_size = 0;
+ ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
+ ret->vfp11_erratum_glue_size = 0;
+ ret->num_vfp11_fixes = 0;
ret->bfd_of_glue_owner = NULL;
ret->byteswap_code = 0;
ret->target1_is_rel = 0;
static struct elf_link_hash_entry *
find_thumb_glue (struct bfd_link_info *link_info,
const char *name,
- bfd *input_bfd)
+ char **error_message)
{
char *tmp_name;
struct elf_link_hash_entry *hash;
hash = elf_link_hash_lookup
(&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
- if (hash == NULL)
- /* xgettext:c-format */
- (*_bfd_error_handler) (_("%B: unable to find THUMB glue '%s' for `%s'"),
- input_bfd, tmp_name, name);
+ if (hash == NULL
+ && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
+ tmp_name, name) == -1)
+ *error_message = (char *) bfd_errmsg (bfd_error_system_call);
free (tmp_name);
static struct elf_link_hash_entry *
find_arm_glue (struct bfd_link_info *link_info,
const char *name,
- bfd *input_bfd)
+ char **error_message)
{
char *tmp_name;
struct elf_link_hash_entry *myh;
myh = elf_link_hash_lookup
(&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
- if (myh == NULL)
- /* xgettext:c-format */
- (*_bfd_error_handler) (_("%B: unable to find ARM glue '%s' for `%s'"),
- input_bfd, tmp_name, name);
+ if (myh == NULL
+ && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
+ tmp_name, name) == -1)
+ *error_message = (char *) bfd_errmsg (bfd_error_system_call);
free (tmp_name);
__func_addr:
.word func @ behave as if you saw a ARM_32 reloc.
+ (v5t static images)
+ .arm
+ __func_from_arm:
+ ldr pc, __func_addr
+ __func_addr:
+ .word func @ behave as if you saw a ARM_32 reloc.
+
(relocatable images)
.arm
__func_from_arm:
static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
static const insn32 a2t3_func_addr_insn = 0x00000001;
+#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
+static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
+static const insn32 a2t2v5_func_addr_insn = 0x00000001;
+
#define ARM2THUMB_PIC_GLUE_SIZE 16
static const insn32 a2t1p_ldr_insn = 0xe59fc004;
static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
static const insn16 t2a2_noop_insn = 0x46c0;
static const insn32 t2a3_b_insn = 0xea000000;
+#define VFP11_ERRATUM_VENEER_SIZE 8
+
#ifndef ELFARM_NABI_C_INCLUDED
bfd_boolean
bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
- s->size = globals->arm_glue_size;
+ BFD_ASSERT (s->size == globals->arm_glue_size);
s->contents = foo;
}
foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
- s->size = globals->thumb_glue_size;
+ BFD_ASSERT (s->size == globals->thumb_glue_size);
+ s->contents = foo;
+ }
+
+ if (globals->vfp11_erratum_glue_size != 0)
+ {
+ BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
+
+ s = bfd_get_section_by_name
+ (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
+
+ BFD_ASSERT (s != NULL);
+
+ foo = bfd_alloc (globals->bfd_of_glue_owner,
+ globals->vfp11_erratum_glue_size);
+
+ BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
s->contents = foo;
}
struct bfd_link_hash_entry * bh;
struct elf32_arm_link_hash_table * globals;
bfd_vma val;
+ bfd_size_type size;
globals = elf32_arm_hash_table (link_info);
free (tmp_name);
- if ((link_info->shared || globals->root.is_relocatable_executable))
- globals->arm_glue_size += ARM2THUMB_PIC_GLUE_SIZE;
+ if (link_info->shared || globals->root.is_relocatable_executable
+ || globals->pic_veneer)
+ size = ARM2THUMB_PIC_GLUE_SIZE;
+ else if (globals->use_blx)
+ size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
else
- globals->arm_glue_size += ARM2THUMB_STATIC_GLUE_SIZE;
+ size = ARM2THUMB_STATIC_GLUE_SIZE;
+
+ s->size += size;
+ globals->arm_glue_size += size;
return myh;
}
free (tmp_name);
+ s->size += THUMB2ARM_GLUE_SIZE;
hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
return;
}
+
+/* Add an entry to the code/data map for section SEC. */
+
+static void
+elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
+{
+ struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
+ unsigned int newidx;
+
+ if (sec_data->map == NULL)
+ {
+ sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
+ sec_data->mapcount = 0;
+ sec_data->mapsize = 1;
+ }
+
+ newidx = sec_data->mapcount++;
+
+ if (sec_data->mapcount > sec_data->mapsize)
+ {
+ sec_data->mapsize *= 2;
+ sec_data->map = bfd_realloc (sec_data->map, sec_data->mapsize
+ * sizeof (elf32_arm_section_map));
+ }
+
+ sec_data->map[newidx].vma = vma;
+ sec_data->map[newidx].type = type;
+}
+
+
+/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
+ veneers are handled for now. */
+
+static bfd_vma
+record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
+ elf32_vfp11_erratum_list *branch,
+ bfd *branch_bfd,
+ asection *branch_sec,
+ unsigned int offset)
+{
+ asection *s;
+ struct elf32_arm_link_hash_table *hash_table;
+ char *tmp_name;
+ struct elf_link_hash_entry *myh;
+ struct bfd_link_hash_entry *bh;
+ bfd_vma val;
+ struct _arm_elf_section_data *sec_data;
+ int errcount;
+ elf32_vfp11_erratum_list *newerr;
+
+ hash_table = elf32_arm_hash_table (link_info);
+
+ BFD_ASSERT (hash_table != NULL);
+ BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
+
+ s = bfd_get_section_by_name
+ (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
+
+ sec_data = elf32_arm_section_data (s);
+
+ BFD_ASSERT (s != NULL);
+
+ tmp_name = bfd_malloc ((bfd_size_type) strlen
+ (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
+
+ BFD_ASSERT (tmp_name);
+
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
+ hash_table->num_vfp11_fixes);
+
+ myh = elf_link_hash_lookup
+ (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
+
+ BFD_ASSERT (myh == NULL);
+
+ bh = NULL;
+ val = hash_table->vfp11_erratum_glue_size;
+ _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
+ tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
+ NULL, TRUE, FALSE, &bh);
+
+ myh = (struct elf_link_hash_entry *) bh;
+ myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
+ myh->forced_local = 1;
+
+ /* Link veneer back to calling location. */
+ errcount = ++(sec_data->erratumcount);
+ newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
+
+ newerr->type = VFP11_ERRATUM_ARM_VENEER;
+ newerr->vma = -1;
+ newerr->u.v.branch = branch;
+ newerr->u.v.id = hash_table->num_vfp11_fixes;
+ branch->u.b.veneer = newerr;
+
+ newerr->next = sec_data->erratumlist;
+ sec_data->erratumlist = newerr;
+
+ /* A symbol for the return from the veneer. */
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
+ hash_table->num_vfp11_fixes);
+
+ myh = elf_link_hash_lookup
+ (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
+
+ if (myh != NULL)
+ abort ();
+
+ bh = NULL;
+ val = offset + 4;
+ _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
+ branch_sec, val, NULL, TRUE, FALSE, &bh);
+
+ myh = (struct elf_link_hash_entry *) bh;
+ myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
+ myh->forced_local = 1;
+
+ free (tmp_name);
+
+ /* Generate a mapping symbol for the veneer section, and explicitly add an
+ entry for that symbol to the code/data map for the section. */
+ if (hash_table->vfp11_erratum_glue_size == 0)
+ {
+ bh = NULL;
+ /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
+ ever requires this erratum fix. */
+ _bfd_generic_link_add_one_symbol (link_info,
+ hash_table->bfd_of_glue_owner, "$a",
+ BSF_LOCAL, s, 0, NULL,
+ TRUE, FALSE, &bh);
+
+ myh = (struct elf_link_hash_entry *) bh;
+ myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
+ myh->forced_local = 1;
+
+ /* The elf32_arm_init_maps function only cares about symbols from input
+ BFDs. We must make a note of this generated mapping symbol
+ ourselves so that code byteswapping works properly in
+ elf32_arm_write_section. */
+ elf32_arm_section_map_add (s, 'a', 0);
+ }
+
+ s->size += VFP11_ERRATUM_VENEER_SIZE;
+ hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
+ hash_table->num_vfp11_fixes++;
+
+ /* The offset of the veneer. */
+ return val;
+}
+
/* Add the glue sections to ABFD. This function is called from the
linker scripts in ld/emultempl/{armelf}.em. */
/* Note: we do not include the flag SEC_LINKER_CREATED, as this
will prevent elf_link_input_bfd() from processing the contents
of this section. */
- flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY;
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_CODE | SEC_READONLY);
sec = bfd_make_section_with_flags (abfd,
ARM2THUMB_GLUE_SECTION_NAME,
if (sec == NULL)
{
- flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
- | SEC_CODE | SEC_READONLY;
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_CODE | SEC_READONLY);
sec = bfd_make_section_with_flags (abfd,
THUMB2ARM_GLUE_SECTION_NAME,
sec->gc_mark = 1;
}
+ sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
+
+ if (sec == NULL)
+ {
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
+ | SEC_CODE | SEC_READONLY);
+
+ sec = bfd_make_section_with_flags (abfd,
+ VFP11_ERRATUM_VENEER_SECTION_NAME,
+ flags);
+
+ if (sec == NULL
+ || !bfd_set_section_alignment (abfd, sec, 2))
+ return FALSE;
+
+ sec->gc_mark = 1;
+ }
+
return TRUE;
}
static void check_use_blx(struct elf32_arm_link_hash_table *globals)
{
- if (elf32_arm_get_eabi_attr_int (globals->obfd, Tag_CPU_arch) > 2)
+ if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
+ Tag_CPU_arch) > 2)
globals->use_blx = 1;
}
bfd_boolean
bfd_elf32_arm_process_before_allocation (bfd *abfd,
- struct bfd_link_info *link_info,
- int byteswap_code)
+ struct bfd_link_info *link_info)
{
Elf_Internal_Shdr *symtab_hdr;
Elf_Internal_Rela *internal_relocs = NULL;
if (link_info->relocatable)
return TRUE;
- /* Here we have a bfd that is to be included on the link. We have a hook
- to do reloc rummaging, before section sizes are nailed down. */
+ /* Here we have a bfd that is to be included on the link. We have a
+ hook to do reloc rummaging, before section sizes are nailed down. */
globals = elf32_arm_hash_table (link_info);
- check_use_blx (globals);
BFD_ASSERT (globals != NULL);
- BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
- if (byteswap_code && !bfd_big_endian (abfd))
+ check_use_blx (globals);
+
+ if (globals->byteswap_code && !bfd_big_endian (abfd))
{
_bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
abfd);
return FALSE;
}
- globals->byteswap_code = byteswap_code;
+
+ /* PR 5398: If we have not decided to include any loadable sections in
+ the output then we will not have a glue owner bfd. This is OK, it
+ just means that there is nothing else for us to do here. */
+ if (globals->bfd_of_glue_owner == NULL)
+ return TRUE;
/* Rummage around all the relocs and map the glue vectors. */
sec = abfd->sections;
if (sec->reloc_count == 0)
continue;
+ if ((sec->flags & SEC_EXCLUDE) != 0)
+ continue;
+
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
/* Load the relocs. */
&& r_type != R_ARM_PLT32
&& r_type != R_ARM_CALL
&& r_type != R_ARM_JUMP24
- && r_type != R_ARM_THM_CALL)
+ && r_type != R_ARM_THM_CALL
+ && r_type != R_ARM_THM_JUMP24)
continue;
/* Get the section contents if we haven't done so already. */
break;
case R_ARM_THM_CALL:
+ case R_ARM_THM_JUMP24:
/* This one is a call from thumb code. We look
up the target of the call. If it is not a thumb
target, we insert glue. */
- if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC && !globals->use_blx)
+ if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC
+ && !(globals->use_blx && r_type == R_ARM_THM_CALL)
+ && h->root.type != bfd_link_hash_undefweak)
record_thumb_to_arm_glue (link_info, h);
break;
#endif
-/* Set target relocation values needed during linking. */
+/* Initialise maps of ARM/Thumb/data for input BFDs. */
void
-bfd_elf32_arm_set_target_relocs (struct bfd_link_info *link_info,
- int target1_is_rel,
- char * target2_type,
- int fix_v4bx,
- int use_blx)
+bfd_elf32_arm_init_maps (bfd *abfd)
{
- struct elf32_arm_link_hash_table *globals;
+ Elf_Internal_Sym *isymbuf;
+ Elf_Internal_Shdr *hdr;
+ unsigned int i, localsyms;
- globals = elf32_arm_hash_table (link_info);
+ if ((abfd->flags & DYNAMIC) != 0)
+ return;
- globals->target1_is_rel = target1_is_rel;
- if (strcmp (target2_type, "rel") == 0)
- globals->target2_reloc = R_ARM_REL32;
- else if (strcmp (target2_type, "abs") == 0)
- globals->target2_reloc = R_ARM_ABS32;
- else if (strcmp (target2_type, "got-rel") == 0)
- globals->target2_reloc = R_ARM_GOT_PREL;
- else
+ hdr = &elf_tdata (abfd)->symtab_hdr;
+ localsyms = hdr->sh_info;
+
+ /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
+ should contain the number of local symbols, which should come before any
+ global symbols. Mapping symbols are always local. */
+ isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
+ NULL);
+
+ /* No internal symbols read? Skip this BFD. */
+ if (isymbuf == NULL)
+ return;
+
+ for (i = 0; i < localsyms; i++)
{
- _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
- target2_type);
+ Elf_Internal_Sym *isym = &isymbuf[i];
+ asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ const char *name;
+
+ if (sec != NULL
+ && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
+ {
+ name = bfd_elf_string_from_elf_section (abfd,
+ hdr->sh_link, isym->st_name);
+
+ if (bfd_is_arm_special_symbol_name (name,
+ BFD_ARM_SPECIAL_SYM_TYPE_MAP))
+ elf32_arm_section_map_add (sec, name[1], isym->st_value);
+ }
}
- globals->fix_v4bx = fix_v4bx;
- globals->use_blx |= use_blx;
}
-/* The thumb form of a long branch is a bit finicky, because the offset
- encoding is split over two fields, each in it's own instruction. They
- can occur in any order. So given a thumb form of long branch, and an
- offset, insert the offset into the thumb branch and return finished
- instruction.
-
- It takes two thumb instructions to encode the target address. Each has
- 11 bits to invest. The upper 11 bits are stored in one (identified by
- H-0.. see below), the lower 11 bits are stored in the other (identified
- by H-1).
-
- Combine together and shifted left by 1 (it's a half word address) and
- there you have it.
- Op: 1111 = F,
- H-0, upper address-0 = 000
- Op: 1111 = F,
- H-1, lower address-0 = 800
+void
+bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
+{
+ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
+ obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
+
+ /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
+ if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
+ {
+ switch (globals->vfp11_fix)
+ {
+ case BFD_ARM_VFP11_FIX_DEFAULT:
+ case BFD_ARM_VFP11_FIX_NONE:
+ globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
+ break;
+
+ default:
+ /* Give a warning, but do as the user requests anyway. */
+ (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
+ "workaround is not necessary for target architecture"), obfd);
+ }
+ }
+ else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
+ /* For earlier architectures, we might need the workaround, but do not
+ enable it by default. If users is running with broken hardware, they
+ must enable the erratum fix explicitly. */
+ globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
+}
- They can be ordered either way, but the arm tools I've seen always put
- the lower one first. It probably doesn't matter. krk@cygnus.com
- XXX: Actually the order does matter. The second instruction (H-1)
- moves the computed address into the PC, so it must be the second one
- in the sequence. The problem, however is that whilst little endian code
- stores the instructions in HI then LOW order, big endian code does the
- reverse. nickc@cygnus.com. */
+enum bfd_arm_vfp11_pipe {
+ VFP11_FMAC,
+ VFP11_LS,
+ VFP11_DS,
+ VFP11_BAD
+};
-#define LOW_HI_ORDER 0xF800F000
-#define HI_LOW_ORDER 0xF000F800
+/* Return a VFP register number. This is encoded as RX:X for single-precision
+ registers, or X:RX for double-precision registers, where RX is the group of
+ four bits in the instruction encoding and X is the single extension bit.
+ RX and X fields are specified using their lowest (starting) bit. The return
+ value is:
-static insn32
-insert_thumb_branch (insn32 br_insn, int rel_off)
+ 0...31: single-precision registers s0...s31
+ 32...63: double-precision registers d0...d31.
+
+ Although X should be zero for VFP11 (encoding d0...d15 only), we might
+ encounter VFP3 instructions, so we allow the full range for DP registers. */
+
+static unsigned int
+bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
+ unsigned int x)
{
- unsigned int low_bits;
- unsigned int high_bits;
-
- BFD_ASSERT ((rel_off & 1) != 1);
-
- rel_off >>= 1; /* Half word aligned address. */
- low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
- high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
-
- if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
- br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
- else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
- br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
+ if (is_double)
+ return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
else
- /* FIXME: abort is probably not the right call. krk@cygnus.com */
- abort (); /* Error - not a valid branch instruction form. */
-
- return br_insn;
+ return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
}
-
-/* Store an Arm insn into an output section not processed by
- elf32_arm_write_section. */
+/* Set bits in *WMASK according to a register number REG as encoded by
+ bfd_arm_vfp11_regno(). Ignore d16-d31. */
static void
-put_arm_insn (struct elf32_arm_link_hash_table *htab,
- bfd * output_bfd, bfd_vma val, void * ptr)
+bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
{
- if (htab->byteswap_code != bfd_little_endian (output_bfd))
- bfd_putl32 (val, ptr);
- else
- bfd_putb32 (val, ptr);
+ if (reg < 32)
+ *wmask |= 1 << reg;
+ else if (reg < 48)
+ *wmask |= 3 << ((reg - 32) * 2);
}
+/* Return TRUE if WMASK overwrites anything in REGS. */
-/* Store a 16-bit Thumb insn into an output section not processed by
- elf32_arm_write_section. */
-
-static void
-put_thumb_insn (struct elf32_arm_link_hash_table *htab,
- bfd * output_bfd, bfd_vma val, void * ptr)
+static bfd_boolean
+bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
{
- if (htab->byteswap_code != bfd_little_endian (output_bfd))
- bfd_putl16 (val, ptr);
- else
- bfd_putb16 (val, ptr);
-}
+ int i;
+
+ for (i = 0; i < numregs; i++)
+ {
+ unsigned int reg = regs[i];
+
+ if (reg < 32 && (wmask & (1 << reg)) != 0)
+ return TRUE;
+
+ reg -= 32;
+
+ if (reg >= 16)
+ continue;
+
+ if ((wmask & (3 << (reg * 2))) != 0)
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/* In this function, we're interested in two things: finding input registers
+ for VFP data-processing instructions, and finding the set of registers which
+ arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
+ hold the written set, so FLDM etc. are easy to deal with (we're only
+ interested in 32 SP registers or 16 dp registers, due to the VFP version
+ implemented by the chip in question). DP registers are marked by setting
+ both SP registers in the write mask). */
+
+static enum bfd_arm_vfp11_pipe
+bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
+ int *numregs)
+{
+ enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
+ bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
+
+ if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
+ {
+ unsigned int pqrs;
+ unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
+ unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
+
+ pqrs = ((insn & 0x00800000) >> 20)
+ | ((insn & 0x00300000) >> 19)
+ | ((insn & 0x00000040) >> 6);
+
+ switch (pqrs)
+ {
+ case 0: /* fmac[sd]. */
+ case 1: /* fnmac[sd]. */
+ case 2: /* fmsc[sd]. */
+ case 3: /* fnmsc[sd]. */
+ pipe = VFP11_FMAC;
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ regs[0] = fd;
+ regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
+ regs[2] = fm;
+ *numregs = 3;
+ break;
+
+ case 4: /* fmul[sd]. */
+ case 5: /* fnmul[sd]. */
+ case 6: /* fadd[sd]. */
+ case 7: /* fsub[sd]. */
+ pipe = VFP11_FMAC;
+ goto vfp_binop;
+
+ case 8: /* fdiv[sd]. */
+ pipe = VFP11_DS;
+ vfp_binop:
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
+ regs[1] = fm;
+ *numregs = 2;
+ break;
+
+ case 15: /* extended opcode. */
+ {
+ unsigned int extn = ((insn >> 15) & 0x1e)
+ | ((insn >> 7) & 1);
+
+ switch (extn)
+ {
+ case 0: /* fcpy[sd]. */
+ case 1: /* fabs[sd]. */
+ case 2: /* fneg[sd]. */
+ case 8: /* fcmp[sd]. */
+ case 9: /* fcmpe[sd]. */
+ case 10: /* fcmpz[sd]. */
+ case 11: /* fcmpez[sd]. */
+ case 16: /* fuito[sd]. */
+ case 17: /* fsito[sd]. */
+ case 24: /* ftoui[sd]. */
+ case 25: /* ftouiz[sd]. */
+ case 26: /* ftosi[sd]. */
+ case 27: /* ftosiz[sd]. */
+ /* These instructions will not bounce due to underflow. */
+ *numregs = 0;
+ pipe = VFP11_FMAC;
+ break;
+
+ case 3: /* fsqrt[sd]. */
+ /* fsqrt cannot underflow, but it can (perhaps) overwrite
+ registers to cause the erratum in previous instructions. */
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ pipe = VFP11_DS;
+ break;
+
+ case 15: /* fcvt{ds,sd}. */
+ {
+ int rnum = 0;
+
+ bfd_arm_vfp11_write_mask (destmask, fd);
+
+ /* Only FCVTSD can underflow. */
+ if ((insn & 0x100) != 0)
+ regs[rnum++] = fm;
+
+ *numregs = rnum;
+
+ pipe = VFP11_FMAC;
+ }
+ break;
+
+ default:
+ return VFP11_BAD;
+ }
+ }
+ break;
+
+ default:
+ return VFP11_BAD;
+ }
+ }
+ /* Two-register transfer. */
+ else if ((insn & 0x0fe00ed0) == 0x0c400a10)
+ {
+ unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
+
+ if ((insn & 0x100000) == 0)
+ {
+ if (is_double)
+ bfd_arm_vfp11_write_mask (destmask, fm);
+ else
+ {
+ bfd_arm_vfp11_write_mask (destmask, fm);
+ bfd_arm_vfp11_write_mask (destmask, fm + 1);
+ }
+ }
+
+ pipe = VFP11_LS;
+ }
+ else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
+ {
+ int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
+ unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
+
+ switch (puw)
+ {
+ case 0: /* Two-reg transfer. We should catch these above. */
+ abort ();
+
+ case 2: /* fldm[sdx]. */
+ case 3:
+ case 5:
+ {
+ unsigned int i, offset = insn & 0xff;
+
+ if (is_double)
+ offset >>= 1;
+
+ for (i = fd; i < fd + offset; i++)
+ bfd_arm_vfp11_write_mask (destmask, i);
+ }
+ break;
+
+ case 4: /* fld[sd]. */
+ case 6:
+ bfd_arm_vfp11_write_mask (destmask, fd);
+ break;
+
+ default:
+ return VFP11_BAD;
+ }
+
+ pipe = VFP11_LS;
+ }
+ /* Single-register transfer. Note L==0. */
+ else if ((insn & 0x0f100e10) == 0x0e000a10)
+ {
+ unsigned int opcode = (insn >> 21) & 7;
+ unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
+
+ switch (opcode)
+ {
+ case 0: /* fmsr/fmdlr. */
+ case 1: /* fmdhr. */
+ /* Mark fmdhr and fmdlr as writing to the whole of the DP
+ destination register. I don't know if this is exactly right,
+ but it is the conservative choice. */
+ bfd_arm_vfp11_write_mask (destmask, fn);
+ break;
+
+ case 7: /* fmxr. */
+ break;
+ }
+
+ pipe = VFP11_LS;
+ }
+
+ return pipe;
+}
+
+
+static int elf32_arm_compare_mapping (const void * a, const void * b);
+
+
+/* Look for potentially-troublesome code sequences which might trigger the
+ VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
+ (available from ARM) for details of the erratum. A short version is
+ described in ld.texinfo. */
+
+bfd_boolean
+bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
+{
+ asection *sec;
+ bfd_byte *contents = NULL;
+ int state = 0;
+ int regs[3], numregs = 0;
+ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
+ int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
+
+ /* We use a simple FSM to match troublesome VFP11 instruction sequences.
+ The states transition as follows:
+
+ 0 -> 1 (vector) or 0 -> 2 (scalar)
+ A VFP FMAC-pipeline instruction has been seen. Fill
+ regs[0]..regs[numregs-1] with its input operands. Remember this
+ instruction in 'first_fmac'.
+
+ 1 -> 2
+ Any instruction, except for a VFP instruction which overwrites
+ regs[*].
+
+ 1 -> 3 [ -> 0 ] or
+ 2 -> 3 [ -> 0 ]
+ A VFP instruction has been seen which overwrites any of regs[*].
+ We must make a veneer! Reset state to 0 before examining next
+ instruction.
+
+ 2 -> 0
+ If we fail to match anything in state 2, reset to state 0 and reset
+ the instruction pointer to the instruction after 'first_fmac'.
+
+ If the VFP11 vector mode is in use, there must be at least two unrelated
+ instructions between anti-dependent VFP11 instructions to properly avoid
+ triggering the erratum, hence the use of the extra state 1.
+ */
+
+ /* If we are only performing a partial link do not bother
+ to construct any glue. */
+ if (link_info->relocatable)
+ return TRUE;
+
+ /* We should have chosen a fix type by the time we get here. */
+ BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
+
+ if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
+ return TRUE;
+
+ /* Skip if this bfd does not correspond to an ELF image. */
+ if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
+ return TRUE;
+
+ for (sec = abfd->sections; sec != NULL; sec = sec->next)
+ {
+ unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
+ struct _arm_elf_section_data *sec_data;
+
+ /* If we don't have executable progbits, we're not interested in this
+ section. Also skip if section is to be excluded. */
+ if (elf_section_type (sec) != SHT_PROGBITS
+ || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
+ || (sec->flags & SEC_EXCLUDE) != 0
+ || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
+ continue;
+
+ sec_data = elf32_arm_section_data (sec);
+
+ if (sec_data->mapcount == 0)
+ continue;
+
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+
+ qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
+ elf32_arm_compare_mapping);
+
+ for (span = 0; span < sec_data->mapcount; span++)
+ {
+ unsigned int span_start = sec_data->map[span].vma;
+ unsigned int span_end = (span == sec_data->mapcount - 1)
+ ? sec->size : sec_data->map[span + 1].vma;
+ char span_type = sec_data->map[span].type;
+
+ /* FIXME: Only ARM mode is supported at present. We may need to
+ support Thumb-2 mode also at some point. */
+ if (span_type != 'a')
+ continue;
+
+ for (i = span_start; i < span_end;)
+ {
+ unsigned int next_i = i + 4;
+ unsigned int insn = bfd_big_endian (abfd)
+ ? (contents[i] << 24)
+ | (contents[i + 1] << 16)
+ | (contents[i + 2] << 8)
+ | contents[i + 3]
+ : (contents[i + 3] << 24)
+ | (contents[i + 2] << 16)
+ | (contents[i + 1] << 8)
+ | contents[i];
+ unsigned int writemask = 0;
+ enum bfd_arm_vfp11_pipe pipe;
+
+ switch (state)
+ {
+ case 0:
+ pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
+ &numregs);
+ /* I'm assuming the VFP11 erratum can trigger with denorm
+ operands on either the FMAC or the DS pipeline. This might
+ lead to slightly overenthusiastic veneer insertion. */
+ if (pipe == VFP11_FMAC || pipe == VFP11_DS)
+ {
+ state = use_vector ? 1 : 2;
+ first_fmac = i;
+ veneer_of_insn = insn;
+ }
+ break;
+
+ case 1:
+ {
+ int other_regs[3], other_numregs;
+ pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
+ other_regs,
+ &other_numregs);
+ if (pipe != VFP11_BAD
+ && bfd_arm_vfp11_antidependency (writemask, regs,
+ numregs))
+ state = 3;
+ else
+ state = 2;
+ }
+ break;
+
+ case 2:
+ {
+ int other_regs[3], other_numregs;
+ pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
+ other_regs,
+ &other_numregs);
+ if (pipe != VFP11_BAD
+ && bfd_arm_vfp11_antidependency (writemask, regs,
+ numregs))
+ state = 3;
+ else
+ {
+ state = 0;
+ next_i = first_fmac + 4;
+ }
+ }
+ break;
+
+ case 3:
+ abort (); /* Should be unreachable. */
+ }
+
+ if (state == 3)
+ {
+ elf32_vfp11_erratum_list *newerr
+ = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
+ int errcount;
+
+ errcount = ++(elf32_arm_section_data (sec)->erratumcount);
+
+ newerr->u.b.vfp_insn = veneer_of_insn;
+
+ switch (span_type)
+ {
+ case 'a':
+ newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
+ break;
+
+ default:
+ abort ();
+ }
+
+ record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
+ first_fmac);
+
+ newerr->vma = -1;
+
+ newerr->next = sec_data->erratumlist;
+ sec_data->erratumlist = newerr;
+
+ state = 0;
+ }
+
+ i = next_i;
+ }
+ }
+
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+ contents = NULL;
+ }
+
+ return TRUE;
+
+error_return:
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+
+ return FALSE;
+}
+
+/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
+ after sections have been laid out, using specially-named symbols. */
+
+void
+bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
+ struct bfd_link_info *link_info)
+{
+ asection *sec;
+ struct elf32_arm_link_hash_table *globals;
+ char *tmp_name;
+
+ if (link_info->relocatable)
+ return;
+
+ /* Skip if this bfd does not correspond to an ELF image. */
+ if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
+ return;
+
+ globals = elf32_arm_hash_table (link_info);
+
+ tmp_name = bfd_malloc ((bfd_size_type) strlen
+ (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
+
+ for (sec = abfd->sections; sec != NULL; sec = sec->next)
+ {
+ struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
+ elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
+
+ for (; errnode != NULL; errnode = errnode->next)
+ {
+ struct elf_link_hash_entry *myh;
+ bfd_vma vma;
+
+ switch (errnode->type)
+ {
+ case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
+ case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
+ /* Find veneer symbol. */
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
+ errnode->u.b.veneer->u.v.id);
+
+ myh = elf_link_hash_lookup
+ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
+
+ if (myh == NULL)
+ (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
+ "`%s'"), abfd, tmp_name);
+
+ vma = myh->root.u.def.section->output_section->vma
+ + myh->root.u.def.section->output_offset
+ + myh->root.u.def.value;
+
+ errnode->u.b.veneer->vma = vma;
+ break;
+
+ case VFP11_ERRATUM_ARM_VENEER:
+ case VFP11_ERRATUM_THUMB_VENEER:
+ /* Find return location. */
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
+ errnode->u.v.id);
+
+ myh = elf_link_hash_lookup
+ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
+
+ if (myh == NULL)
+ (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
+ "`%s'"), abfd, tmp_name);
+
+ vma = myh->root.u.def.section->output_section->vma
+ + myh->root.u.def.section->output_offset
+ + myh->root.u.def.value;
+
+ errnode->u.v.branch->vma = vma;
+ break;
+
+ default:
+ abort ();
+ }
+ }
+ }
+
+ free (tmp_name);
+}
+
+
+/* Set target relocation values needed during linking. */
+
+void
+bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
+ struct bfd_link_info *link_info,
+ int target1_is_rel,
+ char * target2_type,
+ int fix_v4bx,
+ int use_blx,
+ bfd_arm_vfp11_fix vfp11_fix,
+ int no_enum_warn, int pic_veneer)
+{
+ struct elf32_arm_link_hash_table *globals;
+
+ globals = elf32_arm_hash_table (link_info);
+
+ globals->target1_is_rel = target1_is_rel;
+ if (strcmp (target2_type, "rel") == 0)
+ globals->target2_reloc = R_ARM_REL32;
+ else if (strcmp (target2_type, "abs") == 0)
+ globals->target2_reloc = R_ARM_ABS32;
+ else if (strcmp (target2_type, "got-rel") == 0)
+ globals->target2_reloc = R_ARM_GOT_PREL;
+ else
+ {
+ _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
+ target2_type);
+ }
+ globals->fix_v4bx = fix_v4bx;
+ globals->use_blx |= use_blx;
+ globals->vfp11_fix = vfp11_fix;
+ globals->pic_veneer = pic_veneer;
+
+ elf32_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
+}
+
+/* The thumb form of a long branch is a bit finicky, because the offset
+ encoding is split over two fields, each in it's own instruction. They
+ can occur in any order. So given a thumb form of long branch, and an
+ offset, insert the offset into the thumb branch and return finished
+ instruction.
+
+ It takes two thumb instructions to encode the target address. Each has
+ 11 bits to invest. The upper 11 bits are stored in one (identified by
+ H-0.. see below), the lower 11 bits are stored in the other (identified
+ by H-1).
+
+ Combine together and shifted left by 1 (it's a half word address) and
+ there you have it.
+
+ Op: 1111 = F,
+ H-0, upper address-0 = 000
+ Op: 1111 = F,
+ H-1, lower address-0 = 800
+
+ They can be ordered either way, but the arm tools I've seen always put
+ the lower one first. It probably doesn't matter. krk@cygnus.com
+
+ XXX: Actually the order does matter. The second instruction (H-1)
+ moves the computed address into the PC, so it must be the second one
+ in the sequence. The problem, however is that whilst little endian code
+ stores the instructions in HI then LOW order, big endian code does the
+ reverse. nickc@cygnus.com. */
+
+#define LOW_HI_ORDER 0xF800F000
+#define HI_LOW_ORDER 0xF000F800
+
+static insn32
+insert_thumb_branch (insn32 br_insn, int rel_off)
+{
+ unsigned int low_bits;
+ unsigned int high_bits;
+
+ BFD_ASSERT ((rel_off & 1) != 1);
+
+ rel_off >>= 1; /* Half word aligned address. */
+ low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
+ high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
+
+ if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
+ br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
+ else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
+ br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
+ else
+ /* FIXME: abort is probably not the right call. krk@cygnus.com */
+ abort (); /* Error - not a valid branch instruction form. */
+
+ return br_insn;
+}
+
+
+/* Store an Arm insn into an output section not processed by
+ elf32_arm_write_section. */
+
+static void
+put_arm_insn (struct elf32_arm_link_hash_table *htab,
+ bfd * output_bfd, bfd_vma val, void * ptr)
+{
+ if (htab->byteswap_code != bfd_little_endian (output_bfd))
+ bfd_putl32 (val, ptr);
+ else
+ bfd_putb32 (val, ptr);
+}
+
+
+/* Store a 16-bit Thumb insn into an output section not processed by
+ elf32_arm_write_section. */
+
+static void
+put_thumb_insn (struct elf32_arm_link_hash_table *htab,
+ bfd * output_bfd, bfd_vma val, void * ptr)
+{
+ if (htab->byteswap_code != bfd_little_endian (output_bfd))
+ bfd_putl16 (val, ptr);
+ else
+ bfd_putb16 (val, ptr);
+}
/* Thumb code calling an ARM function. */
asection * sym_sec,
bfd_vma offset,
bfd_signed_vma addend,
- bfd_vma val)
+ bfd_vma val,
+ char **error_message)
{
asection * s = 0;
bfd_vma my_offset;
struct elf_link_hash_entry * myh;
struct elf32_arm_link_hash_table * globals;
- myh = find_thumb_glue (info, name, input_bfd);
+ myh = find_thumb_glue (info, name, error_message);
if (myh == NULL)
return FALSE;
bfd * output_bfd,
asection * sym_sec,
bfd_vma val,
- asection *s)
+ asection *s,
+ char **error_message)
{
bfd_vma my_offset;
long int ret_offset;
struct elf_link_hash_entry * myh;
struct elf32_arm_link_hash_table * globals;
- myh = find_arm_glue (info, name, input_bfd);
+ myh = find_arm_glue (info, name, error_message);
if (myh == NULL)
return NULL;
--my_offset;
myh->root.u.def.value = my_offset;
- if ((info->shared || globals->root.is_relocatable_executable))
+ if (info->shared || globals->root.is_relocatable_executable
+ || globals->pic_veneer)
{
/* For relocatable objects we can't use absolute addresses,
so construct the address from a relative offset. */
bfd_put_32 (output_bfd, ret_offset,
s->contents + my_offset + 12);
}
+ else if (globals->use_blx)
+ {
+ put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
+ s->contents + my_offset);
+
+ /* It's a thumb address. Add the low order bit. */
+ bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
+ s->contents + my_offset + 4);
+ }
else
{
put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
asection * sym_sec,
bfd_vma offset,
bfd_signed_vma addend,
- bfd_vma val)
+ bfd_vma val,
+ char **error_message)
{
unsigned long int tmp;
bfd_vma my_offset;
BFD_ASSERT (s->output_section != NULL);
myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
- sym_sec, val, s);
+ sym_sec, val, s, error_message);
if (!myh)
return FALSE;
struct elf32_arm_link_hash_table * globals;
asection *sec;
bfd_vma val;
+ char *error_message;
eh = elf32_arm_hash_entry(h);
/* Allocate stubs for exported Thumb functions on v4t. */
BFD_ASSERT (s->output_section != NULL);
sec = eh->export_glue->root.u.def.section;
+
+ BFD_ASSERT (sec->output_section != NULL);
+
val = eh->export_glue->root.u.def.value + sec->output_offset
+ sec->output_section->vma;
myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
h->root.u.def.section->owner,
- globals->obfd, sec, val, s);
+ globals->obfd, sec, val, s,
+ &error_message);
BFD_ASSERT (myh);
return TRUE;
}
return 0;
}
+/* Determine if we're dealing with a Thumb-2 object. */
+
+static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
+{
+ int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
+ Tag_CPU_arch);
+ return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
+}
+
/* Perform a relocation as part of a final link. */
static bfd_reloc_status_type
const char * sym_name,
int sym_flags,
struct elf_link_hash_entry * h,
- bfd_boolean * unresolved_reloc_p)
+ bfd_boolean * unresolved_reloc_p,
+ char **error_message)
{
unsigned long r_type = howto->type;
unsigned long r_symndx;
case R_ARM_PC24:
case R_ARM_ABS32:
+ case R_ARM_ABS32_NOI:
case R_ARM_REL32:
+ case R_ARM_REL32_NOI:
case R_ARM_CALL:
case R_ARM_JUMP24:
case R_ARM_XPC25:
case R_ARM_PREL31:
case R_ARM_PLT32:
- /* r_symndx will be zero only for relocs against symbols
- from removed linkonce sections, or sections discarded by
- a linker script. */
- if (r_symndx == 0)
- return bfd_reloc_ok;
-
/* Handle relocations which should use the PLT entry. ABS32/REL32
will use the symbol's value, which may point to a PLT entry, but we
don't need to handle that here. If we created a PLT entry, all
branches in this object should go to it. */
- if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32)
+ if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
+ && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
&& h != NULL
&& splt != NULL
&& h->plt.offset != (bfd_vma) -1)
run time. */
if ((info->shared || globals->root.is_relocatable_executable)
&& (input_section->flags & SEC_ALLOC)
- && (r_type != R_ARM_REL32
+ && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
|| !SYMBOL_CALLS_LOCAL (info, h))
&& (h == NULL
|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
value |= 1;
if (globals->symbian_p)
{
+ asection *osec;
+
/* On Symbian OS, the data segment and text segement
can be relocated independently. Therefore, we
must indicate the segment to which this
use any symbol in the right segment; we just use
the section symbol as it is convenient. (We
cannot use the symbol given by "h" directly as it
- will not appear in the dynamic symbol table.) */
+ will not appear in the dynamic symbol table.)
+
+ Note that the dynamic linker ignores the section
+ symbol value, so we don't subtract osec->vma
+ from the emitted reloc addend. */
if (sym_sec)
- symbol = elf_section_data (sym_sec->output_section)->dynindx;
+ osec = sym_sec->output_section;
else
- symbol = elf_section_data (input_section->output_section)->dynindx;
+ osec = input_section->output_section;
+ symbol = elf_section_data (osec)->dynindx;
+ if (symbol == 0)
+ {
+ struct elf_link_hash_table *htab = elf_hash_table (info);
+
+ if ((osec->flags & SEC_READONLY) == 0
+ && htab->data_index_section != NULL)
+ osec = htab->data_index_section;
+ else
+ osec = htab->text_index_section;
+ symbol = elf_section_data (osec)->dynindx;
+ }
BFD_ASSERT (symbol != 0);
}
else
/* Check for Arm calling Thumb function. */
if (sym_flags == STT_ARM_TFUNC)
{
- elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
- output_bfd, input_section,
- hit_data, sym_sec, rel->r_offset,
- signed_addend, value);
- return bfd_reloc_ok;
+ if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
+ output_bfd, input_section,
+ hit_data, sym_sec, rel->r_offset,
+ signed_addend, value,
+ error_message))
+ return bfd_reloc_ok;
+ else
+ return bfd_reloc_dangerous;
}
}
signed_addend = value;
signed_addend >>= howto->rightshift;
- /* It is not an error for an undefined weak reference to be
- out of range. Any program that branches to such a symbol
- is going to crash anyway, so there is no point worrying
- about getting the destination exactly right. */
- if (! h || h->root.type != bfd_link_hash_undefweak)
+ /* A branch to an undefined weak symbol is turned into a jump to
+ the next instruction. */
+ if (h && h->root.type == bfd_link_hash_undefweak)
+ {
+ value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
+ | 0x0affffff;
+ }
+ else
{
/* Perform a signed range check. */
if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
|| signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
return bfd_reloc_overflow;
- }
- addend = (value & 2);
+ addend = (value & 2);
- value = (signed_addend & howto->dst_mask)
- | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
+ value = (signed_addend & howto->dst_mask)
+ | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
- /* Set the H bit in the BLX instruction. */
- if (sym_flags == STT_ARM_TFUNC)
- {
- if (addend)
- value |= (1 << 24);
- else
- value &= ~(bfd_vma)(1 << 24);
- }
- if (r_type == R_ARM_CALL)
- {
- /* Select the correct instruction (BL or BLX). */
+ /* Set the H bit in the BLX instruction. */
if (sym_flags == STT_ARM_TFUNC)
- value |= (1 << 28);
- else
{
- value &= ~(bfd_vma)(1 << 28);
- value |= (1 << 24);
+ if (addend)
+ value |= (1 << 24);
+ else
+ value &= ~(bfd_vma)(1 << 24);
+ }
+ if (r_type == R_ARM_CALL)
+ {
+ /* Select the correct instruction (BL or BLX). */
+ if (sym_flags == STT_ARM_TFUNC)
+ value |= (1 << 28);
+ else
+ {
+ value &= ~(bfd_vma)(1 << 28);
+ value |= (1 << 24);
+ }
}
}
break;
value |= 1;
break;
+ case R_ARM_ABS32_NOI:
+ value += addend;
+ break;
+
case R_ARM_REL32:
value += addend;
if (sym_flags == STT_ARM_TFUNC)
+ input_section->output_offset + rel->r_offset);
break;
+ case R_ARM_REL32_NOI:
+ value += addend;
+ value -= (input_section->output_section->vma
+ + input_section->output_offset + rel->r_offset);
+ break;
+
case R_ARM_PREL31:
value -= (input_section->output_section->vma
+ input_section->output_offset + rel->r_offset);
case R_ARM_THM_XPC22:
case R_ARM_THM_CALL:
+ case R_ARM_THM_JUMP24:
/* Thumb BL (branch long instruction). */
{
bfd_vma relocation;
+ bfd_vma reloc_sign;
bfd_boolean overflow = FALSE;
bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
- bfd_signed_vma reloc_signed_max = ((1 << (howto->bitsize - 1)) - 1) >> howto->rightshift;
- bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
+ bfd_signed_vma reloc_signed_max;
+ bfd_signed_vma reloc_signed_min;
bfd_vma check;
bfd_signed_vma signed_check;
+ int bitsize;
+ int thumb2 = using_thumb2 (globals);
+
+ /* A branch to an undefined weak symbol is turned into a jump to
+ the next instruction. */
+ if (h && h->root.type == bfd_link_hash_undefweak)
+ {
+ bfd_put_16 (input_bfd, 0xe000, hit_data);
+ bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
+ return bfd_reloc_ok;
+ }
- /* Need to refetch the addend and squish the two 11 bit pieces
- together. */
+ /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
+ with Thumb-1) involving the J1 and J2 bits. */
if (globals->use_rel)
{
- bfd_vma upper = upper_insn & 0x7ff;
- bfd_vma lower = lower_insn & 0x7ff;
- upper = (upper ^ 0x400) - 0x400; /* Sign extend. */
- addend = (upper << 12) | (lower << 1);
+ bfd_vma s = (upper_insn & (1 << 10)) >> 10;
+ bfd_vma upper = upper_insn & 0x3ff;
+ bfd_vma lower = lower_insn & 0x7ff;
+ bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
+ bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
+ bfd_vma i1 = j1 ^ s ? 0 : 1;
+ bfd_vma i2 = j2 ^ s ? 0 : 1;
+
+ addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
+ /* Sign extend. */
+ addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
+
signed_addend = addend;
}
&& (h == NULL || splt == NULL
|| h->plt.offset == (bfd_vma) -1))
{
- if (globals->use_blx)
+ if (globals->use_blx && r_type == R_ARM_THM_CALL)
{
/* Convert BL to BLX. */
lower_insn = (lower_insn & ~0x1000) | 0x0800;
}
else if (elf32_thumb_to_arm_stub
(info, sym_name, input_bfd, output_bfd, input_section,
- hit_data, sym_sec, rel->r_offset, signed_addend, value))
+ hit_data, sym_sec, rel->r_offset, signed_addend, value,
+ error_message))
return bfd_reloc_ok;
else
return bfd_reloc_dangerous;
}
- else if (sym_flags == STT_ARM_TFUNC && globals->use_blx)
+ else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
+ && r_type == R_ARM_THM_CALL)
{
/* Make sure this is a BL. */
lower_insn |= 0x1800;
value = (splt->output_section->vma
+ splt->output_offset
+ h->plt.offset);
- if (globals->use_blx)
+ if (globals->use_blx && r_type == R_ARM_THM_CALL)
{
/* If the Thumb BLX instruction is available, convert the
BL to a BLX instruction to call the ARM-mode PLT entry. */
else
signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
+ /* Calculate the permissable maximum and minimum values for
+ this relocation according to whether we're relocating for
+ Thumb-2 or not. */
+ bitsize = howto->bitsize;
+ if (!thumb2)
+ bitsize -= 2;
+ reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
+ reloc_signed_min = ~reloc_signed_max;
+
/* Assumes two's complement. */
if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
overflow = TRUE;
- if ((lower_insn & 0x1800) == 0x0800)
+ if ((lower_insn & 0x5000) == 0x4000)
/* For a BLX instruction, make sure that the relocation is rounded up
to a word boundary. This follows the semantics of the instruction
which specifies that bit 1 of the target address will come from bit
1 of the base address. */
relocation = (relocation + 2) & ~ 3;
- /* Put RELOCATION back into the insn. */
- upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) | ((relocation >> 12) & 0x7ff);
- lower_insn = (lower_insn & ~(bfd_vma) 0x7ff) | ((relocation >> 1) & 0x7ff);
+ /* Put RELOCATION back into the insn. Assumes two's complement.
+ We use the Thumb-2 encoding, which is safe even if dealing with
+ a Thumb-1 instruction by virtue of our overflow check above. */
+ reloc_sign = (signed_check < 0) ? 1 : 0;
+ upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
+ | ((relocation >> 12) & 0x3ff)
+ | (reloc_sign << 10);
+ lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
+ | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
+ | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
+ | ((relocation >> 1) & 0x7ff);
/* Put the relocated value back in the object file: */
bfd_put_16 (input_bfd, upper_insn, hit_data);
}
break;
- case R_ARM_THM_JUMP24:
- /* Thumb32 unconditional branch instruction. */
- {
- bfd_vma relocation;
- bfd_boolean overflow = FALSE;
- bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
- bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
- bfd_signed_vma reloc_signed_max = ((1 << (howto->bitsize - 1)) - 1) >> howto->rightshift;
- bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
- bfd_vma check;
- bfd_signed_vma signed_check;
-
- /* Need to refetch the addend, reconstruct the top three bits, and glue the
- two pieces together. */
- if (globals->use_rel)
- {
- bfd_vma S = (upper_insn & 0x0400) >> 10;
- bfd_vma hi = (upper_insn & 0x03ff);
- bfd_vma I1 = (lower_insn & 0x2000) >> 13;
- bfd_vma I2 = (lower_insn & 0x0800) >> 11;
- bfd_vma lo = (lower_insn & 0x07ff);
-
- I1 = !(I1 ^ S);
- I2 = !(I2 ^ S);
- S = !S;
-
- signed_addend = (S << 24) | (I1 << 23) | (I2 << 22) | (hi << 12) | (lo << 1);
- signed_addend -= (1 << 24); /* Sign extend. */
- }
-
- /* ??? Should handle interworking? GCC might someday try to
- use this for tail calls. */
-
- relocation = value + signed_addend;
- relocation -= (input_section->output_section->vma
- + input_section->output_offset
- + rel->r_offset);
-
- check = relocation >> howto->rightshift;
-
- /* If this is a signed value, the rightshift just dropped
- leading 1 bits (assuming twos complement). */
- if ((bfd_signed_vma) relocation >= 0)
- signed_check = check;
- else
- signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
-
- /* Assumes two's complement. */
- if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
- overflow = TRUE;
-
- /* Put RELOCATION back into the insn. */
- {
- bfd_vma S = (relocation & 0x01000000) >> 24;
- bfd_vma I1 = (relocation & 0x00800000) >> 23;
- bfd_vma I2 = (relocation & 0x00400000) >> 22;
- bfd_vma hi = (relocation & 0x003ff000) >> 12;
- bfd_vma lo = (relocation & 0x00000ffe) >> 1;
-
- I1 = !(I1 ^ S);
- I2 = !(I2 ^ S);
-
- upper_insn = (upper_insn & (bfd_vma) 0xf800) | (S << 10) | hi;
- lower_insn = (lower_insn & (bfd_vma) 0xd000) | (I1 << 13) | (I2 << 11) | lo;
- }
-
- /* Put the relocated value back in the object file: */
- bfd_put_16 (input_bfd, upper_insn, hit_data);
- bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
-
- return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
- }
-
case R_ARM_THM_JUMP19:
/* Thumb32 conditional branch instruction. */
{
bfd_boolean overflow = FALSE;
bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
- bfd_signed_vma reloc_signed_max = ((1 << (howto->bitsize - 1)) - 1) >> howto->rightshift;
- bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
- bfd_vma check;
+ bfd_signed_vma reloc_signed_max = 0xffffe;
+ bfd_signed_vma reloc_signed_min = -0x100000;
bfd_signed_vma signed_check;
/* Need to refetch the addend, reconstruct the top three bits,
if (globals->use_rel)
{
bfd_vma S = (upper_insn & 0x0400) >> 10;
- bfd_vma upper = (upper_insn & 0x001f);
+ bfd_vma upper = (upper_insn & 0x003f);
bfd_vma J1 = (lower_insn & 0x2000) >> 13;
bfd_vma J2 = (lower_insn & 0x0800) >> 11;
bfd_vma lower = (lower_insn & 0x07ff);
- upper |= J2 << 6;
- upper |= J1 << 7;
- upper |= ~S << 8;
+ upper |= J1 << 6;
+ upper |= J2 << 7;
+ upper |= (!S) << 8;
upper -= 0x0100; /* Sign extend. */
addend = (upper << 12) | (lower << 1);
signed_addend = addend;
}
+ /* Handle calls via the PLT. */
+ if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
+ {
+ value = (splt->output_section->vma
+ + splt->output_offset
+ + h->plt.offset);
+ /* Target the Thumb stub before the ARM PLT entry. */
+ value -= PLT_THUMB_STUB_SIZE;
+ *unresolved_reloc_p = FALSE;
+ }
+
/* ??? Should handle interworking? GCC might someday try to
use this for tail calls. */
relocation -= (input_section->output_section->vma
+ input_section->output_offset
+ rel->r_offset);
+ signed_check = (bfd_signed_vma) relocation;
- check = relocation >> howto->rightshift;
-
- /* If this is a signed value, the rightshift just dropped
- leading 1 bits (assuming twos complement). */
- if ((bfd_signed_vma) relocation >= 0)
- signed_check = check;
- else
- signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
-
- /* Assumes two's complement. */
if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
overflow = TRUE;
bfd_vma hi = (relocation & 0x0003f000) >> 12;
bfd_vma lo = (relocation & 0x00000ffe) >> 1;
- upper_insn = (upper_insn & 0xfb30) | (S << 10) | hi;
+ upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
}
case R_ARM_MOVT_ABS:
case R_ARM_MOVW_PREL_NC:
case R_ARM_MOVT_PREL:
+ /* Until we properly support segment-base-relative addressing then
+ we assume the segment base to be zero, as for the group relocations.
+ Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
+ and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
+ case R_ARM_MOVW_BREL_NC:
+ case R_ARM_MOVW_BREL:
+ case R_ARM_MOVT_BREL:
{
bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
signed_addend = (addend ^ 0x10000) - 0x10000;
}
+
value += signed_addend;
- if (sym_flags == STT_ARM_TFUNC)
- value |= 1;
if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
value -= (input_section->output_section->vma
+ input_section->output_offset + rel->r_offset);
- if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL)
+ if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
+ return bfd_reloc_overflow;
+
+ if (sym_flags == STT_ARM_TFUNC)
+ value |= 1;
+
+ if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
+ || r_type == R_ARM_MOVT_BREL)
value >>= 16;
insn &= 0xfff0f000;
case R_ARM_THM_MOVT_ABS:
case R_ARM_THM_MOVW_PREL_NC:
case R_ARM_THM_MOVT_PREL:
+ /* Until we properly support segment-base-relative addressing then
+ we assume the segment base to be zero, as for the above relocations.
+ Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
+ R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
+ as R_ARM_THM_MOVT_ABS. */
+ case R_ARM_THM_MOVW_BREL_NC:
+ case R_ARM_THM_MOVW_BREL:
+ case R_ARM_THM_MOVT_BREL:
{
bfd_vma insn;
| (insn & 0x00ff);
signed_addend = (addend ^ 0x10000) - 0x10000;
}
+
value += signed_addend;
- if (sym_flags == STT_ARM_TFUNC)
- value |= 1;
if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
value -= (input_section->output_section->vma
+ input_section->output_offset + rel->r_offset);
- if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL)
+ if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
+ return bfd_reloc_overflow;
+
+ if (sym_flags == STT_ARM_TFUNC)
+ value |= 1;
+
+ if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
+ || r_type == R_ARM_THM_MOVT_BREL)
value >>= 16;
insn &= 0xfbf08f00;
}
}
-
-static int
-uleb128_size (unsigned int i)
-{
- int size;
- size = 1;
- while (i >= 0x80)
- {
- i >>= 7;
- size++;
- }
- return size;
-}
-
-/* Return TRUE if the attribute has the default value (0/""). */
-static bfd_boolean
-is_default_attr (aeabi_attribute *attr)
-{
- if ((attr->type & 1) && attr->i != 0)
- return FALSE;
- if ((attr->type & 2) && attr->s && *attr->s)
- return FALSE;
-
- return TRUE;
-}
-
-/* Return the size of a single attribute. */
-static bfd_vma
-eabi_attr_size(int tag, aeabi_attribute *attr)
-{
- bfd_vma size;
-
- if (is_default_attr (attr))
- return 0;
-
- size = uleb128_size (tag);
- if (attr->type & 1)
- size += uleb128_size (attr->i);
- if (attr->type & 2)
- size += strlen ((char *)attr->s) + 1;
- return size;
-}
-
-/* Returns the size of the eabi object attributess section. */
-bfd_vma
-elf32_arm_eabi_attr_size (bfd *abfd)
-{
- bfd_vma size;
- aeabi_attribute *attr;
- aeabi_attribute_list *list;
- int i;
-
- attr = elf32_arm_tdata (abfd)->known_eabi_attributes;
- size = 16; /* 'A' <size> "aeabi" 0x1 <size>. */
- for (i = 4; i < NUM_KNOWN_ATTRIBUTES; i++)
- size += eabi_attr_size (i, &attr[i]);
-
- for (list = elf32_arm_tdata (abfd)->other_eabi_attributes;
- list;
- list = list->next)
- size += eabi_attr_size (list->tag, &list->attr);
-
- return size;
-}
-
-static bfd_byte *
-write_uleb128 (bfd_byte *p, unsigned int val)
-{
- bfd_byte c;
- do
- {
- c = val & 0x7f;
- val >>= 7;
- if (val)
- c |= 0x80;
- *(p++) = c;
- }
- while (val);
- return p;
-}
-
-/* Write attribute ATTR to butter P, and return a pointer to the following
- byte. */
-static bfd_byte *
-write_eabi_attribute (bfd_byte *p, int tag, aeabi_attribute *attr)
-{
- /* Suppress default entries. */
- if (is_default_attr(attr))
- return p;
-
- p = write_uleb128 (p, tag);
- if (attr->type & 1)
- p = write_uleb128 (p, attr->i);
- if (attr->type & 2)
- {
- int len;
-
- len = strlen (attr->s) + 1;
- memcpy (p, attr->s, len);
- p += len;
- }
-
- return p;
-}
-
-/* Write the contents of the eabi attributes section to p. */
-void
-elf32_arm_set_eabi_attr_contents (bfd *abfd, bfd_byte *contents, bfd_vma size)
-{
- bfd_byte *p;
- aeabi_attribute *attr;
- aeabi_attribute_list *list;
- int i;
-
- p = contents;
- *(p++) = 'A';
- bfd_put_32 (abfd, size - 1, p);
- p += 4;
- memcpy (p, "aeabi", 6);
- p += 6;
- *(p++) = Tag_File;
- bfd_put_32 (abfd, size - 11, p);
- p += 4;
-
- attr = elf32_arm_tdata (abfd)->known_eabi_attributes;
- for (i = 4; i < NUM_KNOWN_ATTRIBUTES; i++)
- p = write_eabi_attribute (p, i, &attr[i]);
-
- for (list = elf32_arm_tdata (abfd)->other_eabi_attributes;
- list;
- list = list->next)
- p = write_eabi_attribute (p, list->tag, &list->attr);
-}
-
-/* Override final_link to handle EABI object attribute sections. */
-
-static bfd_boolean
-elf32_arm_bfd_final_link (bfd *abfd, struct bfd_link_info *info)
-{
- asection *o;
- struct bfd_link_order *p;
- asection *attr_section = NULL;
- bfd_byte *contents;
- bfd_vma size = 0;
-
- /* elf32_arm_merge_private_bfd_data will already have merged the
- object attributes. Remove the input sections from the link, and set
- the contents of the output secton. */
- for (o = abfd->sections; o != NULL; o = o->next)
- {
- if (strcmp (o->name, ".ARM.attributes") == 0)
- {
- for (p = o->map_head.link_order; p != NULL; p = p->next)
- {
- asection *input_section;
-
- if (p->type != bfd_indirect_link_order)
- continue;
- input_section = p->u.indirect.section;
- /* Hack: reset the SEC_HAS_CONTENTS flag so that
- elf_link_input_bfd ignores this section. */
- input_section->flags &= ~SEC_HAS_CONTENTS;
- }
-
- size = elf32_arm_eabi_attr_size (abfd);
- bfd_set_section_size (abfd, o, size);
- attr_section = o;
- /* Skip this section later on. */
- o->map_head.link_order = NULL;
- }
- }
- /* Invoke the ELF linker to do all the work. */
- if (!bfd_elf_final_link (abfd, info))
- return FALSE;
-
- if (attr_section)
- {
- contents = bfd_malloc(size);
- if (contents == NULL)
- return FALSE;
- elf32_arm_set_eabi_attr_contents (abfd, contents, size);
- bfd_set_section_contents (abfd, attr_section, contents, 0, size);
- free (contents);
- }
- return TRUE;
-}
-
-
/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
static void
arm_add_to_rel (bfd * abfd,
{
bfd_signed_vma addend;
- if (howto->type == R_ARM_THM_CALL)
+ if (howto->type == R_ARM_THM_CALL
+ || howto->type == R_ARM_THM_JUMP24)
{
int upper_insn, lower_insn;
int upper, lower;
struct elf32_arm_link_hash_table * globals;
globals = elf32_arm_hash_table (info);
- if (info->relocatable && !globals->use_rel)
- return TRUE;
symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
arelent bfd_reloc;
char sym_type;
bfd_boolean unresolved_reloc = FALSE;
+ char *error_message = NULL;
r_symndx = ELF32_R_SYM (rel->r_info);
r_type = ELF32_R_TYPE (rel->r_info);
bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
howto = bfd_reloc.howto;
- if (info->relocatable && globals->use_rel)
- {
- /* This is a relocatable link. We don't have to change
- anything, unless the reloc is against a section symbol,
- in which case we have to adjust according to where the
- section symbol winds up in the output section. */
- if (r_symndx < symtab_hdr->sh_info)
- {
- sym = local_syms + r_symndx;
- if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
- {
- sec = local_sections[r_symndx];
- arm_add_to_rel (input_bfd, contents + rel->r_offset,
- howto,
- (bfd_signed_vma) (sec->output_offset
- + sym->st_value));
- }
- }
-
- continue;
- }
-
- /* This is a final link. */
h = NULL;
sym = NULL;
sec = NULL;
relocation = (sec->output_section->vma
+ sec->output_offset
+ sym->st_value);
- if ((sec->flags & SEC_MERGE)
- && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ if (!info->relocatable
+ && (sec->flags & SEC_MERGE)
+ && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
{
asection *msec;
bfd_vma addend, value;
sym_type = h->type;
}
+ if (sec != NULL && elf_discarded_section (sec))
+ {
+ /* For relocs against symbols from removed linkonce sections,
+ or sections discarded by a linker script, we just want the
+ section contents zeroed. Avoid any special processing. */
+ _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
+ rel->r_info = 0;
+ rel->r_addend = 0;
+ continue;
+ }
+
+ if (info->relocatable)
+ {
+ /* This is a relocatable link. We don't have to change
+ anything, unless the reloc is against a section symbol,
+ in which case we have to adjust according to where the
+ section symbol winds up in the output section. */
+ if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
+ {
+ if (globals->use_rel)
+ arm_add_to_rel (input_bfd, contents + rel->r_offset,
+ howto, (bfd_signed_vma) sec->output_offset);
+ else
+ rel->r_addend += sec->output_offset;
+ }
+ continue;
+ }
+
if (h != NULL)
name = h->root.root.string;
else
relocation, info, sec, name,
(h ? ELF_ST_TYPE (h->type) :
ELF_ST_TYPE (sym->st_info)), h,
- &unresolved_reloc);
+ &unresolved_reloc, &error_message);
/* Dynamic relocs are not propagated for SEC_DEBUGGING sections
because such sections are not SEC_ALLOC and thus ld.so will
if (r != bfd_reloc_ok)
{
- const char * msg = (const char *) 0;
-
switch (r)
{
case bfd_reloc_overflow:
break;
case bfd_reloc_outofrange:
- msg = _("internal error: out of range error");
+ error_message = _("out of range");
goto common_error;
case bfd_reloc_notsupported:
- msg = _("internal error: unsupported relocation error");
+ error_message = _("unsupported relocation");
goto common_error;
case bfd_reloc_dangerous:
- msg = _("internal error: dangerous error");
+ /* error_message should already be set. */
goto common_error;
default:
- msg = _("internal error: unknown error");
+ error_message = _("unknown error");
/* fall through */
common_error:
- if (!((*info->callbacks->warning)
- (info, msg, name, input_bfd, input_section,
+ BFD_ASSERT (error_message != NULL);
+ if (!((*info->callbacks->reloc_dangerous)
+ (info, error_message, input_bfd, input_section,
rel->r_offset)))
return FALSE;
- break;
- }
- }
- }
-
- return TRUE;
-}
-
-/* Allocate/find an object attribute. */
-static aeabi_attribute *
-elf32_arm_new_eabi_attr (bfd *abfd, int tag)
-{
- aeabi_attribute *attr;
- aeabi_attribute_list *list;
- aeabi_attribute_list *p;
- aeabi_attribute_list **lastp;
-
-
- if (tag < NUM_KNOWN_ATTRIBUTES)
- {
- /* Knwon tags are preallocated. */
- attr = &elf32_arm_tdata (abfd)->known_eabi_attributes[tag];
- }
- else
- {
- /* Create a new tag. */
- list = (aeabi_attribute_list *)
- bfd_alloc (abfd, sizeof (aeabi_attribute_list));
- memset (list, 0, sizeof (aeabi_attribute_list));
- list->tag = tag;
- /* Keep the tag list in order. */
- lastp = &elf32_arm_tdata (abfd)->other_eabi_attributes;
- for (p = *lastp; p; p = p->next)
- {
- if (tag < p->tag)
- break;
- lastp = &p->next;
- }
- list->next = *lastp;
- *lastp = list;
- attr = &list->attr;
- }
-
- return attr;
-}
-
-int
-elf32_arm_get_eabi_attr_int (bfd *abfd, int tag)
-{
- aeabi_attribute_list *p;
-
- if (tag < NUM_KNOWN_ATTRIBUTES)
- {
- /* Knwon tags are preallocated. */
- return elf32_arm_tdata (abfd)->known_eabi_attributes[tag].i;
- }
- else
- {
- for (p = elf32_arm_tdata (abfd)->other_eabi_attributes;
- p;
- p = p->next)
- {
- if (tag == p->tag)
- return p->attr.i;
- if (tag < p->tag)
- break;
- }
- return 0;
- }
-}
-
-void
-elf32_arm_add_eabi_attr_int (bfd *abfd, int tag, unsigned int i)
-{
- aeabi_attribute *attr;
-
- attr = elf32_arm_new_eabi_attr (abfd, tag);
- attr->type = 1;
- attr->i = i;
-}
-
-static char *
-attr_strdup (bfd *abfd, const char * s)
-{
- char * p;
- int len;
-
- len = strlen (s) + 1;
- p = (char *)bfd_alloc(abfd, len);
- return memcpy (p, s, len);
-}
-
-void
-elf32_arm_add_eabi_attr_string (bfd *abfd, int tag, const char *s)
-{
- aeabi_attribute *attr;
-
- attr = elf32_arm_new_eabi_attr (abfd, tag);
- attr->type = 2;
- attr->s = attr_strdup (abfd, s);
-}
-
-void
-elf32_arm_add_eabi_attr_compat (bfd *abfd, unsigned int i, const char *s)
-{
- aeabi_attribute_list *list;
- aeabi_attribute_list *p;
- aeabi_attribute_list **lastp;
-
- list = (aeabi_attribute_list *)
- bfd_alloc (abfd, sizeof (aeabi_attribute_list));
- memset (list, 0, sizeof (aeabi_attribute_list));
- list->tag = Tag_compatibility;
- list->attr.type = 3;
- list->attr.i = i;
- list->attr.s = attr_strdup (abfd, s);
-
- lastp = &elf32_arm_tdata (abfd)->other_eabi_attributes;
- for (p = *lastp; p; p = p->next)
- {
- int cmp;
- if (p->tag != Tag_compatibility)
- break;
- cmp = strcmp(s, p->attr.s);
- if (cmp < 0 || (cmp == 0 && i < p->attr.i))
- break;
- lastp = &p->next;
+ break;
+ }
+ }
}
- list->next = *lastp;
- *lastp = list;
+
+ return TRUE;
}
/* Set the right machine number. */
return TRUE;
}
-/* Copy the eabi object attribute from IBFD to OBFD. */
-static void
-copy_eabi_attributes (bfd *ibfd, bfd *obfd)
-{
- aeabi_attribute *in_attr;
- aeabi_attribute *out_attr;
- aeabi_attribute_list *list;
- int i;
-
- in_attr = elf32_arm_tdata (ibfd)->known_eabi_attributes;
- out_attr = elf32_arm_tdata (obfd)->known_eabi_attributes;
- for (i = 4; i < NUM_KNOWN_ATTRIBUTES; i++)
- {
- out_attr->i = in_attr->i;
- if (in_attr->s && *in_attr->s)
- out_attr->s = attr_strdup (obfd, in_attr->s);
- in_attr++;
- out_attr++;
- }
-
- for (list = elf32_arm_tdata (ibfd)->other_eabi_attributes;
- list;
- list = list->next)
- {
- in_attr = &list->attr;
- switch (in_attr->type)
- {
- case 1:
- elf32_arm_add_eabi_attr_int (obfd, list->tag, in_attr->i);
- break;
- case 2:
- elf32_arm_add_eabi_attr_string (obfd, list->tag, in_attr->s);
- break;
- case 3:
- elf32_arm_add_eabi_attr_compat (obfd, in_attr->i, in_attr->s);
- break;
- default:
- abort();
- }
- }
-}
-
-
/* Copy backend specific data from one object module to another. */
static bfd_boolean
elf_elfheader (obfd)->e_ident[EI_OSABI] =
elf_elfheader (ibfd)->e_ident[EI_OSABI];
- /* Copy EABI object attributes. */
- copy_eabi_attributes (ibfd, obfd);
+ /* Copy object attributes. */
+ _bfd_elf_copy_obj_attributes (ibfd, obfd);
return TRUE;
}
AEABI_enum_forced_wide
};
+/* Determine whether an object attribute tag takes an integer, a
+ string or both. */
+static int
+elf32_arm_obj_attrs_arg_type (int tag)
+{
+ if (tag == Tag_compatibility)
+ return 3;
+ else if (tag == 4 || tag == 5)
+ return 2;
+ else if (tag < 32)
+ return 1;
+ else
+ return (tag & 1) != 0 ? 2 : 1;
+}
+
/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
are conflicting attributes. */
static bfd_boolean
elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
{
- aeabi_attribute *in_attr;
- aeabi_attribute *out_attr;
- aeabi_attribute_list *in_list;
- aeabi_attribute_list *out_list;
+ obj_attribute *in_attr;
+ obj_attribute *out_attr;
+ obj_attribute_list *in_list;
/* Some tags have 0 = don't care, 1 = strong requirement,
2 = weak requirement. */
static const int order_312[3] = {3, 1, 2};
int i;
- if (!elf32_arm_tdata (ibfd)->known_eabi_attributes[0].i)
+ if (!elf_known_obj_attributes_proc (obfd)[0].i)
{
/* This is the first object. Copy the attributes. */
- copy_eabi_attributes (ibfd, obfd);
+ _bfd_elf_copy_obj_attributes (ibfd, obfd);
+
+ /* Use the Tag_null value to indicate the attributes have been
+ initialized. */
+ elf_known_obj_attributes_proc (obfd)[0].i = 1;
+
return TRUE;
}
- /* Use the Tag_null value to indicate the attributes have been
- initialized. */
- elf32_arm_tdata (ibfd)->known_eabi_attributes[0].i = 1;
-
- in_attr = elf32_arm_tdata (ibfd)->known_eabi_attributes;
- out_attr = elf32_arm_tdata (obfd)->known_eabi_attributes;
+ in_attr = elf_known_obj_attributes_proc (ibfd);
+ out_attr = elf_known_obj_attributes_proc (obfd);
/* This needs to happen before Tag_ABI_FP_number_model is merged. */
if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
{
}
}
- for (i = 4; i < NUM_KNOWN_ATTRIBUTES; i++)
+ for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
{
/* Merge this attribute with existing attributes. */
switch (i)
{
case Tag_CPU_raw_name:
case Tag_CPU_name:
- /* Use whichever has the greatest architecture requirements. */
- if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i)
- out_attr[i].s = attr_strdup(obfd, in_attr[i].s);
+ /* Use whichever has the greatest architecture requirements. We
+ won't necessarily have both the above tags, so make sure input
+ name is non-NULL. */
+ if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
+ && in_attr[i].s)
+ out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
break;
case Tag_ABI_optimization_goals:
}
break;
case Tag_ABI_PCS_R9_use:
- if (out_attr[i].i != AEABI_R9_unused
+ if (in_attr[i].i != out_attr[i].i
+ && out_attr[i].i != AEABI_R9_unused
&& in_attr[i].i != AEABI_R9_unused)
{
_bfd_error_handler
out_attr[i].i = in_attr[i].i;
}
else if (in_attr[i].i != AEABI_enum_forced_wide
- && out_attr[i].i != in_attr[i].i)
+ && out_attr[i].i != in_attr[i].i
+ && !elf32_arm_tdata (obfd)->no_enum_size_warning)
{
+ const char *aeabi_enum_names[] =
+ { "", "variable-size", "32-bit", "" };
_bfd_error_handler
- (_("ERROR: %B: Conflicting enum sizes"), ibfd);
+ (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
+ ibfd, aeabi_enum_names[in_attr[i].i],
+ aeabi_enum_names[out_attr[i].i]);
}
}
break;
default: /* All known attributes should be explicitly covered. */
abort ();
}
- }
- in_list = elf32_arm_tdata (ibfd)->other_eabi_attributes;
- out_list = elf32_arm_tdata (ibfd)->other_eabi_attributes;
- while (in_list && in_list->tag == Tag_compatibility)
- {
- in_attr = &in_list->attr;
- if (in_attr->i == 0)
- continue;
- if (in_attr->i == 1)
- {
- _bfd_error_handler
- (_("ERROR: %B: Must be processed by '%s' toolchain"),
- ibfd, in_attr->s);
- return FALSE;
- }
- if (!out_list || out_list->tag != Tag_compatibility
- || strcmp (in_attr->s, out_list->attr.s) != 0)
- {
- /* Add this compatibility tag to the output. */
- elf32_arm_add_eabi_attr_compat (obfd, in_attr->i, in_attr->s);
- continue;
- }
- out_attr = &out_list->attr;
- /* Check all the input tags with the same identifier. */
- for (;;)
- {
- if (out_list->tag != Tag_compatibility
- || in_attr->i != out_attr->i
- || strcmp (in_attr->s, out_attr->s) != 0)
- {
- _bfd_error_handler
- (_("ERROR: %B: Incompatible object tag '%s':%d"),
- ibfd, in_attr->s, in_attr->i);
- return FALSE;
- }
- in_list = in_list->next;
- if (in_list->tag != Tag_compatibility
- || strcmp (in_attr->s, in_list->attr.s) != 0)
+ if (in_attr[i].type && !out_attr[i].type)
+ switch (in_attr[i].type)
+ {
+ case 1:
+ if (out_attr[i].i)
+ out_attr[i].type = 1;
break;
- in_attr = &in_list->attr;
- out_list = out_list->next;
- if (out_list)
- out_attr = &out_list->attr;
- }
- /* Check the output doesn't have extra tags with this identifier. */
- if (out_list && out_list->tag == Tag_compatibility
- && strcmp (in_attr->s, out_list->attr.s) == 0)
- {
- _bfd_error_handler
- (_("ERROR: %B: Incompatible object tag '%s':%d"),
- ibfd, in_attr->s, out_list->attr.i);
- return FALSE;
- }
+ case 2:
+ if (out_attr[i].s)
+ out_attr[i].type = 2;
+ break;
+
+ default:
+ abort ();
+ }
}
+ /* Merge Tag_compatibility attributes and any common GNU ones. */
+ _bfd_elf_merge_object_attributes (ibfd, obfd);
+
+ /* Check for any attributes not known on ARM. */
+ in_list = elf_other_obj_attributes_proc (ibfd);
+ while (in_list && in_list->tag == Tag_compatibility)
+ in_list = in_list->next;
+
for (; in_list; in_list = in_list->next)
{
if ((in_list->tag & 128) < 64)
}
static asection *
-elf32_arm_gc_mark_hook (asection * sec,
- struct bfd_link_info * info ATTRIBUTE_UNUSED,
- Elf_Internal_Rela * rel,
- struct elf_link_hash_entry * h,
- Elf_Internal_Sym * sym)
+elf32_arm_gc_mark_hook (asection *sec,
+ struct bfd_link_info *info,
+ Elf_Internal_Rela *rel,
+ struct elf_link_hash_entry *h,
+ Elf_Internal_Sym *sym)
{
if (h != NULL)
- {
- switch (ELF32_R_TYPE (rel->r_info))
+ switch (ELF32_R_TYPE (rel->r_info))
{
case R_ARM_GNU_VTINHERIT:
case R_ARM_GNU_VTENTRY:
- break;
-
- default:
- switch (h->root.type)
- {
- case bfd_link_hash_defined:
- case bfd_link_hash_defweak:
- return h->root.u.def.section;
-
- case bfd_link_hash_common:
- return h->root.u.c.p->section;
-
- default:
- break;
- }
- }
- }
- else
- return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
+ return NULL;
+ }
- return NULL;
+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
}
/* Update the got entry reference counts for the section being removed. */
sym_hashes = elf_sym_hashes (abfd);
local_got_refcounts = elf_local_got_refcounts (abfd);
+ check_use_blx(globals);
+
relend = relocs + sec->reloc_count;
for (rel = relocs; rel < relend; rel++)
{
break;
case R_ARM_ABS32:
+ case R_ARM_ABS32_NOI:
case R_ARM_REL32:
+ case R_ARM_REL32_NOI:
case R_ARM_PC24:
case R_ARM_PLT32:
case R_ARM_CALL:
case R_ARM_JUMP24:
case R_ARM_PREL31:
case R_ARM_THM_CALL:
+ case R_ARM_THM_JUMP24:
+ case R_ARM_THM_JUMP19:
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
case R_ARM_MOVW_PREL_NC:
if (h->plt.refcount > 0)
{
h->plt.refcount -= 1;
- if (ELF32_R_TYPE (rel->r_info) == R_ARM_THM_CALL)
+ if (r_type == R_ARM_THM_CALL)
+ eh->plt_maybe_thumb_refcount--;
+
+ if (r_type == R_ARM_THM_JUMP24
+ || r_type == R_ARM_THM_JUMP19)
eh->plt_thumb_refcount--;
}
if (r_type == R_ARM_ABS32
- || r_type == R_ARM_REL32)
+ || r_type == R_ARM_REL32
+ || r_type == R_ARM_ABS32_NOI
+ || r_type == R_ARM_REL32_NOI)
{
for (pp = &eh->relocs_copied; (p = *pp) != NULL;
pp = &p->next)
if (p->section == sec)
{
p->count -= 1;
- if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32)
+ if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
+ || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
p->pc_count -= 1;
if (p->count == 0)
*pp = p->next;
{
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
- struct elf_link_hash_entry **sym_hashes_end;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
bfd *dynobj;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
- sym_hashes_end = sym_hashes
- + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
-
- if (!elf_bad_symtab (abfd))
- sym_hashes_end -= symtab_hdr->sh_info;
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
/* Fall through */
case R_ARM_ABS32:
+ case R_ARM_ABS32_NOI:
case R_ARM_REL32:
+ case R_ARM_REL32_NOI:
case R_ARM_PC24:
case R_ARM_PLT32:
case R_ARM_CALL:
case R_ARM_JUMP24:
case R_ARM_PREL31:
case R_ARM_THM_CALL:
+ case R_ARM_THM_JUMP24:
+ case R_ARM_THM_JUMP19:
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
case R_ARM_MOVW_PREL_NC:
refers to is in a different object. We can't tell for
sure yet, because something later might force the
symbol local. */
- if (r_type != R_ARM_ABS32 && r_type != R_ARM_REL32)
+ if (r_type != R_ARM_ABS32
+ && r_type != R_ARM_REL32
+ && r_type != R_ARM_ABS32_NOI
+ && r_type != R_ARM_REL32_NOI
+ && r_type != R_ARM_ABS12)
h->needs_plt = 1;
/* If we create a PLT entry, this relocation will reference
it, even if it's an ABS32 relocation. */
h->plt.refcount += 1;
+ /* It's too early to use htab->use_blx here, so we have to
+ record possible blx references separately from
+ relocs that definitely need a thumb stub. */
+
if (r_type == R_ARM_THM_CALL)
+ eh->plt_maybe_thumb_refcount += 1;
+
+ if (r_type == R_ARM_THM_JUMP24
+ || r_type == R_ARM_THM_JUMP19)
eh->plt_thumb_refcount += 1;
}
relocs_copied field of the hash table entry. */
if ((info->shared || htab->root.is_relocatable_executable)
&& (sec->flags & SEC_ALLOC) != 0
- && (r_type == R_ARM_ABS32
+ && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
|| (h != NULL && ! h->needs_plt
&& (! info->symbolic || ! h->def_regular))))
{
p->pc_count = 0;
}
- if (r_type == R_ARM_REL32)
+ if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
p->pc_count += 1;
p->count += 1;
}
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_ARM_GNU_VTENTRY:
- if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
+ BFD_ASSERT (h != NULL);
+ if (h != NULL
+ && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
return FALSE;
break;
}
return TRUE;
}
+/* Unwinding tables are not referenced directly. This pass marks them as
+ required if the corresponding code section is marked. */
+
+static bfd_boolean
+elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
+ elf_gc_mark_hook_fn gc_mark_hook)
+{
+ bfd *sub;
+ Elf_Internal_Shdr **elf_shdrp;
+ bfd_boolean again;
+
+ /* Marking EH data may cause additional code sections to be marked,
+ requiring multiple passes. */
+ again = TRUE;
+ while (again)
+ {
+ again = FALSE;
+ for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
+ {
+ asection *o;
+
+ if (bfd_get_flavour (sub) != bfd_target_elf_flavour)
+ continue;
+
+ elf_shdrp = elf_elfsections (sub);
+ for (o = sub->sections; o != NULL; o = o->next)
+ {
+ Elf_Internal_Shdr *hdr;
+ hdr = &elf_section_data (o)->this_hdr;
+ if (hdr->sh_type == SHT_ARM_EXIDX && hdr->sh_link
+ && !o->gc_mark
+ && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
+ {
+ again = TRUE;
+ if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
+ return FALSE;
+ }
+ }
+ }
+ }
+
+ return TRUE;
+}
+
/* Treat mapping symbols as special target symbols. */
static bfd_boolean
{
bfd * dynobj;
asection * s;
- unsigned int power_of_two;
struct elf32_arm_link_hash_entry * eh;
struct elf32_arm_link_hash_table *globals;
linkage table, and we can just do a PC24 reloc instead. */
h->plt.offset = (bfd_vma) -1;
eh->plt_thumb_refcount = 0;
+ eh->plt_maybe_thumb_refcount = 0;
h->needs_plt = 0;
}
the link may change h->type. So fix it now. */
h->plt.offset = (bfd_vma) -1;
eh->plt_thumb_refcount = 0;
+ eh->plt_maybe_thumb_refcount = 0;
}
/* If this is a weak symbol, and there is a real definition, the
h->needs_copy = 1;
}
- /* We need to figure out the alignment required for this symbol. I
- have no idea how ELF linkers handle this. */
- power_of_two = bfd_log2 (h->size);
- if (power_of_two > 3)
- power_of_two = 3;
-
- /* Apply the required alignment. */
- s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
- if (power_of_two > bfd_get_section_alignment (dynobj, s))
- {
- if (! bfd_set_section_alignment (dynobj, s, power_of_two))
- return FALSE;
- }
-
- /* Define the symbol as being at this point in the section. */
- h->root.u.def.section = s;
- h->root.u.def.value = s->size;
-
- /* Increment the section size to make room for the symbol. */
- s->size += h->size;
-
- return TRUE;
+ return _bfd_elf_adjust_dynamic_copy (h, s);
}
/* Allocate space in .plt, .got and associated reloc sections for
struct elf32_arm_link_hash_table *htab;
struct elf32_arm_link_hash_entry *eh;
struct elf32_arm_relocs_copied *p;
+ bfd_signed_vma thumb_refs;
eh = (struct elf32_arm_link_hash_entry *) h;
/* If we will insert a Thumb trampoline before this PLT, leave room
for it. */
- if (!htab->use_blx && eh->plt_thumb_refcount > 0)
+ thumb_refs = eh->plt_thumb_refcount;
+ if (!htab->use_blx)
+ thumb_refs += eh->plt_maybe_thumb_refcount;
+
+ if (thumb_refs > 0)
{
h->plt.offset += PLT_THUMB_STUB_SIZE;
s->size += PLT_THUMB_STUB_SIZE;
/* Allocate stubs for exported Thumb functions on v4t. */
if (!htab->use_blx && h->dynindx != -1
+ && h->def_regular
&& ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
&& ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
{
if (info->shared || htab->root.is_relocatable_executable)
{
- /* The only reloc that uses pc_count is R_ARM_REL32, which will
- appear on something like ".long foo - .". We want calls to
- protected symbols to resolve directly to the function rather
- than going via the plt. If people want function pointer
- comparisons to work as expected then they should avoid
- writing assembly like ".long foo - .". */
+ /* The only relocs that use pc_count are R_ARM_REL32 and
+ R_ARM_REL32_NOI, which will appear on something like
+ ".long foo - .". We want calls to protected symbols to resolve
+ directly to the function rather than going via the plt. If people
+ want function pointer comparisons to work as expected then they
+ should avoid writing assembly like ".long foo - .". */
if (SYMBOL_CALLS_LOCAL (info, h))
{
struct elf32_arm_relocs_copied **pp;
return TRUE;
}
+void
+bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
+ int byteswap_code)
+{
+ struct elf32_arm_link_hash_table *globals;
+
+ globals = elf32_arm_hash_table (info);
+ globals->byteswap_code = byteswap_code;
+}
+
/* Set the sizes of the dynamic sections. */
static bfd_boolean
sym dynamic relocs. */
elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
+ /* Here we rummage through the found bfds to collect glue information. */
+ for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
+ {
+ /* Initialise mapping tables for code/data. */
+ bfd_elf32_arm_init_maps (ibfd);
+
+ if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
+ || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
+ /* xgettext:c-format */
+ _bfd_error_handler (_("Errors encountered processing file %s"),
+ ibfd->filename);
+ }
+
/* The check_relocs and adjust_dynamic_symbol entry points have
determined the sizes of the various dynamic sections. Allocate
memory for them. */
/* Remember whether there is a PLT. */
plt = s->size != 0;
}
- else if (strncmp (name, ".rel", 4) == 0)
+ else if (CONST_STRNEQ (name, ".rel"))
{
if (s->size != 0)
{
s->reloc_count = 0;
}
}
- else if (strncmp (name, ".got", 4) != 0
+ else if (! CONST_STRNEQ (name, ".got")
&& strcmp (name, ".dynbss") != 0)
{
/* It's not one of our sections, so don't allocate space. */
if (!add_dynamic_entry (DT_TEXTREL, 0))
return FALSE;
}
+ if (htab->vxworks_p
+ && !elf_vxworks_add_dynamic_entries (output_bfd, info))
+ return FALSE;
}
#undef add_dynamic_entry
unsigned int i;
bfd_vma val;
- for (i = 0; i != htab->plt_entry_size / 4; i++)
+ for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
{
val = elf32_arm_vxworks_exec_plt_entry[i];
if (i == 2)
}
else
{
+ bfd_signed_vma thumb_refs;
/* Calculate the displacement between the PLT slot and the
entry in the GOT. The eight-byte offset accounts for the
value produced by adding to pc in the first instruction
BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
- if (!htab->use_blx && eh->plt_thumb_refcount > 0)
+ thumb_refs = eh->plt_thumb_refcount;
+ if (!htab->use_blx)
+ thumb_refs += eh->plt_maybe_thumb_refcount;
+
+ if (thumb_refs > 0)
{
put_thumb_insn (htab, output_bfd,
elf32_arm_plt_thumb_stub[0], ptr - 4);
unsigned int type;
default:
+ if (htab->vxworks_p
+ && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
break;
case DT_HASH:
/* UnixWare sets the entsize of .plt to 4, although that doesn't
really seem like the right value. */
- elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
+ if (splt->output_section->owner == output_bfd)
+ elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
{
static bfd_boolean
is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
{
- size_t len1, len2;
-
- len1 = sizeof (ELF_STRING_ARM_unwind) - 1;
- len2 = sizeof (ELF_STRING_ARM_unwind_once) - 1;
- return (strncmp (name, ELF_STRING_ARM_unwind, len1) == 0
- || strncmp (name, ELF_STRING_ARM_unwind_once, len2) == 0);
+ return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
+ || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
}
hdr->sh_type = SHT_ARM_EXIDX;
hdr->sh_flags |= SHF_LINK_ORDER;
}
- else if (strcmp(name, ".ARM.attributes") == 0)
- {
- hdr->sh_type = SHT_ARM_ATTRIBUTES;
- }
return TRUE;
}
-/* Parse an Arm EABI attributes section. */
-static void
-elf32_arm_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
-{
- bfd_byte *contents;
- bfd_byte *p;
- bfd_vma len;
-
- contents = bfd_malloc (hdr->sh_size);
- if (!contents)
- return;
- if (!bfd_get_section_contents (abfd, hdr->bfd_section, contents, 0,
- hdr->sh_size))
- {
- free (contents);
- return;
- }
- p = contents;
- if (*(p++) == 'A')
- {
- len = hdr->sh_size - 1;
- while (len > 0)
- {
- int namelen;
- bfd_vma section_len;
-
- section_len = bfd_get_32 (abfd, p);
- p += 4;
- if (section_len > len)
- section_len = len;
- len -= section_len;
- namelen = strlen ((char *)p) + 1;
- section_len -= namelen + 4;
- if (strcmp((char *)p, "aeabi") != 0)
- {
- /* Vendor section. Ignore it. */
- p += namelen + section_len;
- }
- else
- {
- p += namelen;
- while (section_len > 0)
- {
- int tag;
- unsigned int n;
- unsigned int val;
- bfd_vma subsection_len;
- bfd_byte *end;
-
- tag = read_unsigned_leb128 (abfd, p, &n);
- p += n;
- subsection_len = bfd_get_32 (abfd, p);
- p += 4;
- if (subsection_len > section_len)
- subsection_len = section_len;
- section_len -= subsection_len;
- subsection_len -= n + 4;
- end = p + subsection_len;
- switch (tag)
- {
- case Tag_File:
- while (p < end)
- {
- bfd_boolean is_string;
-
- tag = read_unsigned_leb128 (abfd, p, &n);
- p += n;
- if (tag == 4 || tag == 5)
- is_string = 1;
- else if (tag < 32)
- is_string = 0;
- else
- is_string = (tag & 1) != 0;
- if (tag == Tag_compatibility)
- {
- val = read_unsigned_leb128 (abfd, p, &n);
- p += n;
- elf32_arm_add_eabi_attr_compat (abfd, val,
- (char *)p);
- p += strlen ((char *)p) + 1;
- }
- else if (is_string)
- {
- elf32_arm_add_eabi_attr_string (abfd, tag,
- (char *)p);
- p += strlen ((char *)p) + 1;
- }
- else
- {
- val = read_unsigned_leb128 (abfd, p, &n);
- p += n;
- elf32_arm_add_eabi_attr_int (abfd, tag, val);
- }
- }
- break;
- case Tag_Section:
- case Tag_Symbol:
- /* Don't have anywhere convenient to attach these.
- Fall through for now. */
- default:
- /* Ignore things we don't kow about. */
- p += subsection_len;
- subsection_len = 0;
- break;
- }
- }
- }
- }
- }
- free (contents);
-}
-
/* Handle an ARM specific section when reading an object file. This is
called when bfd_section_from_shdr finds a section with an unknown
type. */
if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
return FALSE;
- if (hdr->sh_type == SHT_ARM_ATTRIBUTES)
- elf32_arm_parse_attributes(abfd, hdr);
return TRUE;
}
}
}
-/* Called for each symbol. Builds a section map based on mapping symbols.
- Does not alter any of the symbols. */
-
-static bfd_boolean
-elf32_arm_output_symbol_hook (struct bfd_link_info *info,
- const char *name,
- Elf_Internal_Sym *elfsym,
- asection *input_sec,
- struct elf_link_hash_entry *h)
-{
- int mapcount;
- elf32_arm_section_map *map;
- elf32_arm_section_map *newmap;
- _arm_elf_section_data *arm_data;
- struct elf32_arm_link_hash_table *globals;
-
- globals = elf32_arm_hash_table (info);
- if (globals->vxworks_p
- && !elf_vxworks_link_output_symbol_hook (info, name, elfsym,
- input_sec, h))
- return FALSE;
-
- /* Only do this on final link. */
- if (info->relocatable)
- return TRUE;
-
- /* Only build a map if we need to byteswap code. */
- if (!globals->byteswap_code)
- return TRUE;
-
- /* We only want mapping symbols. */
- if (!bfd_is_arm_special_symbol_name (name, BFD_ARM_SPECIAL_SYM_TYPE_MAP))
- return TRUE;
-
- /* If this section has not been allocated an _arm_elf_section_data
- structure then we cannot record anything. */
- arm_data = get_arm_elf_section_data (input_sec);
- if (arm_data == NULL)
- return TRUE;
-
- mapcount = arm_data->mapcount + 1;
- map = arm_data->map;
-
- /* TODO: This may be inefficient, but we probably don't usually have many
- mapping symbols per section. */
- newmap = bfd_realloc (map, mapcount * sizeof (* map));
- if (newmap != NULL)
- {
- arm_data->map = newmap;
- arm_data->mapcount = mapcount;
-
- newmap[mapcount - 1].vma = elfsym->st_value;
- newmap[mapcount - 1].type = name[1];
- }
-
- return TRUE;
-}
typedef struct
{
void *finfo;
struct bfd_link_info *info;
- int plt_shndx;
- bfd_vma plt_offset;
+ asection *sec;
+ int sec_shndx;
bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
asection *, struct elf_link_hash_entry *);
} output_arch_syminfo;
Elf_Internal_Sym sym;
htab = elf32_arm_hash_table (osi->info);
- sym.st_value = osi->plt_offset + offset;
+ sym.st_value = osi->sec->output_section->vma
+ + osi->sec->output_offset
+ + offset;
sym.st_size = 0;
sym.st_other = 0;
sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
- sym.st_shndx = osi->plt_shndx;
- if (!osi->func (osi->finfo, names[type], &sym, htab->splt, NULL))
+ sym.st_shndx = osi->sec_shndx;
+ if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
return FALSE;
return TRUE;
}
}
else
{
- bfd_boolean thumb_stub;
+ bfd_signed_vma thumb_refs;
+
+ thumb_refs = eh->plt_thumb_refcount;
+ if (!htab->use_blx)
+ thumb_refs += eh->plt_maybe_thumb_refcount;
- thumb_stub = eh->plt_thumb_refcount > 0 && !htab->use_blx;
- if (thumb_stub)
+ if (thumb_refs > 0)
{
if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
return FALSE;
/* A three-word PLT with no Thumb thunk contains only Arm code,
so only need to output a mapping symbol for the first PLT entry and
entries with thumb thunks. */
- if (thumb_stub || addr == 20)
+ if (thumb_refs > 0 || addr == 20)
{
if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
return FALSE;
}
-/* Output mapping symbols for the PLT. */
+/* Output mapping symbols for linker generated sections. */
static bfd_boolean
elf32_arm_output_arch_local_syms (bfd *output_bfd,
{
output_arch_syminfo osi;
struct elf32_arm_link_hash_table *htab;
+ bfd_vma offset;
+ bfd_size_type size;
htab = elf32_arm_hash_table (info);
- if (!htab->splt || htab->splt->size == 0)
- return TRUE;
-
check_use_blx(htab);
+
osi.finfo = finfo;
osi.info = info;
osi.func = func;
- osi.plt_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
- htab->splt->output_section);
- osi.plt_offset = htab->splt->output_section->vma;
+
+ /* ARM->Thumb glue. */
+ if (htab->arm_glue_size > 0)
+ {
+ osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
+ ARM2THUMB_GLUE_SECTION_NAME);
+
+ osi.sec_shndx = _bfd_elf_section_from_bfd_section
+ (output_bfd, osi.sec->output_section);
+ if (info->shared || htab->root.is_relocatable_executable
+ || htab->pic_veneer)
+ size = ARM2THUMB_PIC_GLUE_SIZE;
+ else if (htab->use_blx)
+ size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
+ else
+ size = ARM2THUMB_STATIC_GLUE_SIZE;
+
+ for (offset = 0; offset < htab->arm_glue_size; offset += size)
+ {
+ elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
+ elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
+ }
+ }
+
+ /* Thumb->ARM glue. */
+ if (htab->thumb_glue_size > 0)
+ {
+ osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
+ THUMB2ARM_GLUE_SECTION_NAME);
+
+ osi.sec_shndx = _bfd_elf_section_from_bfd_section
+ (output_bfd, osi.sec->output_section);
+ size = THUMB2ARM_GLUE_SIZE;
+
+ for (offset = 0; offset < htab->thumb_glue_size; offset += size)
+ {
+ elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
+ elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
+ }
+ }
+
+ /* Finally, output mapping symbols for the PLT. */
+ if (!htab->splt || htab->splt->size == 0)
+ return TRUE;
+ osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
+ htab->splt->output_section);
+ osi.sec = htab->splt;
/* Output mapping symbols for the plt header. SymbianOS does not have a
plt header. */
if (htab->vxworks_p)
static int
elf32_arm_compare_mapping (const void * a, const void * b)
{
- return ((const elf32_arm_section_map *) a)->vma
- > ((const elf32_arm_section_map *) b)->vma;
+ const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
+ const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
+
+ if (amap->vma > bmap->vma)
+ return 1;
+ else if (amap->vma < bmap->vma)
+ return -1;
+ else if (amap->type > bmap->type)
+ /* Ensure results do not depend on the host qsort for objects with
+ multiple mapping symbols at the same address by sorting on type
+ after vma. */
+ return 1;
+ else if (amap->type < bmap->type)
+ return -1;
+ else
+ return 0;
}
written out as normal. */
static bfd_boolean
-elf32_arm_write_section (bfd *output_bfd ATTRIBUTE_UNUSED, asection *sec,
+elf32_arm_write_section (bfd *output_bfd,
+ struct bfd_link_info *link_info, asection *sec,
bfd_byte *contents)
{
- int mapcount;
+ int mapcount, errcount;
_arm_elf_section_data *arm_data;
+ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
elf32_arm_section_map *map;
+ elf32_vfp11_erratum_list *errnode;
bfd_vma ptr;
bfd_vma end;
- bfd_vma offset;
+ bfd_vma offset = sec->output_section->vma + sec->output_offset;
bfd_byte tmp;
int i;
mapcount = arm_data->mapcount;
map = arm_data->map;
+ errcount = arm_data->erratumcount;
+
+ if (errcount != 0)
+ {
+ unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
+
+ for (errnode = arm_data->erratumlist; errnode != 0;
+ errnode = errnode->next)
+ {
+ bfd_vma index = errnode->vma - offset;
+
+ switch (errnode->type)
+ {
+ case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
+ {
+ bfd_vma branch_to_veneer;
+ /* Original condition code of instruction, plus bit mask for
+ ARM B instruction. */
+ unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
+ | 0x0a000000;
+
+ /* The instruction is before the label. */
+ index -= 4;
+
+ /* Above offset included in -4 below. */
+ branch_to_veneer = errnode->u.b.veneer->vma
+ - errnode->vma - 4;
+
+ if ((signed) branch_to_veneer < -(1 << 25)
+ || (signed) branch_to_veneer >= (1 << 25))
+ (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
+ "range"), output_bfd);
+
+ insn |= (branch_to_veneer >> 2) & 0xffffff;
+ contents[endianflip ^ index] = insn & 0xff;
+ contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
+ contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
+ contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
+ }
+ break;
+
+ case VFP11_ERRATUM_ARM_VENEER:
+ {
+ bfd_vma branch_from_veneer;
+ unsigned int insn;
+
+ /* Take size of veneer into account. */
+ branch_from_veneer = errnode->u.v.branch->vma
+ - errnode->vma - 12;
+
+ if ((signed) branch_from_veneer < -(1 << 25)
+ || (signed) branch_from_veneer >= (1 << 25))
+ (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
+ "range"), output_bfd);
+
+ /* Original instruction. */
+ insn = errnode->u.v.branch->u.b.vfp_insn;
+ contents[endianflip ^ index] = insn & 0xff;
+ contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
+ contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
+ contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
+
+ /* Branch back to insn after original insn. */
+ insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
+ contents[endianflip ^ (index + 4)] = insn & 0xff;
+ contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
+ contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
+ contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
+ }
+ break;
+
+ default:
+ abort ();
+ }
+ }
+ }
if (mapcount == 0)
return FALSE;
- qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
-
- offset = sec->output_section->vma + sec->output_offset;
- ptr = map[0].vma - offset;
- for (i = 0; i < mapcount; i++)
+ if (globals->byteswap_code)
{
- if (i == mapcount - 1)
- end = sec->size;
- else
- end = map[i + 1].vma - offset;
+ qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
- switch (map[i].type)
- {
- case 'a':
- /* Byte swap code words. */
- while (ptr + 3 < end)
- {
- tmp = contents[ptr];
- contents[ptr] = contents[ptr + 3];
- contents[ptr + 3] = tmp;
- tmp = contents[ptr + 1];
- contents[ptr + 1] = contents[ptr + 2];
- contents[ptr + 2] = tmp;
- ptr += 4;
- }
- break;
+ ptr = map[0].vma;
+ for (i = 0; i < mapcount; i++)
+ {
+ if (i == mapcount - 1)
+ end = sec->size;
+ else
+ end = map[i + 1].vma;
- case 't':
- /* Byte swap code halfwords. */
- while (ptr + 1 < end)
+ switch (map[i].type)
{
- tmp = contents[ptr];
- contents[ptr] = contents[ptr + 1];
- contents[ptr + 1] = tmp;
- ptr += 2;
- }
- break;
+ case 'a':
+ /* Byte swap code words. */
+ while (ptr + 3 < end)
+ {
+ tmp = contents[ptr];
+ contents[ptr] = contents[ptr + 3];
+ contents[ptr + 3] = tmp;
+ tmp = contents[ptr + 1];
+ contents[ptr + 1] = contents[ptr + 2];
+ contents[ptr + 2] = tmp;
+ ptr += 4;
+ }
+ break;
- case 'd':
- /* Leave data alone. */
- break;
- }
- ptr = end;
+ case 't':
+ /* Byte swap code halfwords. */
+ while (ptr + 1 < end)
+ {
+ tmp = contents[ptr];
+ contents[ptr] = contents[ptr + 1];
+ contents[ptr + 1] = tmp;
+ ptr += 2;
+ }
+ break;
+
+ case 'd':
+ /* Leave data alone. */
+ break;
+ }
+ ptr = end;
+ }
}
free (map);
arm_data->mapcount = 0;
+ arm_data->mapsize = 0;
arm_data->map = NULL;
unrecord_section_with_arm_elf_section_data (sec);
/* Mangle thumb function symbols as we read them in. */
-static void
+static bfd_boolean
elf32_arm_swap_symbol_in (bfd * abfd,
const void *psrc,
const void *pshn,
Elf_Internal_Sym *dst)
{
- bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst);
+ if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
+ return FALSE;
/* New EABI objects mark thumb function symbols by setting the low bit of
the address. Turn these into STT_ARM_TFUNC. */
dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
dst->st_value &= ~(bfd_vma) 1;
}
+ return TRUE;
}
linker will simulate the work of dynamic linker of resolving
symbols and will carry over the thumbness of found symbols to
the output symbol table. It's not clear how it happens, but
- the thumbness of underfined symbols can well be different at
+ the thumbness of undefined symbols can well be different at
runtime, and writing '1' for them will be confusing for users
and possibly for dynamic linker itself.
*/
newsym.st_value |= 1;
}
-
- newsym.st_value |= 1;
src = &newsym;
}
return 0;
}
+/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
+static bfd_boolean
+elf32_arm_is_function_type (unsigned int type)
+{
+ return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
+}
+
/* We use this to override swap_symbol_in and swap_symbol_out. */
const struct elf_size_info elf32_arm_size_info = {
sizeof (Elf32_External_Ehdr),
ELFCLASS32, EV_CURRENT,
bfd_elf32_write_out_phdrs,
bfd_elf32_write_shdrs_and_ehdr,
+ bfd_elf32_checksum_contents,
bfd_elf32_write_relocs,
elf32_arm_swap_symbol_in,
elf32_arm_swap_symbol_out,
#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
+#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
-#define bfd_elf32_bfd_final_link elf32_arm_bfd_final_link
#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
+#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
#define elf_backend_check_relocs elf32_arm_check_relocs
#define elf_backend_relocate_section elf32_arm_relocate_section
#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
-#define elf_backend_link_output_symbol_hook elf32_arm_output_symbol_hook
#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
+#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
#define elf_backend_post_process_headers elf32_arm_post_process_headers
#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
#define elf_backend_object_p elf32_arm_object_p
elf32_arm_output_arch_local_syms
#define elf_backend_begin_write_processing \
elf32_arm_begin_write_processing
+#define elf_backend_is_function_type elf32_arm_is_function_type
#define elf_backend_can_refcount 1
#define elf_backend_can_gc_sections 1
#define elf_backend_may_use_rel_p 1
#define elf_backend_may_use_rela_p 0
#define elf_backend_default_use_rela_p 0
-#define elf_backend_rela_normal 0
#define elf_backend_got_header_size 12
+#undef elf_backend_obj_attrs_vendor
+#define elf_backend_obj_attrs_vendor "aeabi"
+#undef elf_backend_obj_attrs_section
+#define elf_backend_obj_attrs_section ".ARM.attributes"
+#undef elf_backend_obj_attrs_arg_type
+#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
+#undef elf_backend_obj_attrs_section_type
+#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
+
#include "elf32-target.h"
/* VxWorks Targets */
#define elf_backend_may_use_rela_p 1
#undef elf_backend_default_use_rela_p
#define elf_backend_default_use_rela_p 1
-#undef elf_backend_rela_normal
-#define elf_backend_rela_normal 1
#undef elf_backend_want_plt_sym
#define elf_backend_want_plt_sym 1
#undef ELF_MAXPAGESIZE
the loadable read-only segment. The post-linker may wish to
refer to these sections, but they are not part of the final
program image. */
- { ".dynamic", 8, 0, SHT_DYNAMIC, 0 },
- { ".dynstr", 7, 0, SHT_STRTAB, 0 },
- { ".dynsym", 7, 0, SHT_DYNSYM, 0 },
- { ".got", 4, 0, SHT_PROGBITS, 0 },
- { ".hash", 5, 0, SHT_HASH, 0 },
+ { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
+ { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
+ { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
+ { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
+ { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
/* These sections do not need to be writable as the SymbianOS
postlinker will arrange things so that no dynamic relocation is
required. */
- { ".init_array", 11, 0, SHT_INIT_ARRAY, SHF_ALLOC },
- { ".fini_array", 11, 0, SHT_FINI_ARRAY, SHF_ALLOC },
- { ".preinit_array", 14, 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
- { NULL, 0, 0, 0, 0 }
+ { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
+ { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
+ { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
+ { NULL, 0, 0, 0, 0 }
};
static void
#define elf_backend_may_use_rela_p 0
#undef elf_backend_default_use_rela_p
#define elf_backend_default_use_rela_p 0
-#undef elf_backend_rela_normal
-#define elf_backend_rela_normal 0
#undef elf_backend_want_plt_sym
#define elf_backend_want_plt_sym 0
#undef ELF_MAXPAGESIZE