? bfd_elf32_swap_reloc_out \
: bfd_elf32_swap_reloca_out)
-#define elf_info_to_howto 0
+#define elf_info_to_howto NULL
#define elf_info_to_howto_rel elf32_arm_info_to_howto
#define ARM_ELF_ABI_VERSION 0
return NULL;
}
-static void
-elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
+static bfd_boolean
+elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
Elf_Internal_Rela * elf_reloc)
{
unsigned int r_type;
r_type = ELF32_R_TYPE (elf_reloc->r_info);
- bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
+ if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
+ abfd, r_type);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+ return TRUE;
}
struct elf32_arm_reloc_map
int nacl_p;
/* True if the target uses REL relocations. */
- int use_rel;
+ bfd_boolean use_rel;
/* Nonzero if import library must be a secure gateway import library
as per ARMv8-M Security Extensions. */
ret->plt_header_size = 20;
ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
#endif
- ret->use_rel = 1;
+ ret->use_rel = TRUE;
ret->obfd = abfd;
if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
(_("%pB(%pA): warning: long branch veneers used in"
" section with SHF_ARM_PURECODE section"
" attribute is only supported for M-profile"
- " targets that implement the movw instruction."),
+ " targets that implement the movw instruction"),
input_bfd, input_sec);
stub_type = (bfd_link_pic (info) | globals->pic_veneer)
(_("%pB(%pA): warning: long branch veneers used in"
" section with SHF_ARM_PURECODE section"
" attribute is only supported for M-profile"
- " targets that implement the movw instruction."),
+ " targets that implement the movw instruction"),
input_bfd, input_sec);
stub_type = (bfd_link_pic (info) | globals->pic_veneer)
(_("%pB(%pA): warning: long branch veneers used in"
" section with SHF_ARM_PURECODE section"
" attribute is only supported" " for M-profile"
- " targets that implement the movw instruction."),
+ " targets that implement the movw instruction"),
input_bfd, input_sec);
/* Thumb to arm. */
&& !INTERWORK_FLAG (sym_sec->owner))
{
_bfd_error_handler
- (_("%pB(%s): warning: interworking not enabled.\n"
- " first occurrence: %pB: Thumb call to ARM"),
- sym_sec->owner, name, input_bfd);
+ (_("%pB(%s): warning: interworking not enabled;"
+ " first occurrence: %pB: %s call to %s"),
+ sym_sec->owner, name, input_bfd, "Thumb", "ARM");
}
stub_type =
(_("%pB(%pA): warning: long branch veneers used in"
" section with SHF_ARM_PURECODE section"
" attribute is only supported for M-profile"
- " targets that implement the movw instruction."),
+ " targets that implement the movw instruction"),
input_bfd, input_sec);
if (branch_type == ST_BRANCH_TO_THUMB)
{
&& !INTERWORK_FLAG (sym_sec->owner))
{
_bfd_error_handler
- (_("%pB(%s): warning: interworking not enabled.\n"
- " first occurrence: %pB: ARM call to Thumb"),
- sym_sec->owner, name, input_bfd);
+ (_("%pB(%s): warning: interworking not enabled;"
+ " first occurrence: %pB: %s call to %s"),
+ sym_sec->owner, name, input_bfd, "ARM", "Thumb");
}
/* We have an extra 2-bytes reach because of
out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
if (out_sec == NULL)
{
- _bfd_error_handler (_("No address assigned to the veneers output "
+ _bfd_error_handler (_("no address assigned to the veneers output "
"section %s"), out_sec_name);
return NULL;
}
if (!is_v8m)
{
- _bfd_error_handler (_("%pB: Special symbol `%s' only allowed for "
- "ARMv8-M architecture or later."),
+ _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
+ "ARMv8-M architecture or later"),
input_bfd, sym_name);
is_v8m = TRUE; /* Avoid multiple warning. */
ret = FALSE;
if (cmse_invalid)
{
- _bfd_error_handler (_("%pB: invalid special symbol `%s'."),
+ _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
+ " a global or weak function symbol"),
input_bfd, sym_name);
- _bfd_error_handler (_("It must be a global or weak function "
- "symbol."));
ret = FALSE;
if (i < ext_start)
continue;
if (hash || j < ext_start)
{
_bfd_error_handler
- (_("%pB: invalid standard symbol `%s'."), input_bfd, sym_name);
- _bfd_error_handler
- (_("It must be a global or weak function symbol."));
+ (_("%pB: invalid standard symbol `%s'; it must be "
+ "a global or weak function symbol"),
+ input_bfd, sym_name);
}
else
_bfd_error_handler
- (_("%pB: absent standard symbol `%s'."), input_bfd, sym_name);
+ (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
ret = FALSE;
if (!hash)
continue;
if (cmse_hash->root.root.u.def.section != section)
{
_bfd_error_handler
- (_("%pB: `%s' and its special symbol are in different sections."),
+ (_("%pB: `%s' and its special symbol are in different sections"),
input_bfd, sym_name);
ret = FALSE;
}
if (section->output_section == NULL)
{
_bfd_error_handler
- (_("%pB: entry function `%s' not output."), input_bfd, sym_name);
+ (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
continue;
}
if (hash->root.size == 0)
{
_bfd_error_handler
- (_("%pB: entry function `%s' is empty."), input_bfd, sym_name);
+ (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
ret = FALSE;
}
if (!htab->cmse_implib)
{
_bfd_error_handler (_("%pB: --in-implib only supported for Secure "
- "Gateway import libraries."), in_implib_bfd);
+ "Gateway import libraries"), in_implib_bfd);
return FALSE;
}
|| (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
!= ST_BRANCH_TO_THUMB))
{
- _bfd_error_handler (_("%pB: invalid import library entry: `%s'."),
+ _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
+ "symbol should be absolute, global and "
+ "refer to Thumb functions"),
in_implib_bfd, sym_name);
- _bfd_error_handler (_("Symbol should be absolute, global and "
- "refer to Thumb functions."));
ret = FALSE;
continue;
}
bfd_boolean new_stub;
_bfd_error_handler
- (_("Entry function `%s' disappeared from secure code."), sym_name);
+ (_("entry function `%s' disappeared from secure code"), sym_name);
hash = (struct elf32_arm_link_hash_entry *)
elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
stub_entry
{
if (!cmse_entry_fct_p (hash))
{
- _bfd_error_handler (_("`%s' refers to a non entry function."),
+ _bfd_error_handler (_("`%s' refers to a non entry function"),
sym_name);
ret = FALSE;
}
if (!!(flags & BSF_GLOBAL)
!= (hash->root.root.type == bfd_link_hash_defined))
_bfd_error_handler
- (_("%pB: visibility of symbol `%s' has changed."), in_implib_bfd,
+ (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
sym_name);
stub_entry->stub_offset = stub_offset;
/* Size should match that of a SG veneer. */
if (intsym->st_size != cmse_stub_size)
{
- _bfd_error_handler (_("%pB: incorrect size for symbol `%s'."),
+ _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
in_implib_bfd, sym_name);
ret = FALSE;
}
if (stub_offset % cmse_stub_size)
{
_bfd_error_handler
- (_("Offset of veneer for entry function `%s' not a multiple of "
- "its size."), sym_name);
+ (_("offset of veneer for entry function `%s' not a multiple of "
+ "its size"), sym_name);
ret = FALSE;
}
if (cmse_stub_array_start != cmse_stub_sec_vma)
{
_bfd_error_handler
- (_("Start address of `%s' is different from previous link."),
+ (_("start address of `%s' is different from previous link"),
out_sec_name);
ret = FALSE;
}
(&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
if (hash == NULL
- && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
- tmp_name, name) == -1)
+ && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
+ "Thumb", tmp_name, name) == -1)
*error_message = (char *) bfd_errmsg (bfd_error_system_call);
free (tmp_name);
(&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL
- && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
- tmp_name, name) == -1)
+ && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
+ "ARM", tmp_name, name) == -1)
*error_message = (char *) bfd_errmsg (bfd_error_system_call);
free (tmp_name);
if (globals->byteswap_code && !bfd_big_endian (abfd))
{
- _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode."),
+ _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
abfd);
return FALSE;
}
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- _bfd_error_handler (_("%pB: unable to find VFP11 veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+ abfd, "VFP11", tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- _bfd_error_handler (_("%pB: unable to find VFP11 veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+ abfd, "VFP11", tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- _bfd_error_handler (_("%pB: unable to find STM32L4XX veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+ abfd, "STM32L4XX", tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
(&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
if (myh == NULL)
- _bfd_error_handler (_("%pB: unable to find STM32L4XX veneer "
- "`%s'"), abfd, tmp_name);
+ _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
+ abfd, "STM32L4XX", tmp_name);
vma = myh->root.u.def.section->output_section->vma
+ myh->root.u.def.section->output_offset
_bfd_error_handler
/* xgettext:c-format */
(_("%pB(%pA+%#x): error: multiple load detected"
- " in non-last IT block instruction :"
- " STM32L4XX veneer cannot be generated.\n"
- "Use gcc option -mrestrict-it to generate"
- " only one instruction per IT block.\n"),
+ " in non-last IT block instruction:"
+ " STM32L4XX veneer cannot be generated; "
+ "use gcc option -mrestrict-it to generate"
+ " only one instruction per IT block"),
abfd, sec, i);
}
else
globals->target2_reloc = R_ARM_GOT_PREL;
else
{
- _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
+ _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
params->target2_type);
}
globals->fix_v4bx = params->fix_v4bx;
&& !INTERWORK_FLAG (sym_sec->owner))
{
_bfd_error_handler
- (_("%pB(%s): warning: interworking not enabled.\n"
- " first occurrence: %pB: Thumb call to ARM"),
- sym_sec->owner, name, input_bfd);
+ (_("%pB(%s): warning: interworking not enabled;"
+ " first occurrence: %pB: %s call to %s"),
+ sym_sec->owner, name, input_bfd, "Thumb", "ARM");
return FALSE;
}
&& !INTERWORK_FLAG (sym_sec->owner))
{
_bfd_error_handler
- (_("%pB(%s): warning: interworking not enabled.\n"
- " first occurrence: %pB: arm call to thumb"),
- sym_sec->owner, name, input_bfd);
+ (_("%pB(%s): warning: interworking not enabled;"
+ " first occurrence: %pB: %s call to %s"),
+ sym_sec->owner, name, input_bfd, "ARM", "Thumb");
}
--my_offset;
{
/* FIXME: We ought to be able to generate thumb-1 PLT
instructions... */
- _bfd_error_handler (_("%pB: Warning: thumb-1 mode PLT generation not currently supported"),
+ _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
output_bfd);
return FALSE;
}
_bfd_error_handler
/* xgettext:c-format */
(_("%pB(%pA+%#" PRIx64 "): "
- "unexpected Thumb instruction '%#lx' in TLS trampoline"),
- input_bfd, input_sec, (uint64_t) rel->r_offset, insn);
+ "unexpected %s instruction '%#lx' in TLS trampoline"),
+ input_bfd, input_sec, (uint64_t) rel->r_offset,
+ "Thumb", insn);
return bfd_reloc_notsupported;
}
break;
_bfd_error_handler
/* xgettext:c-format */
(_("%pB(%pA+%#" PRIx64 "): "
- "unexpected ARM instruction '%#lx' in TLS trampoline"),
- input_bfd, input_sec, (uint64_t) rel->r_offset, insn);
+ "unexpected %s instruction '%#lx' in TLS trampoline"),
+ input_bfd, input_sec, (uint64_t) rel->r_offset,
+ "ARM", insn);
return bfd_reloc_notsupported;
}
break;
instruction instead ? */
if (branch_type != ST_BRANCH_TO_THUMB)
_bfd_error_handler
- (_("\%pB: Warning: Arm BLX instruction targets Arm function '%s'."),
- input_bfd,
- h ? h->root.root.string : "(local)");
+ (_("\%pB: warning: %s BLX instruction targets"
+ " %s function '%s'"),
+ input_bfd, "ARM",
+ "ARM", h ? h->root.root.string : "(local)");
}
else if (r_type == R_ARM_PC24)
{
instruction instead ? */
if (branch_type == ST_BRANCH_TO_THUMB)
_bfd_error_handler
- (_("%pB: Warning: Thumb BLX instruction targets thumb function '%s'."),
- input_bfd,
- h ? h->root.root.string : "(local)");
+ (_("%pB: warning: %s BLX instruction targets"
+ " %s function '%s'"),
+ input_bfd, "Thumb",
+ "Thumb", h ? h->root.root.string : "(local)");
}
else
{
_bfd_error_handler
/* xgettext:c-format */
(_("%pB(%pA+%#" PRIx64 "): "
- "unexpected Thumb instruction '%#lx' "
+ "unexpected %s instruction '%#lx' "
"referenced by TLS_GOTDESC"),
input_bfd, input_section, (uint64_t) rel->r_offset,
- insn);
+ "Thumb", insn);
return bfd_reloc_notsupported;
}
}
_bfd_error_handler
/* xgettext:c-format */
(_("%pB(%pA+%#" PRIx64 "): "
- "unexpected ARM instruction '%#lx' "
+ "unexpected %s instruction '%#lx' "
"referenced by TLS_GOTDESC"),
input_bfd, input_section, (uint64_t) rel->r_offset,
- insn);
+ "ARM", insn);
return bfd_reloc_notsupported;
}
}
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%pB(%pA+%#" PRIx64 "): Only ADD or SUB instructions "
+ (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
"are allowed for ALU group relocations"),
input_bfd, input_section, (uint64_t) rel->r_offset);
return bfd_reloc_overflow;
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+ (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
"splitting %#" PRIx64 " for group relocation %s"),
input_bfd, input_section, (uint64_t) rel->r_offset,
(uint64_t) (signed_value < 0 ? -signed_value : signed_value),
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+ (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
"splitting %#" PRIx64 " for group relocation %s"),
input_bfd, input_section, (uint64_t) rel->r_offset,
(uint64_t) (signed_value < 0 ? -signed_value : signed_value),
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+ (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
"splitting %#" PRIx64 " for group relocation %s"),
input_bfd, input_section, (uint64_t) rel->r_offset,
(uint64_t) (signed_value < 0 ? -signed_value : signed_value),
{
_bfd_error_handler
/* xgettext:c-format */
- (_("%pB(%pA+%#" PRIx64 "): Overflow whilst "
+ (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
"splitting %#" PRIx64 " for group relocation %s"),
input_bfd, input_section, (uint64_t) rel->r_offset,
(uint64_t) (signed_value < 0 ? -signed_value : signed_value),
{
if (flags & EF_ARM_INTERWORK)
_bfd_error_handler
- (_("Warning: Not setting interworking flag of %pB since it has already been specified as non-interworking"),
+ (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
abfd);
else
_bfd_error_handler
- (_("Warning: Clearing the interworking flag of %pB due to outside request"),
+ (_("warning: clearing the interworking flag of %pB due to outside request"),
abfd);
}
}
{
if (out_flags & EF_ARM_INTERWORK)
_bfd_error_handler
- (_("Warning: Clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
+ (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
obfd, ibfd);
in_flags &= ~EF_ARM_INTERWORK;
if ((tag & 127) < 64)
{
_bfd_error_handler
- (_("%pB: Unknown mandatory EABI object attribute %d"),
+ (_("%pB: unknown mandatory EABI object attribute %d"),
abfd, tag);
bfd_set_error (bfd_error_bad_value);
return FALSE;
else
{
_bfd_error_handler
- (_("Warning: %pB: Unknown EABI object attribute %d"),
+ (_("warning: %pB: unknown EABI object attribute %d"),
abfd, tag);
return TRUE;
}
if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
{
- _bfd_error_handler (_("error: %pB: Unknown CPU architecture"), ibfd);
+ _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
return -1;
}
if (result == -1)
{
- _bfd_error_handler (_("error: %pB: Conflicting CPU architectures %d/%d"),
+ _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
ibfd, oldtag, newtag);
return -1;
}
else
{
_bfd_error_handler
- (_("error: %pB: Conflicting architecture profiles %c/%c"),
+ (_("error: %pB: conflicting architecture profiles %c/%c"),
ibfd,
in_attr[i].i ? in_attr[i].i : '0',
out_attr[i].i ? out_attr[i].i : '0');
/* It's sometimes ok to mix different configs, so this is only
a warning. */
_bfd_error_handler
- (_("Warning: %pB: Conflicting platform configuration"), ibfd);
+ (_("warning: %pB: conflicting platform configuration"), ibfd);
}
break;
case Tag_ABI_PCS_R9_use:
&& in_attr[i].i != AEABI_R9_unused)
{
_bfd_error_handler
- (_("error: %pB: Conflicting use of R9"), ibfd);
+ (_("error: %pB: conflicting use of R9"), ibfd);
result = FALSE;
}
if (out_attr[i].i == AEABI_R9_unused)
if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
|| !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
|| !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
- _bfd_error_handler (_("Errors encountered processing file %pB"), ibfd);
+ _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
}
/* Allocate space for the glue sections now that we've sized them. */
_bfd_error_handler
(_("%pB(%#" PRIx64 "): error: "
- "Cannot create STM32L4XX veneer. "
- "Jump out of range by %" PRId64 " bytes. "
- "Cannot encode branch instruction. "),
+ "cannot create STM32L4XX veneer; "
+ "jump out of range by %" PRId64 " bytes; "
+ "cannot encode branch instruction"),
output_bfd,
(uint64_t) (stm32l4xx_errnode->vma - 4),
(int64_t) out_of_range);
STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
|| (signed) (veneer_r - veneer) >= (1 << 24))
{
- _bfd_error_handler (_("%pB: error: Cannot create STM32L4XX "
- "veneer."), output_bfd);
+ _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
+ "veneer"), output_bfd);
continue;
}
EF_ARM_EABI_VERSION (out_flags)))
{
_bfd_error_handler
- (_("error: Source object %pB has EABI version %d, but target %pB has EABI version %d"),
+ (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
return FALSE;
{
if (in_flags & EF_ARM_VFP_FLOAT)
_bfd_error_handler
- (_("error: %pB uses VFP instructions, whereas %pB does not"),
- ibfd, obfd);
+ (_("error: %pB uses %s instructions, whereas %pB does not"),
+ ibfd, "VFP", obfd);
else
_bfd_error_handler
- (_("error: %pB uses FPA instructions, whereas %pB does not"),
- ibfd, obfd);
+ (_("error: %pB uses %s instructions, whereas %pB does not"),
+ ibfd, "FPA", obfd);
flags_compatible = FALSE;
}
{
if (in_flags & EF_ARM_MAVERICK_FLOAT)
_bfd_error_handler
- (_("error: %pB uses Maverick instructions, whereas %pB does not"),
- ibfd, obfd);
+ (_("error: %pB uses %s instructions, whereas %pB does not"),
+ ibfd, "Maverick", obfd);
else
_bfd_error_handler
- (_("error: %pB does not use Maverick instructions, whereas %pB does"),
- ibfd, obfd);
+ (_("error: %pB does not use %s instructions, whereas %pB does"),
+ ibfd, "Maverick", obfd);
flags_compatible = FALSE;
}
if (in_flags & EF_ARM_INTERWORK)
{
_bfd_error_handler
- (_("Warning: %pB supports interworking, whereas %pB does not"),
+ (_("warning: %pB supports interworking, whereas %pB does not"),
ibfd, obfd);
}
else
{
_bfd_error_handler
- (_("Warning: %pB does not support interworking, whereas %pB does"),
+ (_("warning: %pB does not support interworking, whereas %pB does"),
ibfd, obfd);
}
}
projects / deliverable / binutils-gdb.git / blobdiff