/* Motorola 68HC11/HC12-specific support for 32-bit ELF
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
- Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
This file is part of BFD, the Binary File Descriptor library.
MA 02110-1301, USA. */
#include "sysdep.h"
+#include "alloca-conf.h"
#include "bfd.h"
#include "bfdlink.h"
#include "libbfd.h"
static bfd_boolean m68hc11_elf_export_one_stub
(struct bfd_hash_entry *gen_entry, void *in_arg);
-static void scan_sections_for_abi (bfd*, asection*, PTR);
+static void scan_sections_for_abi (bfd*, asection*, void *);
struct m68hc11_scan_param
{
memset (ret, 0, amt);
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
_bfd_elf_link_hash_newfunc,
- sizeof (struct elf_link_hash_entry)))
+ sizeof (struct elf_link_hash_entry),
+ M68HC11_ELF_DATA))
{
free (ret);
return NULL;
ret->stub_bfd = NULL;
ret->stub_section = 0;
ret->add_stub_section = NULL;
- ret->sym_sec.abfd = NULL;
+ ret->sym_cache.abfd = NULL;
return ret;
}
return TRUE;
}
+/* Merge non-visibility st_other attributes, STO_M68HC12_FAR and
+ STO_M68HC12_INTERRUPT. */
+
+void
+elf32_m68hc11_merge_symbol_attribute (struct elf_link_hash_entry *h,
+ const Elf_Internal_Sym *isym,
+ bfd_boolean definition,
+ bfd_boolean dynamic ATTRIBUTE_UNUSED)
+{
+ if (definition)
+ h->other = ((isym->st_other & ~ELF_ST_VISIBILITY (-1))
+ | ELF_ST_VISIBILITY (h->other));
+}
+
/* External entry points for sizing and building linker stubs. */
/* Set up various things so that we can make a list of input sections
struct m68hc11_elf_link_hash_table *htab;
htab = m68hc11_elf_hash_table (info);
+ if (htab == NULL)
+ return -1;
- if (htab->root.root.creator->flavour != bfd_target_elf_flavour)
+ if (bfd_get_flavour (info->output_bfd) != bfd_target_elf_flavour)
return 0;
/* Count the number of input BFDs and find the top input section id.
unsigned int bfd_indx, bfd_count;
bfd_size_type amt;
asection *stub_sec;
-
struct m68hc11_elf_link_hash_table *htab = m68hc11_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
/* Stash our params away. */
htab->stub_bfd = stub_bfd;
htab->add_stub_section = add_stub_section;
for (input_bfd = info->input_bfds, bfd_count = 0;
input_bfd != NULL;
input_bfd = input_bfd->link_next)
- {
- bfd_count += 1;
- }
+ bfd_count += 1;
/* We want to read in symbol extension records only once. To do this
we need to read in the local symbols in parallel and save them for
input_bfd = input_bfd->link_next, bfd_indx++)
{
Elf_Internal_Shdr *symtab_hdr;
- Elf_Internal_Sym *local_syms;
struct elf_link_hash_entry ** sym_hashes;
sym_hashes = elf_sym_hashes (input_bfd);
if (!is_far)
continue;
- hdr = elf_elfsections (input_bfd)[sym->st_shndx];
- sym_sec = hdr->bfd_section;
+ if (sym->st_shndx >= elf_numsections (input_bfd))
+ sym_sec = NULL;
+ else
+ {
+ hdr = elf_elfsections (input_bfd)[sym->st_shndx];
+ sym_sec = hdr->bfd_section;
+ }
stub_name = (bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link,
sym->st_name));
info = (struct bfd_link_info *) in_arg;
htab = m68hc11_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
/* Massage our args to the form they really have. */
stub_entry = (struct elf32_m68hc11_stub_hash_entry *) gen_entry;
m68hc11_elf_get_bank_parameters (info);
htab = m68hc11_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
for (stub_sec = htab->stub_bfd->sections;
stub_sec != NULL;
unsigned i;
struct m68hc11_page_info *pinfo;
struct bfd_link_hash_entry *h;
+ struct m68hc11_elf_link_hash_table *htab;
+
+ htab = m68hc11_elf_hash_table (info);
+ if (htab == NULL)
+ return;
- pinfo = &m68hc11_elf_hash_table (info)->pinfo;
+ pinfo = & htab->pinfo;
if (pinfo->bank_param_initialized)
return;
{
Elf_Internal_Shdr * symtab_hdr;
struct elf_link_hash_entry ** sym_hashes;
- struct elf_link_hash_entry ** sym_hashes_end;
const Elf_Internal_Rela * rel;
const Elf_Internal_Rela * rel_end;
symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
- sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
- if (!elf_bad_symtab (abfd))
- sym_hashes_end -= symtab_hdr->sh_info;
-
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_M68HC11_GNU_VTENTRY:
- if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
+ BFD_ASSERT (h != NULL);
+ if (h != NULL
+ && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
return FALSE;
break;
}
const char *name = NULL;
struct m68hc11_page_info *pinfo;
const struct elf_backend_data * const ebd = get_elf_backend_data (input_bfd);
+ struct m68hc11_elf_link_hash_table *htab;
+ unsigned long e_flags;
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
+ e_flags = elf_elfheader (input_bfd)->e_flags;
+
+ htab = m68hc11_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
/* Get memory bank parameters. */
m68hc11_elf_get_bank_parameters (info);
- pinfo = &m68hc11_elf_hash_table (info)->pinfo;
+ pinfo = & htab->pinfo;
rel = relocs;
relend = relocs + input_section->reloc_count;
+
for (; rel < relend; rel++)
{
int r_type;
bfd_vma insn_addr;
bfd_vma insn_page;
bfd_boolean is_far = FALSE;
+ bfd_boolean is_xgate_symbol = FALSE;
+ bfd_boolean is_section_symbol = FALSE;
struct elf_link_hash_entry *h;
- const char* stub_name = 0;
+ bfd_vma val;
r_symndx = ELF32_R_SYM (rel->r_info);
r_type = ELF32_R_TYPE (rel->r_info);
if (r_type == R_M68HC11_GNU_VTENTRY
- || r_type == R_M68HC11_GNU_VTINHERIT )
+ || r_type == R_M68HC11_GNU_VTINHERIT)
continue;
(*ebd->elf_info_to_howto_rel) (input_bfd, &arel, rel);
+ sec->output_offset
+ sym->st_value);
is_far = (sym && (sym->st_other & STO_M68HC12_FAR));
- if (is_far)
- stub_name = (bfd_elf_string_from_elf_section
- (input_bfd, symtab_hdr->sh_link,
- sym->st_name));
+ is_xgate_symbol = (sym && (sym->st_target_internal));
+ is_section_symbol = ELF_ST_TYPE (sym->st_info) & STT_SECTION;
}
else
{
warned);
is_far = (h && (h->other & STO_M68HC12_FAR));
- stub_name = h->root.root.string;
+ is_xgate_symbol = (h && (h->target_internal));
}
- if (sec != NULL && elf_discarded_section (sec))
- {
- /* For relocs against symbols from removed linkonce sections,
- or sections discarded by a linker script, we just want the
- section contents zeroed. Avoid any special processing. */
- _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
- rel->r_info = 0;
- rel->r_addend = 0;
- continue;
- }
+ if (sec != NULL && discarded_section (sec))
+ RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
+ rel, 1, relend, howto, 0, contents);
if (info->relocatable)
{
if (is_far && ELF32_R_TYPE (rel->r_info) == R_M68HC11_16)
{
struct elf32_m68hc11_stub_hash_entry* stub;
- struct m68hc11_elf_link_hash_table *htab;
- htab = m68hc11_elf_hash_table (info);
stub = m68hc12_stub_hash_lookup (htab->stub_hash_table,
name, FALSE, FALSE);
if (stub)
phys_page = m68hc11_phys_page (pinfo, relocation + rel->r_addend);
switch (r_type)
{
+ case R_M68HC12_LO8XG:
+ /* This relocation is specific to XGATE IMM16 calls and will precede
+ a HI8. tc-m68hc11 only generates them in pairs.
+ Leave the relocation to the HI8XG step. */
+ r = bfd_reloc_ok;
+ r_type = R_M68HC11_NONE;
+ break;
+
+ case R_M68HC12_HI8XG:
+ /* This relocation is specific to XGATE IMM16 calls and must follow
+ a LO8XG. Does not actually check that it was a LO8XG.
+ Adjusts high and low bytes. */
+ relocation = phys_addr;
+ if ((e_flags & E_M68HC11_XGATE_RAMOFFSET)
+ && (relocation >= 0x2000))
+ relocation += 0xc000; /* HARDCODED RAM offset for XGATE. */
+
+ /* Fetch 16 bit value including low byte in previous insn. */
+ val = (bfd_get_8 (input_bfd, (bfd_byte*) contents + rel->r_offset) << 8)
+ | bfd_get_8 (input_bfd, (bfd_byte*) contents + rel->r_offset - 2);
+
+ /* Add on value to preserve carry, then write zero to high byte. */
+ relocation += val;
+
+ /* Write out top byte. */
+ bfd_put_8 (input_bfd, (relocation >> 8) & 0xff,
+ (bfd_byte*) contents + rel->r_offset);
+
+ /* Write out low byte to previous instruction. */
+ bfd_put_8 (input_bfd, relocation & 0xff,
+ (bfd_byte*) contents + rel->r_offset - 2);
+
+ /* Mark as relocation completed. */
+ r = bfd_reloc_ok;
+ r_type = R_M68HC11_NONE;
+ break;
+
+ /* The HI8 and LO8 relocs are generated by %hi(expr) %lo(expr)
+ assembler directives. %hi does not support carry. */
+ case R_M68HC11_HI8:
+ case R_M68HC11_LO8:
+ relocation = phys_addr;
+ break;
+
case R_M68HC11_24:
/* Reloc used by 68HC12 call instruction. */
bfd_put_16 (input_bfd, phys_addr,
insn_page = m68hc11_phys_page (pinfo, insn_addr);
+ /* If we are linking an S12 instruction against an XGATE symbol, we
+ need to change the offset of the symbol value so that it's correct
+ from the S12's perspective. */
+ if (is_xgate_symbol)
+ {
+ /* The ram in the global space is mapped to 0x2000 in the 16-bit
+ address space for S12 and 0xE000 in the 16-bit address space
+ for XGATE. */
+ if (relocation >= 0xE000)
+ {
+ /* We offset the address by the difference
+ between these two mappings. */
+ relocation -= 0xC000;
+ break;
+ }
+ else
+ {
+ const char * msg;
+ char * buf;
+
+ msg = _("XGATE address (%lx) is not within shared RAM"
+ "(0xE000-0xFFFF), therefore you must manually offset "
+ "the address, and possibly manage the page, in your "
+ "code.");
+ buf = alloca (strlen (msg) + 128);
+ sprintf (buf, msg, phys_addr);
+ if (!((*info->callbacks->warning) (info, buf, name, input_bfd,
+ input_section, insn_addr)))
+ return FALSE;
+ break;
+ }
+ }
+
if (m68hc11_addr_is_banked (pinfo, relocation + rel->r_addend)
&& m68hc11_addr_is_banked (pinfo, insn_addr)
- && phys_page != insn_page)
+ && phys_page != insn_page && !(e_flags & E_M68HC11_NO_BANK_WARNING))
{
- const char* msg;
- char* buf;
+ const char * msg;
+ char * buf;
msg = _("banked address [%lx:%04lx] (%lx) is not in the same bank "
"as current banked address [%lx:%04lx] (%lx)");
return FALSE;
break;
}
+
if (phys_page != 0 && insn_page == 0)
{
- const char* msg;
- char* buf;
+ const char * msg;
+ char * buf;
msg = _("reference to a banked address [%lx:%04lx] in the "
"normal address space at %04lx");
relocation = phys_addr;
break;
}
+
+ /* If we are linking an XGATE instruction against an S12 symbol, we
+ need to change the offset of the symbol value so that it's correct
+ from the XGATE's perspective. */
+ if (!strcmp (howto->name, "R_XGATE_IMM8_LO")
+ || !strcmp (howto->name, "R_XGATE_IMM8_HI"))
+ {
+ /* We can only offset S12 addresses that lie within the non-paged
+ area of RAM. */
+ if (!is_xgate_symbol && !is_section_symbol)
+ {
+ /* The ram in the global space is mapped to 0x2000 and stops at
+ 0x4000 in the 16-bit address space for S12 and 0xE000 in the
+ 16-bit address space for XGATE. */
+ if (relocation >= 0x2000 && relocation < 0x4000)
+ /* We offset the address by the difference
+ between these two mappings. */
+ relocation += 0xC000;
+ else
+ {
+ const char * msg;
+ char * buf;
+
+ /* Get virtual address of instruction having the relocation. */
+ insn_addr = input_section->output_section->vma
+ + input_section->output_offset + rel->r_offset;
+
+ msg = _("S12 address (%lx) is not within shared RAM"
+ "(0x2000-0x4000), therefore you must manually "
+ "offset the address in your code");
+ buf = alloca (strlen (msg) + 128);
+ sprintf (buf, msg, phys_addr);
+ if (!((*info->callbacks->warning) (info, buf, name, input_bfd,
+ input_section, insn_addr)))
+ return FALSE;
+ break;
+ }
+ }
+ }
+
if (r_type != R_M68HC11_NONE)
- r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ {
+ if ((r_type == R_M68HC12_PCREL_9) || (r_type == R_M68HC12_PCREL_10))
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset,
- relocation, rel->r_addend);
+ relocation - 2, rel->r_addend);
+ else
+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend);
+ }
if (r != bfd_reloc_ok)
{
flagword new_flags;
bfd_boolean ok = TRUE;
- /* Check if we have the same endianess */
+ /* Check if we have the same endianness */
if (!_bfd_generic_verify_endian_match (ibfd, obfd))
return FALSE;
else
fprintf (file, _(" [memory=flat]"));
+ if (elf_elfheader (abfd)->e_flags & E_M68HC11_XGATE_RAMOFFSET)
+ fprintf (file, _(" [XGATE RAM offsetting]"));
+
fputc ('\n', file);
return TRUE;
elf32_m68hc11_post_process_headers (bfd *abfd, struct bfd_link_info *link_info)
{
struct m68hc11_scan_param param;
+ struct m68hc11_elf_link_hash_table *htab;
+
+ if (link_info == NULL)
+ return;
- if (link_info == 0)
+ htab = m68hc11_elf_hash_table (link_info);
+ if (htab == NULL)
return;
m68hc11_elf_get_bank_parameters (link_info);
param.use_memory_banks = FALSE;
- param.pinfo = &m68hc11_elf_hash_table (link_info)->pinfo;
+ param.pinfo = & htab->pinfo;
+
bfd_map_over_sections (abfd, scan_sections_for_abi, ¶m);
+
if (param.use_memory_banks)
{
Elf_Internal_Ehdr * i_ehdrp;
i_ehdrp->e_flags |= E_M68HC12_BANKS;
}
}
-