/* Renesas RL78 specific support for 32-bit ELF.
- Copyright (C) 2011-2013 Free Software Foundation, Inc.
+ Copyright (C) 2011-2015 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
static reloc_howto_type rl78_elf_howto_table [] =
{
- RL78REL (NONE, 0, 0, 0, dont, FALSE),
+ RL78REL (NONE, 3, 0, 0, dont, FALSE),
RL78REL (DIR32, 2, 32, 0, signed, FALSE),
RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
RL78REL (DIR16, 1, 16, 0, dont, FALSE),
if (code == BFD_RELOC_RL78_32_OP)
return rl78_elf_howto_table + R_RL78_DIR32;
- for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
+ for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
if (rl78_reloc_map [i].bfd_reloc_val == code)
return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
- BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
+ if (r_type >= (unsigned int) R_RL78_max)
+ {
+ _bfd_error_handler (_("%A: invalid RL78 reloc number: %d"), abfd, r_type);
+ r_type = 0;
+ }
cache_ptr->howto = rl78_elf_howto_table + r_type;
}
\f
(*_bfd_error_handler) (_("- %s is G10, %s is not"),
bfd_get_filename (ibfd), bfd_get_filename (obfd));
}
+
+ if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
+ {
+ (*_bfd_error_handler)
+ (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
+
+ if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
+ (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
+ bfd_get_filename (obfd), bfd_get_filename (ibfd));
+ else
+ (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
+ bfd_get_filename (ibfd), bfd_get_filename (obfd));
+ }
}
return !error;
if (flags & E_FLAG_RL78_G10)
fprintf (file, _(" [G10]"));
+ if (flags & E_FLAG_RL78_64BIT_DOUBLES)
+ fprintf (file, _(" [64-bit doubles]"));
+
fputc ('\n', file);
return TRUE;
}
/* Likewise for local symbols, though that's somewhat less convenient
as we have to walk the list of input bfds and swap in symbol data. */
- for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
+ for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
{
bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
Elf_Internal_Shdr *symtab_hdr;
elf_link_hash_traverse (elf_hash_table (info),
rl78_relax_plt_realloc, &entry);
- for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
+ for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
{
bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
toaddr = alignment_rel->r_offset;
irel = elf_section_data (sec)->relocs;
+ if (irel == NULL)
+ {
+ _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
+ irel = elf_section_data (sec)->relocs;
+ }
+
irelend = irel + sec->reloc_count;
/* Actually delete the bytes. */
memset (contents + toaddr - count, 0x03, count);
/* Adjust all the relocs. */
- for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
+ for (; irel && irel < irelend; irel++)
{
/* Get the new reloc address. */
if (irel->r_offset > addr
61 F3 EF ad SKNH ; BR $rel8
*/
- if (irel->r_addend & RL78_RELAXA_BRA)
+ if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
{
/* SKIP opcodes that skip non-branches will have a relax tag
but no corresponding symbol to relax against; we just
}
- if (irel->r_addend & RL78_RELAXA_ADDR16)
+ if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16)
{
/*----------------------------------------------------------------------*/
/* Some insns have both a 16-bit address operand and an 8-bit
#define ELF_MACHINE_CODE EM_RL78
#define ELF_MAXPAGESIZE 0x1000
-#define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
+#define TARGET_LITTLE_SYM rl78_elf32_vec
#define TARGET_LITTLE_NAME "elf32-rl78"
#define elf_info_to_howto_rel NULL