/* AArch64-specific support for NN-bit ELF.
- Copyright (C) 2009-2016 Free Software Foundation, Inc.
+ Copyright (C) 2009-2017 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of BFD, the Binary File Descriptor library.
#define PLT_SMALL_ENTRY_SIZE (16)
#define PLT_TLSDESC_ENTRY_SIZE (32)
-/* Encoding of the nop instruction */
+/* Encoding of the nop instruction. */
#define INSN_NOP 0xd503201f
#define aarch64_compute_jump_table_size(htab) \
/* Basic data relocations. */
-#if ARCH_SIZE == 64
- HOWTO (R_AARCH64_NULL, /* type */
+ /* Deprecated, but retained for backwards compatibility. */
+ HOWTO64 (R_AARCH64_NULL, /* type */
0, /* rightshift */
3, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
-#else
HOWTO (R_AARCH64_NONE, /* type */
0, /* rightshift */
3, /* size (0 = byte, 1 = short, 2 = long) */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
-#endif
/* .xword: (S+A) */
HOWTO64 (AARCH64_R (ABS64), /* type */
HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
- 16, /* bitsize */
+ 17, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
- 16, /* bitsize */
+ 17, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
32, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
- 16, /* bitsize */
+ 17, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
/* Enable ADRP->ADR rewrite for erratum 843419 workaround. */
int fix_erratum_843419_adr;
+ /* Don't apply link-time values for dynamic relocations. */
+ int no_apply_dynamic_relocs;
+
/* The number of bytes in the initial entry in the PLT. */
bfd_size_type plt_header_size;
/* The number of bytes in the subsequent PLT etries. */
bfd_size_type plt_entry_size;
- /* Short-cuts to get to dynamic linker sections. */
- asection *sdynbss;
- asection *srelbss;
-
/* Small local sym cache. */
struct sym_cache sym_cache;
return stub_name;
}
+/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For
+ executable PLT slots where the executable never takes the address of those
+ functions, the function symbols are not added to the hash table. */
+
+static bfd_boolean
+elf_aarch64_hash_symbol (struct elf_link_hash_entry *h)
+{
+ if (h->plt.offset != (bfd_vma) -1
+ && !h->def_regular
+ && !h->pointer_equality_needed)
+ return FALSE;
+
+ return _bfd_elf_hash_symbol (h);
+}
+
+
/* Look up an entry in the stub hash. Stub entries are cached because
creating the stub name takes a bit of time. */
TRUE, FALSE);
if (stub_entry == NULL)
{
- (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
- section->owner, stub_name);
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%s: cannot create stub entry %s"),
+ section->owner, stub_name);
return NULL;
}
TRUE, FALSE);
if (stub_entry == NULL)
{
- (*_bfd_error_handler) (_("cannot create stub entry %s"), stub_name);
+ _bfd_error_handler (_("cannot create stub entry %s"), stub_name);
return NULL;
}
For scalar LD/ST instructions PAIR is FALSE, RT is returned and RT2
is set equal to RT.
- For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned.
-
- */
+ For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned. */
static bfd_boolean
aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
int no_enum_warn,
int no_wchar_warn, int pic_veneer,
int fix_erratum_835769,
- int fix_erratum_843419)
+ int fix_erratum_843419,
+ int no_apply_dynamic_relocs)
{
struct elf_aarch64_link_hash_table *globals;
globals->fix_erratum_835769 = fix_erratum_835769;
globals->fix_erratum_843419 = fix_erratum_843419;
globals->fix_erratum_843419_adr = TRUE;
+ globals->no_apply_dynamic_relocs = no_apply_dynamic_relocs;
BFD_ASSERT (is_aarch64_elf (output_bfd));
elf_aarch64_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
abfd = stub_entry->target_section->owner;
if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
- (*_bfd_error_handler)
- (_("%B: error: Erratum 835769 stub out "
- "of range (input file too large)"), abfd);
+ _bfd_error_handler
+ (_("%B: error: Erratum 835769 stub out "
+ "of range (input file too large)"), abfd);
target = stub_entry->target_value;
branch_insn = 0x14000000;
abfd = stub_entry->target_section->owner;
if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("%B: error: Erratum 843419 stub out "
"of range (input file too large)"), abfd);
return FALSE;
}
-/* Perform a relocation as part of a final link. */
+/* Perform a relocation as part of a final link. The input relocation type
+ should be TLS relaxed. */
+
static bfd_reloc_status_type
elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
bfd *input_bfd,
unsigned int r_type = howto->type;
bfd_reloc_code_real_type bfd_r_type
= elfNN_aarch64_bfd_reloc_from_howto (howto);
- bfd_reloc_code_real_type new_bfd_r_type;
unsigned long r_symndx;
bfd_byte *hit_data = contents + rel->r_offset;
bfd_vma place, off;
r_symndx = ELFNN_R_SYM (rel->r_info);
- /* It is possible to have linker relaxations on some TLS access
- models. Update our information here. */
- new_bfd_r_type = aarch64_tls_transition (input_bfd, info, r_type, h, r_symndx);
- if (new_bfd_r_type != bfd_r_type)
- {
- bfd_r_type = new_bfd_r_type;
- howto = elfNN_aarch64_howto_from_bfd_reloc (bfd_r_type);
- BFD_ASSERT (howto != NULL);
- r_type = howto->type;
- }
-
place = input_section->output_section->vma
+ input_section->output_offset + rel->r_offset;
else
name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
NULL);
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: relocation %s against STT_GNU_IFUNC "
"symbol `%s' isn't handled by %s"), input_bfd,
howto->name, name, __FUNCTION__);
bfd_set_error (bfd_error_bad_value);
return FALSE;
-#if ARCH_SIZE == 64
- case BFD_RELOC_AARCH64_32:
-#endif
case BFD_RELOC_AARCH64_NN:
if (rel->r_addend != 0)
{
else
name = bfd_elf_sym_name (input_bfd, symtab_hdr,
sym, NULL);
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: relocation %s against STT_GNU_IFUNC "
"symbol `%s' has non-zero addend: %d"),
input_bfd, howto->name, name, rel->r_addend);
*unresolved_reloc_p = FALSE;
return bfd_reloc_ok;
-#if ARCH_SIZE == 64
- case BFD_RELOC_AARCH64_32:
-#endif
case BFD_RELOC_AARCH64_NN:
/* When generating a shared object or relocatable executable, these
else if (h != NULL
&& h->dynindx != -1
&& (!bfd_link_pic (info)
- || !SYMBOLIC_BIND (info, h)
+ || !(bfd_link_pie (info)
+ || SYMBOLIC_BIND (info, h))
|| !h->def_regular))
outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
else
relocate the text and data segments independently,
so the symbol does not matter. */
symbol = 0;
+ relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE;
outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE));
outrel.r_addend += value;
}
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: relocation %s against external symbol `%s' can not be used"
" when making a shared object; recompile with -fPIC"),
input_bfd, elfNN_aarch64_howto_table[howto_index].name,
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
+ /* Fall through. */
case BFD_RELOC_AARCH64_16:
+#if ARCH_SIZE == 64
+ case BFD_RELOC_AARCH64_32:
+#endif
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_LDST128_LO12:
if (locals == NULL)
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Local symbol descriptor table be NULL when applying "
"relocation %s against local symbol"),
input_bfd, elfNN_aarch64_howto_table[howto_index].name);
if (locals == NULL)
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: Local symbol descriptor table be NULL when applying "
"relocation %s against local symbol"),
input_bfd, elfNN_aarch64_howto_table[howto_index].name);
howto, value);
}
+/* LP64 and ILP32 operates on x- and w-registers respectively.
+ Next definitions take into account the difference between
+ corresponding machine codes. R means x-register if the target
+ arch is LP64, and w-register if the target is ILP32. */
+
+#if ARCH_SIZE == 64
+# define add_R0_R0 (0x91000000)
+# define add_R0_R0_R1 (0x8b000020)
+# define add_R0_R1 (0x91400020)
+# define ldr_R0 (0x58000000)
+# define ldr_R0_mask(i) (i & 0xffffffe0)
+# define ldr_R0_x0 (0xf9400000)
+# define ldr_hw_R0 (0xf2a00000)
+# define movk_R0 (0xf2800000)
+# define movz_R0 (0xd2a00000)
+# define movz_hw_R0 (0xd2c00000)
+#else /*ARCH_SIZE == 32 */
+# define add_R0_R0 (0x11000000)
+# define add_R0_R0_R1 (0x0b000020)
+# define add_R0_R1 (0x11400020)
+# define ldr_R0 (0x18000000)
+# define ldr_R0_mask(i) (i & 0xbfffffe0)
+# define ldr_R0_x0 (0xb9400000)
+# define ldr_hw_R0 (0x72a00000)
+# define movk_R0 (0x72800000)
+# define movz_R0 (0x52a00000)
+# define movz_hw_R0 (0x52c00000)
+#endif
+
/* Handle TLS relaxations. Relaxing is possible for symbols that use
R_AARCH64_TLSDESC_ADR_{PAGE, LD64_LO12_NC, ADD_LO12_NC} during a static
link.
if (is_local)
{
/* GD->LE relaxation:
- adrp x0, :tlsgd:var => movz x0, :tprel_g1:var
+ adrp x0, :tlsgd:var => movz R0, :tprel_g1:var
or
- adrp x0, :tlsdesc:var => movz x0, :tprel_g1:var
- */
- bfd_putl32 (0xd2a00000, contents + rel->r_offset);
+ adrp x0, :tlsdesc:var => movz R0, :tprel_g1:var
+
+ Where R is x for LP64, and w for ILP32. */
+ bfd_putl32 (movz_R0, contents + rel->r_offset);
return bfd_reloc_continue;
}
else
if (is_local)
{
/* Tiny TLSDESC->LE relaxation:
- ldr x1, :tlsdesc:var => movz x0, #:tprel_g1:var
- adr x0, :tlsdesc:var => movk x0, #:tprel_g0_nc:var
+ ldr x1, :tlsdesc:var => movz R0, #:tprel_g1:var
+ adr x0, :tlsdesc:var => movk R0, #:tprel_g0_nc:var
.tlsdesccall var
blr x1 => nop
- */
+
+ Where R is x for LP64, and w for ILP32. */
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (0xd2a00000, contents + rel->r_offset);
- bfd_putl32 (0xf2800000, contents + rel->r_offset + 4);
+ bfd_putl32 (movz_R0, contents + rel->r_offset);
+ bfd_putl32 (movk_R0, contents + rel->r_offset + 4);
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
return bfd_reloc_continue;
}
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (0x58000000, contents + rel->r_offset);
+ bfd_putl32 (ldr_R0, contents + rel->r_offset);
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
return bfd_reloc_continue;
{
/* Tiny GD->LE relaxation:
adr x0, :tlsgd:var => mrs x1, tpidr_el0
- bl __tls_get_addr => add x0, x1, #:tprel_hi12:x, lsl #12
- nop => add x0, x0, #:tprel_lo12_nc:x
- */
+ bl __tls_get_addr => add R0, R1, #:tprel_hi12:x, lsl #12
+ nop => add R0, R0, #:tprel_lo12_nc:x
+
+ Where R is x for LP64, and x for Ilp32. */
/* First kill the tls_get_addr reloc on the bl instruction. */
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 0);
- bfd_putl32 (0x91400020, contents + rel->r_offset + 4);
- bfd_putl32 (0x91000000, contents + rel->r_offset + 8);
+ bfd_putl32 (add_R0_R1, contents + rel->r_offset + 4);
+ bfd_putl32 (add_R0_R0, contents + rel->r_offset + 8);
rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
AARCH64_R (TLSLE_ADD_TPREL_LO12_NC));
else
{
/* Tiny GD->IE relaxation:
- adr x0, :tlsgd:var => ldr x0, :gottprel:var
+ adr x0, :tlsgd:var => ldr R0, :gottprel:var
bl __tls_get_addr => mrs x1, tpidr_el0
- nop => add x0, x0, x1
- */
+ nop => add R0, R0, R1
+
+ Where R is x for LP64, and w for Ilp32. */
/* First kill the tls_get_addr reloc on the bl instruction. */
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (0x58000000, contents + rel->r_offset);
+ bfd_putl32 (ldr_R0, contents + rel->r_offset);
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
- bfd_putl32 (0x8b000020, contents + rel->r_offset + 8);
+ bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
return bfd_reloc_continue;
}
AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
rel[2].r_offset = rel->r_offset + 8;
- bfd_putl32 (0xd2c00000, contents + rel->r_offset + 0);
- bfd_putl32 (0xf2a00000, contents + rel->r_offset + 4);
- bfd_putl32 (0xf2800000, contents + rel->r_offset + 8);
+ bfd_putl32 (movz_hw_R0, contents + rel->r_offset + 0);
+ bfd_putl32 (ldr_hw_R0, contents + rel->r_offset + 4);
+ bfd_putl32 (movk_R0, contents + rel->r_offset + 8);
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
- bfd_putl32 (0x8b000020, contents + rel->r_offset + 16);
+ bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
}
else
{
*/
rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bfd_putl32 (0xd2a80000, contents + rel->r_offset + 0);
- bfd_putl32 (0x58000000, contents + rel->r_offset + 8);
+ bfd_putl32 (ldr_R0, contents + rel->r_offset + 8);
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
- bfd_putl32 (0x8b000020, contents + rel->r_offset + 16);
+ bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
}
return bfd_reloc_continue;
{
/* GD->LE relaxation:
ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var
- */
- bfd_putl32 (0xf2800000, contents + rel->r_offset);
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
+ bfd_putl32 (movk_R0, contents + rel->r_offset);
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
- ldr xd, [x0, #:tlsdesc_lo12:var] => ldr x0, [x0, #:gottprel_lo12:var]
- */
+ ldr xd, [x0, #:tlsdesc_lo12:var] => ldr R0, [x0, #:gottprel_lo12:var]
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
insn = bfd_getl32 (contents + rel->r_offset);
- insn &= 0xffffffe0;
- bfd_putl32 (insn, contents + rel->r_offset);
+ bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
return bfd_reloc_continue;
}
if (is_local)
{
/* GD->LE relaxation
- add x0, #:tlsgd_lo12:var => movk x0, :tprel_g0_nc:var
+ add x0, #:tlsgd_lo12:var => movk R0, :tprel_g0_nc:var
bl __tls_get_addr => mrs x1, tpidr_el0
- nop => add x0, x1, x0
- */
+ nop => add R0, R1, R0
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
/* First kill the tls_get_addr reloc on the bl instruction. */
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (0xf2800000, contents + rel->r_offset);
+ bfd_putl32 (movk_R0, contents + rel->r_offset);
bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
- bfd_putl32 (0x8b000020, contents + rel->r_offset + 8);
+ bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation
- ADD x0, #:tlsgd_lo12:var => ldr x0, [x0, #:gottprel_lo12:var]
+ ADD x0, #:tlsgd_lo12:var => ldr R0, [x0, #:gottprel_lo12:var]
BL __tls_get_addr => mrs x1, tpidr_el0
R_AARCH64_CALL26
- NOP => add x0, x1, x0
- */
+ NOP => add R0, R1, R0
+
+ Where R is x for lp64 mode, and w for ilp32 mode. */
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
/* Remove the relocation on the BL instruction. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (0xf9400000, contents + rel->r_offset);
-
/* We choose to fixup the BL and NOP instructions using the
offset from the second relocation to allow flexibility in
scheduling instructions between the ADD and BL. */
+ bfd_putl32 (ldr_R0_x0, contents + rel->r_offset);
bfd_putl32 (0xd53bd041, contents + rel[1].r_offset);
- bfd_putl32 (0x8b000020, contents + rel[1].r_offset + 4);
+ bfd_putl32 (add_R0_R0_R1, contents + rel[1].r_offset + 4);
return bfd_reloc_continue;
}
if (is_local)
{
/* GD->LE relaxation:
- ldr xd, [gp, xn] => movk x0, #:tprel_g0_nc:var
- */
- bfd_putl32 (0xf2800000, contents + rel->r_offset);
+ ldr xd, [gp, xn] => movk R0, #:tprel_g0_nc:var
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
+ bfd_putl32 (movk_R0, contents + rel->r_offset);
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
- ldr xd, [gp, xn] => ldr x0, [gp, xn]
- */
+ ldr xd, [gp, xn] => ldr R0, [gp, xn]
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
insn = bfd_getl32 (contents + rel->r_offset);
- insn &= 0xffffffe0;
- bfd_putl32 (insn, contents + rel->r_offset);
+ bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
return bfd_reloc_ok;
}
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
/* GD->LE relaxation:
- movk xd, #:tlsdesc_off_g0_nc:var => movk x0, #:tprel_g1_nc:var, lsl #16
+ movk xd, #:tlsdesc_off_g0_nc:var => movk R0, #:tprel_g1_nc:var, lsl #16
GD->IE relaxation:
- movk xd, #:tlsdesc_off_g0_nc:var => movk xd, #:gottprel_g0_nc:var
- */
+ movk xd, #:tlsdesc_off_g0_nc:var => movk Rd, #:gottprel_g0_nc:var
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
if (is_local)
- bfd_putl32 (0xf2a00000, contents + rel->r_offset);
+ bfd_putl32 (ldr_hw_R0, contents + rel->r_offset);
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
if (is_local)
{
/* GD->LE relaxation:
- movz xd, #:tlsdesc_off_g1:var => movz x0, #:tprel_g2:var, lsl #32
- */
- bfd_putl32 (0xd2c00000, contents + rel->r_offset);
+ movz xd, #:tlsdesc_off_g1:var => movz R0, #:tprel_g2:var, lsl #32
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
+ bfd_putl32 (movz_hw_R0, contents + rel->r_offset);
return bfd_reloc_continue;
}
else
{
/* GD->IE relaxation:
- movz xd, #:tlsdesc_off_g1:var => movz xd, #:gottprel_g1:var, lsl #16
- */
+ movz xd, #:tlsdesc_off_g1:var => movz Rd, #:gottprel_g1:var, lsl #16
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
insn = bfd_getl32 (contents + rel->r_offset);
- bfd_putl32 (0xd2a00000 | (insn & 0x1f), contents + rel->r_offset);
+ bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
return bfd_reloc_continue;
}
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
/* IE->LE relaxation:
- adrp xd, :gottprel:var => movz xd, :tprel_g1:var
- */
+ adrp xd, :gottprel:var => movz Rd, :tprel_g1:var
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
if (is_local)
{
insn = bfd_getl32 (contents + rel->r_offset);
- bfd_putl32 (0xd2a00000 | (insn & 0x1f), contents + rel->r_offset);
+ bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
}
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
/* IE->LE relaxation:
- ldr xd, [xm, #:gottprel_lo12:var] => movk xd, :tprel_g0_nc:var
- */
+ ldr xd, [xm, #:gottprel_lo12:var] => movk Rd, :tprel_g0_nc:var
+
+ Where R is x for lp64 mode, and w for ILP32 mode. */
if (is_local)
{
insn = bfd_getl32 (contents + rel->r_offset);
- bfd_putl32 (0xf2800000 | (insn & 0x1f), contents + rel->r_offset);
+ bfd_putl32 (movk_R0 | (insn & 0x1f), contents + rel->r_offset);
}
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
/* LD->LE relaxation (tiny):
adr x0, :tlsldm:x => mrs x0, tpidr_el0
- bl __tls_get_addr => add x0, x0, TCB_SIZE
- */
+ bl __tls_get_addr => add R0, R0, TCB_SIZE
+
+ Where R is x for lp64 mode, and w for ilp32 mode. */
if (is_local)
{
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
- bfd_putl32 (0x91004000, contents + rel->r_offset + 4);
+ bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
+ contents + rel->r_offset + 4);
return bfd_reloc_ok;
}
return bfd_reloc_continue;
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
/* LD->LE relaxation (small):
- add x0, #:tlsldm_lo12:x => add x0, x0, TCB_SIZE
+ add x0, #:tlsldm_lo12:x => add R0, R0, TCB_SIZE
bl __tls_get_addr => nop
- */
+
+ Where R is x for lp64 mode, and w for ilp32 mode. */
if (is_local)
{
BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
/* No need of CALL26 relocation for tls_get_addr. */
rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
- bfd_putl32 (0x91004000, contents + rel->r_offset + 0);
- bfd_putl32 (0xd503201f, contents + rel->r_offset + 4);
+ bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
+ contents + rel->r_offset + 0);
+ bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
return bfd_reloc_ok;
}
return bfd_reloc_continue;
if (howto == NULL)
{
- (*_bfd_error_handler)
+ /* xgettext:c-format */
+ _bfd_error_handler
(_("%B: unrecognized relocation (0x%x) in section `%A'"),
input_bfd, input_section, r_type);
return FALSE;
if (r_type != R_AARCH64_NONE && r_type != R_AARCH64_NULL
&& bfd_is_und_section (sec)
&& ELF_ST_BIND (sym->st_info) != STB_WEAK)
- {
- if (!info->callbacks->undefined_symbol
- (info, bfd_elf_string_from_elf_section
- (input_bfd, symtab_hdr->sh_link, sym->st_name),
- input_bfd, input_section, rel->r_offset, TRUE))
- return FALSE;
- }
+ (*info->callbacks->undefined_symbol)
+ (info, bfd_elf_string_from_elf_section
+ (input_bfd, symtab_hdr->sh_link, sym->st_name),
+ input_bfd, input_section, rel->r_offset, TRUE);
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
|| h->root.type == bfd_link_hash_defweak)
&& IS_AARCH64_TLS_RELOC (bfd_r_type) != (sym_type == STT_TLS))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
((sym_type == STT_TLS
+ /* xgettext:c-format */
? _("%B(%A+0x%lx): %s used with TLS symbol %s")
+ /* xgettext:c-format */
: _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
input_bfd,
input_section, (long) rel->r_offset, howto->name, name);
&& _bfd_elf_section_offset (output_bfd, info, input_section,
+rel->r_offset) != (bfd_vma) - 1)
{
- (*_bfd_error_handler)
- (_
- ("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
+ _bfd_error_handler
+ /* xgettext:c-format */
+ (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
input_bfd, input_section, (long) rel->r_offset, howto->name,
h->root.root.string);
return FALSE;
switch (r)
{
case bfd_reloc_overflow:
- if (!(*info->callbacks->reloc_overflow)
- (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
- input_bfd, input_section, rel->r_offset))
- return FALSE;
+ (*info->callbacks->reloc_overflow)
+ (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset);
if (real_r_type == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
|| real_r_type == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14)
{
break;
case bfd_reloc_undefined:
- if (!((*info->callbacks->undefined_symbol)
- (info, name, input_bfd, input_section,
- rel->r_offset, TRUE)))
- return FALSE;
+ (*info->callbacks->undefined_symbol)
+ (info, name, input_bfd, input_section, rel->r_offset, TRUE);
break;
case bfd_reloc_outofrange:
common_error:
BFD_ASSERT (error_message != NULL);
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->r_offset)))
- return FALSE;
+ (*info->callbacks->reloc_dangerous)
+ (info, error_message, input_bfd, input_section, rel->r_offset);
break;
}
}
object file when linking. */
static bfd_boolean
-elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
+elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
{
+ bfd *obfd = info->output_bfd;
flagword out_flags;
flagword in_flags;
bfd_boolean flags_compatible = TRUE;
asection *sec;
/* Check if we have the same endianess. */
- if (!_bfd_generic_verify_endian_match (ibfd, obfd))
+ if (!_bfd_generic_verify_endian_match (ibfd, info))
return FALSE;
if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G3:
-#if ARCH_SIZE == 64
- case BFD_RELOC_AARCH64_32:
-#endif
case BFD_RELOC_AARCH64_NN:
if (h != NULL && bfd_link_executable (info))
{
struct elf_link_hash_entry *h)
{
struct elf_aarch64_link_hash_table *htab;
- asection *s;
+ asection *s, *srel;
/* If this is a function, put it in the procedure linkage table. We
will fill in the contents of the procedure linkage table later,
/* We must generate a R_AARCH64_COPY reloc to tell the dynamic linker
to copy the initial value out of the dynamic object and into the
runtime process image. */
+ if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
+ {
+ s = htab->root.sdynrelro;
+ srel = htab->root.sreldynrelro;
+ }
+ else
+ {
+ s = htab->root.sdynbss;
+ srel = htab->root.srelbss;
+ }
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
{
- htab->srelbss->size += RELOC_SIZE (htab);
+ srel->size += RELOC_SIZE (htab);
h->needs_copy = 1;
}
- s = htab->sdynbss;
-
return _bfd_elf_adjust_dynamic_copy (info, h, s);
}
struct elf_link_hash_table *htab = elf_hash_table (info);
/* This function may be called more than once. */
- s = bfd_get_linker_section (abfd, ".got");
- if (s != NULL)
+ if (htab->sgot != NULL)
return TRUE;
flags = bed->dynamic_sec_flags;
if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
{
- (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
- r_symndx);
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%B: bad symbol index: %d"), abfd, r_symndx);
return FALSE;
}
if (h != NULL)
{
+ /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
+ This shows up in particular in an R_AARCH64_PREL64 in large model
+ when calculating the pc-relative address to .got section which is
+ used to initialize the gp register. */
+ if (h->root.root.string
+ && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
+ {
+ if (htab->root.dynobj == NULL)
+ htab->root.dynobj = abfd;
+
+ if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
+ return FALSE;
+
+ BFD_ASSERT (h == htab->root.hgot);
+ }
+
/* Create the ifunc sections for static executables. If we
never see an indirect function symbol nor we are building
a static executable, those sections will be empty and
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
-#if ARCH_SIZE == 64
- case BFD_RELOC_AARCH64_32:
-#endif
case BFD_RELOC_AARCH64_NN:
if (htab->root.dynobj == NULL)
htab->root.dynobj = abfd;
break;
}
- /* It is referenced by a non-shared object. */
+ /* It is referenced by a non-shared object. */
h->ref_regular = 1;
h->root.non_ir_ref = 1;
}
switch (bfd_r_type)
{
-#if ARCH_SIZE == 64
- case BFD_RELOC_AARCH64_32:
-#endif
case BFD_RELOC_AARCH64_NN:
/* We don't need to handle relocs into sections not going into
if (bfd_link_pic (info))
{
int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
- (*_bfd_error_handler)
+ _bfd_error_handler
+ /* xgettext:c-format */
(_("%B: relocation %s against `%s' can not be used when making "
"a shared object; recompile with -fPIC"),
abfd, elfNN_aarch64_howto_table[howto_index].name,
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
+ /* Fall through. */
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
elfNN_aarch64_create_dynamic_sections (bfd *dynobj,
struct bfd_link_info *info)
{
- struct elf_aarch64_link_hash_table *htab;
-
/* We need to create .got section. */
if (!aarch64_elf_create_got_section (dynobj, info))
return FALSE;
- if (!_bfd_elf_create_dynamic_sections (dynobj, info))
- return FALSE;
-
- htab = elf_aarch64_hash_table (info);
- htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
- if (!bfd_link_pic (info))
- htab->srelbss = bfd_get_linker_section (dynobj, ".rela.bss");
-
- if (!htab->sdynbss || (!bfd_link_pic (info) && !htab->srelbss))
- abort ();
-
- return TRUE;
+ return _bfd_elf_create_dynamic_sections (dynobj, info);
}
because we will also be presented with the concrete instance of
the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
called to copy all relevant data from the generic to the concrete
- symbol instance.
- */
+ symbol instance. */
if (h->root.type == bfd_link_hash_indirect)
return TRUE;
because we will also be presented with the concrete instance of
the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
called to copy all relevant data from the generic to the concrete
- symbol instance.
- */
+ symbol instance. */
if (h->root.type == bfd_link_hash_indirect)
return TRUE;
&& h->def_regular)
return _bfd_elf_allocate_ifunc_dyn_relocs (info, h,
&eh->dyn_relocs,
+ NULL,
htab->plt_entry_size,
htab->plt_header_size,
- GOT_ENTRY_SIZE);
+ GOT_ENTRY_SIZE,
+ FALSE);
return TRUE;
}
/* This is the most important function of all . Innocuosly named
though ! */
+
static bfd_boolean
elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info)
|| s == htab->root.sgot
|| s == htab->root.sgotplt
|| s == htab->root.iplt
- || s == htab->root.igotplt || s == htab->sdynbss)
+ || s == htab->root.igotplt
+ || s == htab->root.sdynbss
+ || s == htab->root.sdynrelro)
{
/* Strip this section if we don't need it; see the
comment below. */
adjust_dynamic_symbol is called, and it is that
function which decides whether anything needs to go
into these sections. */
-
s->flags |= SEC_EXCLUDE;
continue;
}
/* Finish up dynamic symbol handling. We set the contents of various
dynamic sections here. */
+
static bfd_boolean
elfNN_aarch64_finish_dynamic_symbol (bfd *output_bfd,
struct bfd_link_info *info,
if (h->needs_copy)
{
Elf_Internal_Rela rela;
+ asection *s;
bfd_byte *loc;
/* This symbol needs a copy reloc. Set it up. */
-
if (h->dynindx == -1
|| (h->root.type != bfd_link_hash_defined
&& h->root.type != bfd_link_hash_defweak)
- || htab->srelbss == NULL)
+ || htab->root.srelbss == NULL)
abort ();
rela.r_offset = (h->root.u.def.value
+ h->root.u.def.section->output_offset);
rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (COPY));
rela.r_addend = 0;
- loc = htab->srelbss->contents;
- loc += htab->srelbss->reloc_count++ * RELOC_SIZE (htab);
+ if (h->root.u.def.section == htab->root.sdynrelro)
+ s = htab->root.sreldynrelro;
+ else
+ s = htab->root.srelbss;
+ loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
}
// GOTPLT entry for this.
br x17
PLT0 will be slightly different in ELF32 due to different got entry
- size.
- */
+ size. */
bfd_vma plt_got_2nd_ent; /* Address of GOT[2]. */
bfd_vma plt_base;
break;
case DT_JMPREL:
- dyn.d_un.d_ptr = htab->root.srelplt->output_section->vma;
+ s = htab->root.srelplt;
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
case DT_PLTRELSZ:
dyn.d_un.d_val = s->size;
break;
- case DT_RELASZ:
- /* The procedure linkage table relocs (DT_JMPREL) should
- not be included in the overall relocs (DT_RELA).
- Therefore, we override the DT_RELASZ entry here to
- make it not include the JMPREL relocs. Since the
- linker script arranges for .rela.plt to follow all
- other relocation sections, we don't have to worry
- about changing the DT_RELA entry. */
- if (htab->root.srelplt != NULL)
- {
- s = htab->root.srelplt;
- dyn.d_un.d_val -= s->size;
- }
- break;
-
case DT_TLSDESC_PLT:
s = htab->root.splt;
dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
{
if (bfd_is_abs_section (htab->root.sgotplt->output_section))
{
- (*_bfd_error_handler)
+ _bfd_error_handler
(_("discarded output section: `%A'"), htab->root.sgotplt);
return FALSE;
}
return plt->vma + PLT_ENTRY_SIZE + i * PLT_SMALL_ENTRY_SIZE;
}
+/* Returns TRUE if NAME is an AArch64 mapping symbol.
+ The ARM ELF standard defines $x (for A64 code) and $d (for data).
+ It also allows a period initiated suffix to be added to the symbol, ie:
+ "$[adtx]\.[:sym_char]+". */
+
+static bfd_boolean
+is_aarch64_mapping_symbol (const char * name)
+{
+ return name != NULL /* Paranoia. */
+ && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
+ the mapping symbols could have acquired a prefix.
+ We do not support this here, since such symbols no
+ longer conform to the ARM ELF ABI. */
+ && (name[1] == 'd' || name[1] == 'x')
+ && (name[2] == 0 || name[2] == '.');
+ /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
+ any characters that follow the period are legal characters for the body
+ of a symbol's name. For now we just assume that this is the case. */
+}
+
+/* Make sure that mapping symbols in object files are not removed via the
+ "strip --strip-unneeded" tool. These symbols might needed in order to
+ correctly generate linked files. Once an object file has been linked,
+ it should be safe to remove them. */
+
+static void
+elfNN_aarch64_backend_symbol_processing (bfd *abfd, asymbol *sym)
+{
+ if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
+ && sym->section != bfd_abs_section_ptr
+ && is_aarch64_mapping_symbol (sym->name))
+ sym->flags |= BSF_KEEP;
+}
+
/* We use this so we can override certain functions
(though currently we don't). */
#define elf_backend_write_section \
elfNN_aarch64_write_section
+#define elf_backend_symbol_processing \
+ elfNN_aarch64_backend_symbol_processing
+
#define elf_backend_can_refcount 1
#define elf_backend_can_gc_sections 1
#define elf_backend_plt_readonly 1
#define elf_backend_want_got_plt 1
#define elf_backend_want_plt_sym 0
+#define elf_backend_want_dynrelro 1
#define elf_backend_may_use_rel_p 0
#define elf_backend_may_use_rela_p 1
#define elf_backend_default_use_rela_p 1
#define elf_backend_rela_normal 1
+#define elf_backend_dtrel_excludes_plt 1
#define elf_backend_got_header_size (GOT_ENTRY_SIZE * 3)
#define elf_backend_default_execstack 0
#define elf_backend_extern_protected_data 1
+#define elf_backend_hash_symbol elf_aarch64_hash_symbol
#undef elf_backend_obj_attrs_section
#define elf_backend_obj_attrs_section ".ARM.attributes"