#include "elf/riscv.h"
#include "opcode/riscv.h"
#include "objalloc.h"
+#include "cpu-riscv.h"
+
+#ifdef HAVE_LIMITS_H
+#include <limits.h>
+#endif
+#ifndef CHAR_BIT
+#define CHAR_BIT 8
+#endif
/* Internal relocations used exclusively by the relaxation pass. */
#define R_RISCV_DELETE (R_RISCV_max + 1)
{
struct elf_link_hash_entry elf;
-#define GOT_UNKNOWN 0
-#define GOT_NORMAL 1
-#define GOT_TLS_GD 2
-#define GOT_TLS_IE 4
-#define GOT_TLS_LE 8
+#define GOT_UNKNOWN 0
+#define GOT_NORMAL 1
+#define GOT_TLS_GD 2
+#define GOT_TLS_IE 4
+#define GOT_TLS_LE 8
char tls_type;
};
#define riscv_elf_hash_entry(ent) \
- ((struct riscv_elf_link_hash_entry *)(ent))
+ ((struct riscv_elf_link_hash_entry *) (ent))
struct _bfd_riscv_elf_obj_tdata
{
/* The index of the last unused .rel.iplt slot. */
bfd_vma last_iplt_index;
+
+ /* Re-run the relaxations from relax pass 0 if TRUE. */
+ bfd_boolean restart_relax;
};
+/* Instruction access functions. */
+#define riscv_get_insn(bits, ptr) \
+ ((bits) == 16 ? bfd_getl16 (ptr) \
+ : (bits) == 32 ? bfd_getl32 (ptr) \
+ : (bits) == 64 ? bfd_getl64 (ptr) \
+ : (abort (), (bfd_vma) - 1))
+#define riscv_put_insn(bits, val, ptr) \
+ ((bits) == 16 ? bfd_putl16 (val, ptr) \
+ : (bits) == 32 ? bfd_putl32 (val, ptr) \
+ : (bits) == 64 ? bfd_putl64 (val, ptr) \
+ : (abort (), (void) 0))
/* Get the RISC-V ELF linker hash table from a link_info structure. */
#define riscv_elf_hash_table(p) \
bed->s->swap_reloca_out (abfd, rel, loc);
}
-/* PLT/GOT stuff. */
+/* Return true if a relocation is modifying an instruction. */
+static bfd_boolean
+riscv_is_insn_reloc (const reloc_howto_type *howto)
+{
+ /* Heuristic: A multibyte destination with a nontrivial mask
+ is an instruction */
+ return (howto->bitsize > 8
+ && howto->dst_mask != 0
+ && ~(howto->dst_mask | (howto->bitsize < sizeof(bfd_vma) * CHAR_BIT
+ ? (MINUS_ONE << howto->bitsize) : (bfd_vma)0)) != 0);
+}
+
+/* PLT/GOT stuff. */
#define PLT_HEADER_INSNS 8
#define PLT_ENTRY_INSNS 4
#define PLT_HEADER_SIZE (PLT_HEADER_INSNS * 4)
#define PLT_ENTRY_SIZE (PLT_ENTRY_INSNS * 4)
-
#define GOT_ENTRY_SIZE RISCV_ELF_WORD_BYTES
-
/* Reserve two entries of GOTPLT for ld.so, one is used for PLT resolver,
the other is used for link map. Other targets also reserve one more
entry used for runtime profile? */
addi t0, t2, %lo(.got.plt) # &.got.plt
srli t1, t1, log2(16/PTRSIZE) # .got.plt offset
l[w|d] t0, PTRSIZE(t0) # link map
- jr t3 */
+ jr t3 */
entry[0] = RISCV_UTYPE (AUIPC, X_T2, gotplt_offset_high);
entry[1] = RISCV_RTYPE (SUB, X_T1, X_T1, X_T3);
/* auipc t3, %hi(.got.plt entry)
l[w|d] t3, %lo(.got.plt entry)(t3)
jalr t1, t3
- nop */
+ nop */
entry[0] = RISCV_UTYPE (AUIPC, X_T3, RISCV_PCREL_HIGH_PART (got, addr));
entry[1] = RISCV_ITYPE (LREG, X_T3, X_T3, RISCV_PCREL_LOW_PART (got, addr));
}
/* Compute a hash of a local hash entry. We use elf_link_hash_entry
- for local symbol so that we can handle local STT_GNU_IFUNC symbols
- as global symbol. We reuse indx and dynstr_index for local symbol
- hash since they aren't used by global symbols in this backend. */
+ for local symbol so that we can handle local STT_GNU_IFUNC symbols
+ as global symbol. We reuse indx and dynstr_index for local symbol
+ hash since they aren't used by global symbols in this backend. */
static hashval_t
riscv_elf_local_htab_hash (const void *ptr)
}
ret->max_alignment = (bfd_vma) -1;
+ ret->restart_relax = FALSE;
/* Create hash table for local ifunc. */
ret->loc_hash_table = htab_try_create (1024,
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
+
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table or procedure linkage
table. */
case R_RISCV_CALL:
case R_RISCV_CALL_PLT:
- /* These symbol requires a procedure linkage table entry. We
- actually build the entry in adjust_dynamic_symbol,
+ /* These symbol requires a procedure linkage table entry.
+ We actually build the entry in adjust_dynamic_symbol,
because these might be a case of linking PIC code without
linking in any dynamic objects, in which case we don't
need to generate a procedure linkage table after all. */
htab = riscv_elf_hash_table (info);
BFD_ASSERT (htab != NULL);
+ /* When we are generating pde, make sure gp symbol is output as a
+ dynamic symbol. Then ld.so can set the gp register earlier, before
+ resolving the ifunc. */
+ if (!bfd_link_pic (info)
+ && htab->elf.dynamic_sections_created
+ && strcmp (h->root.root.string, RISCV_GP_SYMBOL) == 0
+ && !bfd_elf_link_record_dynamic_symbol (info, h))
+ return FALSE;
+
/* Since STT_GNU_IFUNC symbols must go through PLT, we handle them
in the allocate_ifunc_dynrelocs and allocate_local_ifunc_dynrelocs,
if they are defined and referenced in a non-shared object. */
break;
case R_RISCV_JAL:
- if (!VALID_UJTYPE_IMM (value))
+ if (!VALID_JTYPE_IMM (value))
return bfd_reloc_overflow;
- value = ENCODE_UJTYPE_IMM (value);
+ value = ENCODE_JTYPE_IMM (value);
break;
case R_RISCV_BRANCH:
- if (!VALID_SBTYPE_IMM (value))
+ if (!VALID_BTYPE_IMM (value))
return bfd_reloc_overflow;
- value = ENCODE_SBTYPE_IMM (value);
+ value = ENCODE_BTYPE_IMM (value);
break;
case R_RISCV_RVC_BRANCH:
- if (!VALID_RVC_B_IMM (value))
+ if (!VALID_CBTYPE_IMM (value))
return bfd_reloc_overflow;
- value = ENCODE_RVC_B_IMM (value);
+ value = ENCODE_CBTYPE_IMM (value);
break;
case R_RISCV_RVC_JUMP:
- if (!VALID_RVC_J_IMM (value))
+ if (!VALID_CJTYPE_IMM (value))
return bfd_reloc_overflow;
- value = ENCODE_RVC_J_IMM (value);
+ value = ENCODE_CJTYPE_IMM (value);
break;
case R_RISCV_RVC_LUI:
/* Linker relaxation can convert an address equal to or greater than
0x800 to slightly below 0x800. C.LUI does not accept zero as a
valid immediate. We can fix this by converting it to a C.LI. */
- bfd_vma insn = bfd_get (howto->bitsize, input_bfd,
- contents + rel->r_offset);
+ bfd_vma insn = riscv_get_insn (howto->bitsize,
+ contents + rel->r_offset);
insn = (insn & ~MATCH_C_LUI) | MATCH_C_LI;
- bfd_put (howto->bitsize, input_bfd, insn, contents + rel->r_offset);
- value = ENCODE_RVC_IMM (0);
+ riscv_put_insn (howto->bitsize, insn, contents + rel->r_offset);
+ value = ENCODE_CITYPE_IMM (0);
}
- else if (!VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (value)))
+ else if (!VALID_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value)))
return bfd_reloc_overflow;
else
- value = ENCODE_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (value));
+ value = ENCODE_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value));
break;
case R_RISCV_32:
return bfd_reloc_notsupported;
}
- bfd_vma word = bfd_get (howto->bitsize, input_bfd, contents + rel->r_offset);
+ bfd_vma word;
+ if (riscv_is_insn_reloc (howto))
+ word = riscv_get_insn (howto->bitsize, contents + rel->r_offset);
+ else
+ word = bfd_get (howto->bitsize, input_bfd, contents + rel->r_offset);
word = (word & ~howto->dst_mask) | (value & howto->dst_mask);
- bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset);
+ if (riscv_is_insn_reloc (howto))
+ riscv_put_insn (howto->bitsize, word, contents + rel->r_offset);
+ else
+ bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset);
return bfd_reloc_ok;
}
typedef struct riscv_pcrel_lo_reloc
{
- asection * input_section;
- struct bfd_link_info * info;
- reloc_howto_type * howto;
- const Elf_Internal_Rela * reloc;
- bfd_vma addr;
- const char * name;
- bfd_byte * contents;
- struct riscv_pcrel_lo_reloc * next;
+ asection *input_section;
+ struct bfd_link_info *info;
+ reloc_howto_type *howto;
+ const Elf_Internal_Rela *reloc;
+ bfd_vma addr;
+ const char *name;
+ bfd_byte *contents;
+ struct riscv_pcrel_lo_reloc *next;
} riscv_pcrel_lo_reloc;
typedef struct
static bfd_boolean
riscv_init_pcrel_relocs (riscv_pcrel_relocs *p)
{
-
p->lo_relocs = NULL;
p->hi_relocs = htab_create (1024, riscv_pcrel_reloc_hash,
riscv_pcrel_reloc_eq, free);
bfd_vma addr,
bfd_byte *contents,
const reloc_howto_type *howto,
- bfd *input_bfd)
+ bfd *input_bfd ATTRIBUTE_UNUSED)
{
/* We may need to reference low addreses in PC-relative modes even when the
- * PC is far away from these addresses. For example, undefweak references
- * need to produce the address 0 when linked. As 0 is far from the arbitrary
- * addresses that we can link PC-relative programs at, the linker can't
- * actually relocate references to those symbols. In order to allow these
- * programs to work we simply convert the PC-relative auipc sequences to
- * 0-relative lui sequences. */
+ PC is far away from these addresses. For example, undefweak references
+ need to produce the address 0 when linked. As 0 is far from the arbitrary
+ addresses that we can link PC-relative programs at, the linker can't
+ actually relocate references to those symbols. In order to allow these
+ programs to work we simply convert the PC-relative auipc sequences to
+ 0-relative lui sequences. */
if (bfd_link_pic (info))
return FALSE;
/* If it's possible to reference the symbol using auipc we do so, as that's
- * more in the spirit of the PC-relative relocations we're processing. */
+ more in the spirit of the PC-relative relocations we're processing. */
bfd_vma offset = addr - pc;
if (ARCH_SIZE == 32 || VALID_UTYPE_IMM (RISCV_CONST_HIGH_PART (offset)))
return FALSE;
/* If it's impossible to reference this with a LUI-based offset then don't
- * bother to convert it at all so users still see the PC-relative relocation
- * in the truncation message. */
+ bother to convert it at all so users still see the PC-relative relocation
+ in the truncation message. */
if (ARCH_SIZE > 32 && !VALID_UTYPE_IMM (RISCV_CONST_HIGH_PART (addr)))
return FALSE;
- rel->r_info = ELFNN_R_INFO(addr, R_RISCV_HI20);
+ rel->r_info = ELFNN_R_INFO (addr, R_RISCV_HI20);
- bfd_vma insn = bfd_get(howto->bitsize, input_bfd, contents + rel->r_offset);
+ bfd_vma insn = riscv_get_insn (howto->bitsize, contents + rel->r_offset);
insn = (insn & ~MASK_AUIPC) | MATCH_LUI;
- bfd_put(howto->bitsize, input_bfd, insn, contents + rel->r_offset);
+ riscv_put_insn (howto->bitsize, insn, contents + rel->r_offset);
return TRUE;
}
riscv_pcrel_hi_reloc *entry = htab_find (p->hi_relocs, &search);
if (entry == NULL
/* Check for overflow into bit 11 when adding reloc addend. */
- || (! (entry->value & 0x800)
+ || (!(entry->value & 0x800)
&& ((entry->value + r->reloc->r_addend) & 0x800)))
{
char *string = (entry == NULL
section, which means that the addend must be adjusted
accordingly. */
-static bfd_boolean
+static int
riscv_elf_relocate_section (bfd *output_bfd,
struct bfd_link_info *info,
bfd *input_bfd,
goto do_relocation;
default:
- bad_ifunc_reloc:
+ bad_ifunc_reloc:
if (h->root.root.string)
name = h->root.root.string;
else
}
}
- skip_ifunc:
+ skip_ifunc:
if (h != NULL)
name = h->root.root.string;
else
&& (!bfd_link_pic (info) || h->plt.offset == MINUS_ONE))
{
/* We can use x0 as the base register. */
- bfd_vma insn = bfd_get_32 (input_bfd,
- contents + rel->r_offset + 4);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset + 4);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
- bfd_put_32 (input_bfd, insn, contents + rel->r_offset + 4);
+ bfd_putl32 (insn, contents + rel->r_offset + 4);
/* Set the relocation value so that we get 0 after the pc
relative adjustment. */
relocation = sec_addr (input_section) + rel->r_offset;
if (VALID_ITYPE_IMM (relocation + rel->r_addend))
{
/* We can use tp as the base register. */
- bfd_vma insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
insn |= X_TP << OP_SH_RS1;
- bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
+ bfd_putl32 (insn, contents + rel->r_offset);
}
else
r = bfd_reloc_overflow;
if (x0_base || VALID_ITYPE_IMM (relocation + rel->r_addend - gp))
{
/* We can use x0 or gp as the base register. */
- bfd_vma insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
if (!x0_base)
{
rel->r_addend -= gp;
insn |= X_GP << OP_SH_RS1;
}
- bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
+ bfd_putl32 (insn, contents + rel->r_offset);
}
else
r = bfd_reloc_overflow;
|| (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
&& !resolved_to_zero)
|| h->root.type != bfd_link_hash_undefweak)
- && (! howto->pc_relative
+ && (!howto->pc_relative
|| !SYMBOL_CALLS_LOCAL (info, h)))
|| (!bfd_link_pic (info)
&& h != NULL
BFD_ASSERT (! unresolved_reloc);
bfd_put_NN (output_bfd,
dtpoff (info, relocation),
- (htab->elf.sgot->contents + off +
- RISCV_ELF_WORD_BYTES));
+ (htab->elf.sgot->contents
+ + off + RISCV_ELF_WORD_BYTES));
}
else
{
bfd_put_NN (output_bfd, 0,
- (htab->elf.sgot->contents + off +
- RISCV_ELF_WORD_BYTES));
+ (htab->elf.sgot->contents
+ + off + RISCV_ELF_WORD_BYTES));
outrel.r_info = ELFNN_R_INFO (indx, R_RISCV_TLS_DTPRELNN);
outrel.r_offset += RISCV_ELF_WORD_BYTES;
riscv_elf_append_rela (output_bfd, htab->elf.srelgot, &outrel);
htab->elf.sgot->contents + off);
bfd_put_NN (output_bfd,
dtpoff (info, relocation),
- (htab->elf.sgot->contents + off +
- RISCV_ELF_WORD_BYTES));
+ (htab->elf.sgot->contents
+ + off + RISCV_ELF_WORD_BYTES));
}
}
bfd_put_NN (output_bfd, 0,
htab->elf.sgot->contents + off + ie_off);
outrel.r_offset = sec_addr (htab->elf.sgot)
- + off + ie_off;
+ + off + ie_off;
outrel.r_addend = 0;
if (indx == 0)
outrel.r_addend = tpoff (info, relocation);
return FALSE;
for (i = 0; i < PLT_ENTRY_INSNS; i++)
- bfd_put_32 (output_bfd, plt_entry[i], loc + 4*i);
+ bfd_putl32 (plt_entry[i], loc + 4*i);
/* Fill in the initial value of the .got.plt entry. */
loc = gotplt->contents + (got_address - sec_addr (gotplt));
else
{
/* Generate R_RISCV_NN. */
- BFD_ASSERT((h->got.offset & 1) == 0);
+ BFD_ASSERT ((h->got.offset & 1) == 0);
BFD_ASSERT (h->dynindx != -1);
rela.r_info = ELFNN_R_INFO (h->dynindx, R_RISCV_NN);
rela.r_addend = 0;
else if (bfd_link_pic (info))
{
/* Generate R_RISCV_NN. */
- BFD_ASSERT((h->got.offset & 1) == 0);
+ BFD_ASSERT ((h->got.offset & 1) == 0);
BFD_ASSERT (h->dynindx != -1);
rela.r_info = ELFNN_R_INFO (h->dynindx, R_RISCV_NN);
rela.r_addend = 0;
or a pie link, or the symbol was forced to be local because
of a version file. The entry in the global offset table will
already have been initialized in the relocate_section function. */
- BFD_ASSERT((h->got.offset & 1) != 0);
+ BFD_ASSERT ((h->got.offset & 1) != 0);
asection *sec = h->root.u.def.section;
rela.r_info = ELFNN_R_INFO (0, R_RISCV_RELATIVE);
rela.r_addend = (h->root.u.def.value
}
else
{
- BFD_ASSERT((h->got.offset & 1) == 0);
+ BFD_ASSERT ((h->got.offset & 1) == 0);
BFD_ASSERT (h->dynindx != -1);
rela.r_info = ELFNN_R_INFO (h->dynindx, R_RISCV_NN);
rela.r_addend = 0;
return ret;
for (i = 0; i < PLT_HEADER_INSNS; i++)
- bfd_put_32 (output_bfd, plt_header[i], splt->contents + 4*i);
+ bfd_putl32 (plt_header[i], splt->contents + 4*i);
elf_section_data (splt->output_section)->this_hdr.sh_entsize
= PLT_ENTRY_SIZE;
}
}
-/* The information of architecture attribute. */
+/* The information of architecture elf attributes. */
static riscv_subset_list_t in_subsets;
static riscv_subset_list_t out_subsets;
static riscv_subset_list_t merged_subsets;
Arguments:
`bfd`: bfd handler.
- `in_arch`: Raw arch string for input object.
- `out_arch`: Raw arch string for output object.
- `pin`: subset list for input object, and it'll skip all merged subset after
- merge.
- `pout`: Like `pin`, but for output object. */
+ `in_arch`: Raw ISA string for input object.
+ `out_arch`: Raw ISA string for output object.
+ `pin`: Subset list for input object.
+ `pout`: Subset list for output object. */
static bfd_boolean
riscv_merge_std_ext (bfd *ibfd,
}
}
- if (in || out) {
- /* If we're here, either `in' or `out' is running longer than
- the other. So, we need to append the corresponding tail. */
- tail = in ? in : out;
-
- while (tail)
- {
- riscv_add_subset (&merged_subsets, tail->name, tail->major_version,
- tail->minor_version);
- tail = tail->next;
- }
- }
+ if (in || out)
+ {
+ /* If we're here, either `in' or `out' is running longer than
+ the other. So, we need to append the corresponding tail. */
+ tail = in ? in : out;
+ while (tail)
+ {
+ riscv_add_subset (&merged_subsets, tail->name, tail->major_version,
+ tail->minor_version);
+ tail = tail->next;
+ }
+ }
return TRUE;
}
if (in_arch != NULL && out_arch == NULL)
return in_arch;
- /* Parse subset from arch string. */
+ /* Parse subset from ISA string. */
if (!riscv_parse_subset (&rpe_in, in_arch))
return NULL;
else if (in_attr[Tag_RISCV_arch].s
&& out_attr[Tag_RISCV_arch].s)
{
- /* Check arch compatible. */
+ /* Check compatible. */
char *merged_arch =
riscv_merge_arch_attr_info (ibfd,
in_attr[Tag_RISCV_arch].s,
case Tag_RISCV_priv_spec:
case Tag_RISCV_priv_spec_minor:
case Tag_RISCV_priv_spec_revision:
- /* If we have handled the priv attributes, then skip it. */
+ /* If we have handled the privileged elf attributes, then skip it. */
if (!priv_attrs_merged)
{
unsigned int Tag_a = Tag_RISCV_priv_spec;
unsigned int Tag_b = Tag_RISCV_priv_spec_minor;
unsigned int Tag_c = Tag_RISCV_priv_spec_revision;
- enum riscv_priv_spec_class in_priv_spec;
- enum riscv_priv_spec_class out_priv_spec;
+ enum riscv_spec_class in_priv_spec = PRIV_SPEC_CLASS_NONE;
+ enum riscv_spec_class out_priv_spec = PRIV_SPEC_CLASS_NONE;
- /* Get the priv spec class from elf attribute numbers. */
+ /* Get the privileged spec class from elf attributes. */
riscv_get_priv_spec_class_from_numbers (in_attr[Tag_a].i,
in_attr[Tag_b].i,
in_attr[Tag_c].i,
out_attr[Tag_c].i,
&out_priv_spec);
- /* Allow to link the object without the priv specs. */
+ /* Allow to link the object without the privileged specs. */
if (out_priv_spec == PRIV_SPEC_CLASS_NONE)
{
out_attr[Tag_a].i = in_attr[Tag_a].i;
&& in_priv_spec != out_priv_spec)
{
_bfd_error_handler
- (_("warning: %pB use privilege spec version %u.%u.%u but "
+ (_("warning: %pB use privileged spec version %u.%u.%u but "
"the output use version %u.%u.%u"),
ibfd,
in_attr[Tag_a].i,
out_attr[Tag_b].i,
out_attr[Tag_c].i);
- /* The priv spec v1.9.1 can not be linked with other spec
- versions since the conflicts. We plan to drop the
- v1.9.1 in a year or two, so this confict should be
- removed in the future. */
+ /* The privileged spec v1.9.1 can not be linked with others
+ since the conflicts, so we plan to drop it in a year or
+ two. */
if (in_priv_spec == PRIV_SPEC_CLASS_1P9P1
|| out_priv_spec == PRIV_SPEC_CLASS_1P9P1)
{
_bfd_error_handler
- (_("warning: privilege spec version 1.9.1 can not be "
+ (_("warning: privileged spec version 1.9.1 can not be "
"linked with other spec versions"));
}
- /* Update the output priv spec to the newest one. */
+ /* Update the output privileged spec to the newest one. */
if (in_priv_spec > out_priv_spec)
{
out_attr[Tag_a].i = in_attr[Tag_a].i;
if (!riscv_merge_attributes (ibfd, info))
return FALSE;
- new_flags = elf_elfheader (ibfd)->e_flags;
- old_flags = elf_elfheader (obfd)->e_flags;
-
- if (! elf_flags_init (obfd))
- {
- elf_flags_init (obfd) = TRUE;
- elf_elfheader (obfd)->e_flags = new_flags;
- return TRUE;
- }
-
/* Check to see if the input BFD actually contains any sections. If not,
its flags may not have been initialized either, but it cannot actually
cause any incompatibility. Do not short-circuit dynamic objects; their
for (sec = ibfd->sections; sec != NULL; sec = sec->next)
{
+ null_input_bfd = FALSE;
+
if ((bfd_section_flags (sec)
& (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
== (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
- only_data_sections = FALSE;
-
- null_input_bfd = FALSE;
- break;
+ {
+ only_data_sections = FALSE;
+ break;
+ }
}
if (null_input_bfd || only_data_sections)
return TRUE;
}
+ new_flags = elf_elfheader (ibfd)->e_flags;
+ old_flags = elf_elfheader (obfd)->e_flags;
+
+ if (!elf_flags_init (obfd))
+ {
+ elf_flags_init (obfd) = TRUE;
+ elf_elfheader (obfd)->e_flags = new_flags;
+ return TRUE;
+ }
+
/* Disallow linking different float ABIs. */
if ((old_flags ^ new_flags) & EF_RISCV_FLOAT_ABI)
{
call to SYMBOL as well. Since both __wrap_SYMBOL and SYMBOL reference
the same symbol (which is __wrap_SYMBOL), but still exist as two
different symbols in 'sym_hashes', we don't want to adjust
- the global symbol __wrap_SYMBOL twice. */
- /* The same problem occurs with symbols that are versioned_hidden, as
+ the global symbol __wrap_SYMBOL twice.
+
+ The same problem occurs with symbols that are versioned_hidden, as
foo becomes an alias for foo@BAR, and hence they need the same
treatment. */
if (link_info->wrap_hash != NULL
riscv_pcgp_hi_reloc *c;
riscv_pcgp_lo_reloc *l;
- for (c = p->hi; c != NULL;)
+ for (c = p->hi; c != NULL; )
{
riscv_pcgp_hi_reloc *next = c->next;
free (c);
c = next;
}
- for (l = p->lo; l != NULL;)
+ for (l = p->lo; l != NULL; )
{
riscv_pcgp_lo_reloc *next = l->next;
free (l);
unsigned hi_sym, asection *sym_sec,
bfd_boolean undefined_weak)
{
- riscv_pcgp_hi_reloc *new = bfd_malloc (sizeof(*new));
+ riscv_pcgp_hi_reloc *new = bfd_malloc (sizeof (*new));
if (!new)
return FALSE;
new->hi_sec_off = hi_sec_off;
This is used by a lo part reloc to find the corresponding hi part reloc. */
static riscv_pcgp_hi_reloc *
-riscv_find_pcgp_hi_reloc(riscv_pcgp_relocs *p, bfd_vma hi_sec_off)
+riscv_find_pcgp_hi_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off)
{
riscv_pcgp_hi_reloc *c;
static bfd_boolean
riscv_record_pcgp_lo_reloc (riscv_pcgp_relocs *p, bfd_vma hi_sec_off)
{
- riscv_pcgp_lo_reloc *new = bfd_malloc (sizeof(*new));
+ riscv_pcgp_lo_reloc *new = bfd_malloc (sizeof (*new));
if (!new)
return FALSE;
new->hi_sec_off = hi_sec_off;
{
bfd_byte *contents = elf_section_data (sec)->this_hdr.contents;
bfd_vma foff = symval - (sec_addr (sec) + rel->r_offset);
- bfd_boolean near_zero = (symval + RISCV_IMM_REACH/2) < RISCV_IMM_REACH;
+ bfd_boolean near_zero = (symval + RISCV_IMM_REACH / 2) < RISCV_IMM_REACH;
bfd_vma auipc, jalr;
int rd, r_type, len = 4, rvc = elf_elfheader (abfd)->e_flags & EF_RISCV_RVC;
cause the PC-relative offset to later increase, so we need to add in the
max alignment of any section inclusive from the call to the target.
Otherwise, we only need to use the alignment of the current section. */
- if (VALID_UJTYPE_IMM (foff))
+ if (VALID_JTYPE_IMM (foff))
{
if (sym_sec->output_section == sec->output_section
&& sym_sec->output_section != bfd_abs_section_ptr)
}
/* See if this function call can be shortened. */
- if (!VALID_UJTYPE_IMM (foff) && !(!bfd_link_pic (link_info) && near_zero))
+ if (!VALID_JTYPE_IMM (foff) && !(!bfd_link_pic (link_info) && near_zero))
return TRUE;
/* Shorten the function call. */
BFD_ASSERT (rel->r_offset + 8 <= sec->size);
- auipc = bfd_get_32 (abfd, contents + rel->r_offset);
- jalr = bfd_get_32 (abfd, contents + rel->r_offset + 4);
+ auipc = bfd_getl32 (contents + rel->r_offset);
+ jalr = bfd_getl32 (contents + rel->r_offset + 4);
rd = (jalr >> OP_SH_RD) & OP_MASK_RD;
- rvc = rvc && VALID_RVC_J_IMM (foff);
+ rvc = rvc && VALID_CJTYPE_IMM (foff);
/* C.J exists on RV32 and RV64, but C.JAL is RV32-only. */
rvc = rvc && (rd == 0 || (rd == X_RA && ARCH_SIZE == 32));
auipc = rd == 0 ? MATCH_C_J : MATCH_C_JAL;
len = 2;
}
- else if (VALID_UJTYPE_IMM (foff))
+ else if (VALID_JTYPE_IMM (foff))
{
/* Relax to JAL rd, addr. */
r_type = R_RISCV_JAL;
auipc = MATCH_JAL | (rd << OP_SH_RD);
}
- else /* near_zero */
+ else
{
- /* Relax to JALR rd, x0, addr. */
+ /* Near zero, relax to JALR rd, x0, addr. */
r_type = R_RISCV_LO12_I;
auipc = MATCH_JALR | (rd << OP_SH_RD);
}
/* Replace the R_RISCV_CALL reloc. */
rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info), r_type);
/* Replace the AUIPC. */
- bfd_put (8 * len, abfd, auipc, contents + rel->r_offset);
+ riscv_put_insn (8 * len, auipc, contents + rel->r_offset);
/* Delete unnecessary JALR. */
*again = TRUE;
return (bfd_vma) 1 << max_alignment_power;
}
-/* Relax non-PIC global variable references. */
+/* Relax non-PIC global variable references to GP-relative references. */
static bfd_boolean
_bfd_riscv_relax_lui (bfd *abfd,
if (undefined_weak)
{
/* Change the RS1 to zero. */
- bfd_vma insn = bfd_get_32 (abfd, contents + rel->r_offset);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
- bfd_put_32 (abfd, insn, contents + rel->r_offset);
+ bfd_putl32 (insn, contents + rel->r_offset);
}
else
rel->r_info = ELFNN_R_INFO (sym, R_RISCV_GPREL_I);
if (undefined_weak)
{
/* Change the RS1 to zero. */
- bfd_vma insn = bfd_get_32 (abfd, contents + rel->r_offset);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
- bfd_put_32 (abfd, insn, contents + rel->r_offset);
+ bfd_putl32 (insn, contents + rel->r_offset);
}
else
rel->r_info = ELFNN_R_INFO (sym, R_RISCV_GPREL_S);
if (use_rvc
&& ELFNN_R_TYPE (rel->r_info) == R_RISCV_HI20
- && VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval))
- && VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval)
+ && VALID_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (symval))
+ && VALID_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (symval)
+ (link_info->relro ? 2 * ELF_MAXPAGESIZE
: ELF_MAXPAGESIZE)))
{
/* Replace LUI with C.LUI if legal (i.e., rd != x0 and rd != x2/sp). */
- bfd_vma lui = bfd_get_32 (abfd, contents + rel->r_offset);
+ bfd_vma lui = bfd_getl32 (contents + rel->r_offset);
unsigned rd = ((unsigned)lui >> OP_SH_RD) & OP_MASK_RD;
if (rd == 0 || rd == X_SP)
return TRUE;
lui = (lui & (OP_MASK_RD << OP_SH_RD)) | MATCH_C_LUI;
- bfd_put_32 (abfd, lui, contents + rel->r_offset);
+ bfd_putl32 (lui, contents + rel->r_offset);
/* Replace the R_RISCV_HI20 reloc. */
rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info), R_RISCV_RVC_LUI);
return TRUE;
}
-/* Relax non-PIC TLS references. */
+/* Relax non-PIC TLS references to TP-relative references. */
static bfd_boolean
_bfd_riscv_relax_tls_le (bfd *abfd,
}
}
-/* Implement R_RISCV_ALIGN by deleting excess alignment NOPs. */
+/* Implement R_RISCV_ALIGN by deleting excess alignment NOPs.
+ Once we've handled an R_RISCV_ALIGN, we can't relax anything else. */
static bfd_boolean
_bfd_riscv_relax_align (bfd *abfd, asection *sec,
bfd_vma aligned_addr = ((symval - 1) & ~(alignment - 1)) + alignment;
bfd_vma nop_bytes = aligned_addr - symval;
- /* Once we've handled an R_RISCV_ALIGN, we can't relax anything else. */
- sec->sec_flg0 = TRUE;
-
/* Make sure there are enough NOPs to actually achieve the alignment. */
if (rel->r_addend < nop_bytes)
{
/* Write as many RISC-V NOPs as we need. */
for (pos = 0; pos < (nop_bytes & -4); pos += 4)
- bfd_put_32 (abfd, RISCV_NOP, contents + rel->r_offset + pos);
+ bfd_putl32 (RISCV_NOP, contents + rel->r_offset + pos);
/* Write a final RVC NOP if need be. */
if (nop_bytes % 4 != 0)
- bfd_put_16 (abfd, RVC_NOP, contents + rel->r_offset + pos);
+ bfd_putl16 (RVC_NOP, contents + rel->r_offset + pos);
/* Delete the excess bytes. */
return riscv_relax_delete_bytes (abfd, sec, rel->r_offset + nop_bytes,
/* Relax PC-relative references to GP-relative references. */
static bfd_boolean
-_bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED,
- asection *sec,
- asection *sym_sec,
- struct bfd_link_info *link_info,
- Elf_Internal_Rela *rel,
- bfd_vma symval,
- bfd_vma max_alignment,
- bfd_vma reserve_size,
- bfd_boolean *again ATTRIBUTE_UNUSED,
- riscv_pcgp_relocs *pcgp_relocs,
- bfd_boolean undefined_weak)
+_bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED,
+ asection *sec,
+ asection *sym_sec,
+ struct bfd_link_info *link_info,
+ Elf_Internal_Rela *rel,
+ bfd_vma symval,
+ bfd_vma max_alignment,
+ bfd_vma reserve_size,
+ bfd_boolean *again ATTRIBUTE_UNUSED,
+ riscv_pcgp_relocs *pcgp_relocs,
+ bfd_boolean undefined_weak)
{
bfd_byte *contents = elf_section_data (sec)->this_hdr.contents;
bfd_vma gp = riscv_global_pointer_value (link_info);
BFD_ASSERT (rel->r_offset + 4 <= sec->size);
/* Chain the _LO relocs to their cooresponding _HI reloc to compute the
- * actual target address. */
+ actual target address. */
riscv_pcgp_hi_reloc hi_reloc;
memset (&hi_reloc, 0, sizeof (hi_reloc));
switch (ELFNN_R_TYPE (rel->r_info))
return TRUE;
/* If the cooresponding lo relocation has already been seen then it's not
- * safe to relax this relocation. */
+ safe to relax this relocation. */
if (riscv_find_pcgp_lo_reloc (pcgp_relocs, rel->r_offset))
return TRUE;
{
/* Change the RS1 to zero, and then modify the relocation
type to R_RISCV_LO12_I. */
- bfd_vma insn = bfd_get_32 (abfd, contents + rel->r_offset);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
- bfd_put_32 (abfd, insn, contents + rel->r_offset);
+ bfd_putl32 (insn, contents + rel->r_offset);
rel->r_info = ELFNN_R_INFO (sym, R_RISCV_LO12_I);
rel->r_addend = hi_reloc.hi_addend;
}
{
/* Change the RS1 to zero, and then modify the relocation
type to R_RISCV_LO12_S. */
- bfd_vma insn = bfd_get_32 (abfd, contents + rel->r_offset);
+ bfd_vma insn = bfd_getl32 (contents + rel->r_offset);
insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
- bfd_put_32 (abfd, insn, contents + rel->r_offset);
+ bfd_putl32 (insn, contents + rel->r_offset);
rel->r_info = ELFNN_R_INFO (sym, R_RISCV_LO12_S);
rel->r_addend = hi_reloc.hi_addend;
}
return TRUE;
}
-/* Relax PC-relative references to GP-relative references. */
+/* Delete the bytes for R_RISCV_DELETE. */
static bfd_boolean
_bfd_riscv_relax_delete (bfd *abfd,
bfd_vma symval ATTRIBUTE_UNUSED,
bfd_vma max_alignment ATTRIBUTE_UNUSED,
bfd_vma reserve_size ATTRIBUTE_UNUSED,
- bfd_boolean *again ATTRIBUTE_UNUSED,
+ bfd_boolean *again,
riscv_pcgp_relocs *pcgp_relocs ATTRIBUTE_UNUSED,
bfd_boolean undefined_weak ATTRIBUTE_UNUSED)
{
- if (!riscv_relax_delete_bytes(abfd, sec, rel->r_offset, rel->r_addend,
- link_info))
+ if (!riscv_relax_delete_bytes (abfd, sec, rel->r_offset, rel->r_addend,
+ link_info))
return FALSE;
- rel->r_info = ELFNN_R_INFO(0, R_RISCV_NONE);
+ rel->r_info = ELFNN_R_INFO (0, R_RISCV_NONE);
+ *again = TRUE;
return TRUE;
}
-/* Relax a section. Pass 0 shortens code sequences unless disabled. Pass 1
- deletes the bytes that pass 0 made obselete. Pass 2, which cannot be
- disabled, handles code alignment directives. */
+/* Called by after_allocation to check if we need to run the whole
+ relaxations again. */
+
+bfd_boolean
+bfd_elfNN_riscv_restart_relax_sections (struct bfd_link_info *info)
+{
+ struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table (info);
+ bfd_boolean restart = htab->restart_relax;
+ /* Reset the flag. */
+ htab->restart_relax = FALSE;
+ return restart;
+}
+
+/* Relax a section.
+
+ Pass 0: Shortens code sequences for LUI/CALL/TPREL relocs.
+ Pass 1: Shortens code sequences for PCREL relocs.
+ Pass 2: Deletes the bytes that pass 1 made obsolete.
+ Pass 3: Which cannot be disabled, handles code alignment directives.
+
+ The `again` is used to determine whether the relax pass itself needs to
+ run again. And the `restart_relax` is used to determine if we need to
+ run the whole relax passes again from 0 to 2. Once we have deleted the
+ code between relax pass 0 to 2, the restart_relax will be set to TRUE,
+ and we should run the whole relaxations again to give them more chances
+ to shorten the code.
+
+ Since we can't relax anything else once we start to handle the alignments,
+ we will only enter into the relax pass 3 when the restart_relax is FALSE. */
static bfd_boolean
_bfd_riscv_relax_section (bfd *abfd, asection *sec,
*again = FALSE;
if (bfd_link_relocatable (info)
- || sec->sec_flg0
|| (sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
|| (info->disable_target_specific_optimizations
- && info->relax_pass < 2))
+ && info->relax_pass < 2)
+ || (htab->restart_relax
+ && info->relax_pass == 3))
return TRUE;
riscv_init_pcgp_relocs (&pcgp_relocs);
continue;
}
else if (info->relax_pass == 1
- && !bfd_link_pic(info)
+ && !bfd_link_pic (info)
&& (type == R_RISCV_PCREL_HI20
|| type == R_RISCV_PCREL_LO12_I
|| type == R_RISCV_PCREL_LO12_S))
fail:
if (relocs != data->relocs)
free (relocs);
- riscv_free_pcgp_relocs(&pcgp_relocs, abfd, sec);
+ riscv_free_pcgp_relocs (&pcgp_relocs, abfd, sec);
+
+ if (*again)
+ htab->restart_relax = TRUE;
return ret;
}
# define PRPSINFO_OFFSET_PR_PID 16
# define PRPSINFO_OFFSET_PR_FNAME 32
# define PRPSINFO_OFFSET_PR_PSARGS 48
+# define PRPSINFO_PR_FNAME_LENGTH 16
+# define PRPSINFO_PR_PSARGS_LENGTH 80
#else
# define PRSTATUS_SIZE 376
# define PRSTATUS_OFFSET_PR_CURSIG 12
# define PRPSINFO_OFFSET_PR_PID 24
# define PRPSINFO_OFFSET_PR_FNAME 40
# define PRPSINFO_OFFSET_PR_PSARGS 56
+# define PRPSINFO_PR_FNAME_LENGTH 16
+# define PRPSINFO_PR_PSARGS_LENGTH 80
+#endif
+
+/* Write PRSTATUS and PRPSINFO note into core file. This will be called
+ before the generic code in elf.c. By checking the compiler defines we
+ only perform any action here if the generic code would otherwise not be
+ able to help us. The intention is that bare metal core dumps (where the
+ prstatus_t and/or prpsinfo_t might not be available) will use this code,
+ while non bare metal tools will use the generic elf code. */
+
+static char *
+riscv_write_core_note (bfd *abfd ATTRIBUTE_UNUSED,
+ char *buf ATTRIBUTE_UNUSED,
+ int *bufsiz ATTRIBUTE_UNUSED,
+ int note_type ATTRIBUTE_UNUSED, ...)
+{
+ switch (note_type)
+ {
+ default:
+ return NULL;
+
+#if !defined (HAVE_PRPSINFO_T)
+ case NT_PRPSINFO:
+ {
+ char data[PRPSINFO_SIZE] ATTRIBUTE_NONSTRING;
+ va_list ap;
+
+ va_start (ap, note_type);
+ memset (data, 0, sizeof (data));
+ strncpy (data + PRPSINFO_OFFSET_PR_FNAME, va_arg (ap, const char *),
+ PRPSINFO_PR_FNAME_LENGTH);
+#if GCC_VERSION == 8000 || GCC_VERSION == 8001
+ DIAGNOSTIC_PUSH;
+ /* GCC 8.0 and 8.1 warn about 80 equals destination size with
+ -Wstringop-truncation:
+ https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
+ */
+ DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
+#endif
+ strncpy (data + PRPSINFO_OFFSET_PR_PSARGS, va_arg (ap, const char *),
+ PRPSINFO_PR_PSARGS_LENGTH);
+#if GCC_VERSION == 8000 || GCC_VERSION == 8001
+ DIAGNOSTIC_POP;
#endif
+ va_end (ap);
+ return elfcore_write_note (abfd, buf, bufsiz,
+ "CORE", note_type, data, sizeof (data));
+ }
+#endif /* !HAVE_PRPSINFO_T */
+
+#if !defined (HAVE_PRSTATUS_T)
+ case NT_PRSTATUS:
+ {
+ char data[PRSTATUS_SIZE];
+ va_list ap;
+ long pid;
+ int cursig;
+ const void *greg;
+
+ va_start (ap, note_type);
+ memset (data, 0, sizeof(data));
+ pid = va_arg (ap, long);
+ bfd_put_32 (abfd, pid, data + PRSTATUS_OFFSET_PR_PID);
+ cursig = va_arg (ap, int);
+ bfd_put_16 (abfd, cursig, data + PRSTATUS_OFFSET_PR_CURSIG);
+ greg = va_arg (ap, const void *);
+ memcpy (data + PRSTATUS_OFFSET_PR_REG, greg,
+ PRSTATUS_SIZE - PRSTATUS_OFFSET_PR_REG - ARCH_SIZE / 8);
+ va_end (ap);
+ return elfcore_write_note (abfd, buf, bufsiz,
+ "CORE", note_type, data, sizeof (data));
+ }
+#endif /* !HAVE_PRSTATUS_T */
+ }
+}
/* Support for core dump NOTE sections. */
default:
return FALSE;
- case PRSTATUS_SIZE: /* sizeof(struct elf_prstatus) on Linux/RISC-V. */
+ case PRSTATUS_SIZE: /* sizeof(struct elf_prstatus) on Linux/RISC-V. */
/* pr_cursig */
elf_tdata (abfd)->core->signal
= bfd_get_16 (abfd, note->descdata + PRSTATUS_OFFSET_PR_CURSIG);
/* pr_fname */
elf_tdata (abfd)->core->program = _bfd_elfcore_strndup
- (abfd, note->descdata + PRPSINFO_OFFSET_PR_FNAME, 16);
+ (abfd, note->descdata + PRPSINFO_OFFSET_PR_FNAME,
+ PRPSINFO_PR_FNAME_LENGTH);
/* pr_psargs */
elf_tdata (abfd)->core->command = _bfd_elfcore_strndup
- (abfd, note->descdata + PRPSINFO_OFFSET_PR_PSARGS, 80);
+ (abfd, note->descdata + PRPSINFO_OFFSET_PR_PSARGS,
+ PRPSINFO_PR_PSARGS_LENGTH);
break;
}
}
/* Set the right mach type. */
+
static bfd_boolean
riscv_elf_object_p (bfd *abfd)
{
/* There are only two mach types in RISCV currently. */
- if (strcmp (abfd->xvec->name, "elf32-littleriscv") == 0)
+ if (strcmp (abfd->xvec->name, "elf32-littleriscv") == 0
+ || strcmp (abfd->xvec->name, "elf32-bigriscv") == 0)
bfd_default_set_arch_mach (abfd, bfd_arch_riscv, bfd_mach_riscv32);
else
bfd_default_set_arch_mach (abfd, bfd_arch_riscv, bfd_mach_riscv64);
return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
}
-#define TARGET_LITTLE_SYM riscv_elfNN_vec
-#define TARGET_LITTLE_NAME "elfNN-littleriscv"
+#define TARGET_LITTLE_SYM riscv_elfNN_vec
+#define TARGET_LITTLE_NAME "elfNN-littleriscv"
+#define TARGET_BIG_SYM riscv_elfNN_be_vec
+#define TARGET_BIG_NAME "elfNN-bigriscv"
-#define elf_backend_reloc_type_class riscv_reloc_type_class
+#define elf_backend_reloc_type_class riscv_reloc_type_class
-#define bfd_elfNN_bfd_reloc_name_lookup riscv_reloc_name_lookup
-#define bfd_elfNN_bfd_link_hash_table_create riscv_elf_link_hash_table_create
-#define bfd_elfNN_bfd_reloc_type_lookup riscv_reloc_type_lookup
+#define bfd_elfNN_bfd_reloc_name_lookup riscv_reloc_name_lookup
+#define bfd_elfNN_bfd_link_hash_table_create riscv_elf_link_hash_table_create
+#define bfd_elfNN_bfd_reloc_type_lookup riscv_reloc_type_lookup
#define bfd_elfNN_bfd_merge_private_bfd_data \
_bfd_riscv_elf_merge_private_bfd_data
-#define elf_backend_copy_indirect_symbol riscv_elf_copy_indirect_symbol
-#define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections
-#define elf_backend_check_relocs riscv_elf_check_relocs
-#define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol
-#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections
-#define elf_backend_relocate_section riscv_elf_relocate_section
-#define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol
-#define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections
-#define elf_backend_gc_mark_hook riscv_elf_gc_mark_hook
-#define elf_backend_plt_sym_val riscv_elf_plt_sym_val
-#define elf_backend_grok_prstatus riscv_elf_grok_prstatus
-#define elf_backend_grok_psinfo riscv_elf_grok_psinfo
-#define elf_backend_object_p riscv_elf_object_p
-#define elf_info_to_howto_rel NULL
-#define elf_info_to_howto riscv_info_to_howto_rela
-#define bfd_elfNN_bfd_relax_section _bfd_riscv_relax_section
-#define bfd_elfNN_mkobject elfNN_riscv_mkobject
-
-#define elf_backend_init_index_section _bfd_elf_init_1_index_section
-
-#define elf_backend_can_gc_sections 1
-#define elf_backend_can_refcount 1
-#define elf_backend_want_got_plt 1
-#define elf_backend_plt_readonly 1
-#define elf_backend_plt_alignment 4
-#define elf_backend_want_plt_sym 1
-#define elf_backend_got_header_size (ARCH_SIZE / 8)
-#define elf_backend_want_dynrelro 1
-#define elf_backend_rela_normal 1
-#define elf_backend_default_execstack 0
+#define elf_backend_copy_indirect_symbol riscv_elf_copy_indirect_symbol
+#define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections
+#define elf_backend_check_relocs riscv_elf_check_relocs
+#define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol
+#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections
+#define elf_backend_relocate_section riscv_elf_relocate_section
+#define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol
+#define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections
+#define elf_backend_gc_mark_hook riscv_elf_gc_mark_hook
+#define elf_backend_plt_sym_val riscv_elf_plt_sym_val
+#define elf_backend_grok_prstatus riscv_elf_grok_prstatus
+#define elf_backend_grok_psinfo riscv_elf_grok_psinfo
+#define elf_backend_object_p riscv_elf_object_p
+#define elf_backend_write_core_note riscv_write_core_note
+#define elf_info_to_howto_rel NULL
+#define elf_info_to_howto riscv_info_to_howto_rela
+#define bfd_elfNN_bfd_relax_section _bfd_riscv_relax_section
+#define bfd_elfNN_mkobject elfNN_riscv_mkobject
+
+#define elf_backend_init_index_section _bfd_elf_init_1_index_section
+
+#define elf_backend_can_gc_sections 1
+#define elf_backend_can_refcount 1
+#define elf_backend_want_got_plt 1
+#define elf_backend_plt_readonly 1
+#define elf_backend_plt_alignment 4
+#define elf_backend_want_plt_sym 1
+#define elf_backend_got_header_size (ARCH_SIZE / 8)
+#define elf_backend_want_dynrelro 1
+#define elf_backend_rela_normal 1
+#define elf_backend_default_execstack 0
#undef elf_backend_obj_attrs_vendor
-#define elf_backend_obj_attrs_vendor "riscv"
+#define elf_backend_obj_attrs_vendor "riscv"
#undef elf_backend_obj_attrs_arg_type
-#define elf_backend_obj_attrs_arg_type riscv_elf_obj_attrs_arg_type
+#define elf_backend_obj_attrs_arg_type riscv_elf_obj_attrs_arg_type
#undef elf_backend_obj_attrs_section_type
-#define elf_backend_obj_attrs_section_type SHT_RISCV_ATTRIBUTES
+#define elf_backend_obj_attrs_section_type SHT_RISCV_ATTRIBUTES
#undef elf_backend_obj_attrs_section
-#define elf_backend_obj_attrs_section ".riscv.attributes"
+#define elf_backend_obj_attrs_section ".riscv.attributes"
#include "elfNN-target.h"
projects / deliverable / binutils-gdb.git / blobdiff