/* AArch64-specific support for ELF.
- Copyright (C) 2009-2014 Free Software Foundation, Inc.
+ Copyright (C) 2009-2015 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of BFD, the Binary File Descriptor library.
#define MASK(n) ((1u << (n)) - 1)
-/* Decode the 26-bit offset of unconditional branch. */
-static inline uint32_t
-decode_branch_ofs_26 (uint32_t insn)
-{
- return insn & MASK (26);
-}
-
-/* Decode the 19-bit offset of conditional branch and compare & branch. */
-static inline uint32_t
-decode_cond_branch_ofs_19 (uint32_t insn)
-{
- return (insn >> 5) & MASK (19);
-}
-
-/* Decode the 19-bit offset of load literal. */
-static inline uint32_t
-decode_ld_lit_ofs_19 (uint32_t insn)
-{
- return (insn >> 5) & MASK (19);
-}
-
-/* Decode the 14-bit offset of test & branch. */
-static inline uint32_t
-decode_tst_branch_ofs_14 (uint32_t insn)
-{
- return (insn >> 5) & MASK (14);
-}
-
-/* Decode the 16-bit imm of move wide. */
-static inline uint32_t
-decode_movw_imm (uint32_t insn)
-{
- return (insn >> 5) & MASK (16);
-}
-
-/* Decode the 12-bit imm of add immediate. */
-static inline uint32_t
-decode_add_imm (uint32_t insn)
-{
- return (insn >> 10) & MASK (12);
-}
-
/* Reencode the imm field of add immediate. */
static inline uint32_t
reencode_add_imm (uint32_t insn, uint32_t imm)
size = bfd_get_reloc_size (howto);
switch (size)
{
+ case 0:
+ return status;
case 2:
contents = bfd_get_16 (abfd, address);
break;
contents = reencode_tst_branch_ofs_14 (contents, addend);
break;
+ case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
+ case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
contents = reencode_ld_lit_ofs_19 (contents, addend);
case BFD_RELOC_AARCH64_TLSDESC_CALL:
break;
+ case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
+ case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
- case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
- case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_G2_S:
/* Group relocations to create a 16, 32, 48 or 64 bit unsigned
data or abs address inline. */
+ case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
+ case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G0:
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G1:
case BFD_RELOC_AARCH64_NONE:
break;
+ case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
+ case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
+ case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
+ case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
value = (value + addend) & (bfd_vma) 0xffff0000;
break;
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
- value = (value + addend) & (bfd_vma) 0xfff000;
+ /* Mask off low 12bits, keep all other high bits, so that the later
+ generic code could check whehter there is overflow. */
+ value = (value + addend) & ~(bfd_vma) 0xfff;
break;
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0: