descriptor for a MIN_PLT entry, and requires one IPLT reloc.
MIN_PLT Created by PLTOFF entries against dynamic symbols. This
- does not reqire dynamic relocations. */
+ does not require dynamic relocations. */
#define NELEMS(a) ((int) (sizeof (a) / sizeof ((a)[0])))
bfd_vma dtpmod_offset;
bfd_vma dtprel_offset;
- /* The symbol table entry, if any, that this was derrived from. */
+ /* The symbol table entry, if any, that this was derived from. */
struct elf_link_hash_entry *h;
/* Used to count non-got, non-plt relocations for delayed sizing
asection *srel;
int type;
int count;
+
+ /* Is this reloc against readonly section? */
+ bfd_boolean reltext;
} *reloc_entries;
/* TRUE when the section contents have been updated. */
static int elfNN_ia64_additional_program_headers
PARAMS ((bfd *abfd));
static bfd_boolean elfNN_ia64_modify_segment_map
- PARAMS ((bfd *));
+ PARAMS ((bfd *, struct bfd_link_info *));
static bfd_boolean elfNN_ia64_is_local_label_name
PARAMS ((bfd *abfd, const char *name));
static bfd_boolean elfNN_ia64_dynamic_symbol_p
static asection *get_reloc_section
PARAMS ((bfd *abfd, struct elfNN_ia64_link_hash_table *ia64_info,
asection *sec, bfd_boolean create));
-static bfd_boolean count_dyn_reloc
- PARAMS ((bfd *abfd, struct elfNN_ia64_dyn_sym_info *dyn_i,
- asection *srel, int type));
static bfd_boolean elfNN_ia64_check_relocs
PARAMS ((bfd *abfd, struct bfd_link_info *info, asection *sec,
const Elf_Internal_Rela *relocs));
oor_branch_size = itanium ? sizeof (oor_ip) : sizeof (oor_brl);
}
+static void
+elfNN_ia64_relax_brl (bfd *abfd, bfd_byte *contents, bfd_vma off)
+{
+ int template;
+ bfd_byte *hit_addr;
+ bfd_vma t0, t1, i0, i1, i2;
+
+ hit_addr = (bfd_byte *) (contents + off);
+ hit_addr -= (long) hit_addr & 0x3;
+ t0 = bfd_get_64 (abfd, hit_addr);
+ t1 = bfd_get_64 (abfd, hit_addr + 8);
+
+ /* Keep the instruction in slot 0. */
+ i0 = (t0 >> 5) & 0x1ffffffffffLL;
+ /* Use nop.b for slot 1. */
+ i1 = 0x4000000000LL;
+ /* For slot 2, turn brl into br by masking out bit 40. */
+ i2 = (t1 >> 23) & 0x0ffffffffffLL;
+
+ /* Turn a MLX bundle into a MBB bundle with the same stop-bit
+ variety. */
+ template = 0x12;
+ if ((t0 & 0x1fLL) == 5)
+ template += 1;
+ t0 = (i1 << 46) | (i0 << 5) | template;
+ t1 = (i2 << 23) | (i1 >> 18);
+
+ bfd_put_64 (abfd, t0, hit_addr);
+ bfd_put_64 (abfd, t1, hit_addr + 8);
+}
\f
/* These functions do relaxation for IA-64 ELF. */
*again = FALSE;
/* Don't even try to relax for non-ELF outputs. */
- if (link_info->hash->creator->flavour != bfd_target_elf_flavour)
+ if (!is_elf_hash_table (link_info->hash))
return FALSE;
/* Nothing to do if there are no relocations or there is no need for
the relax finalize pass. */
if ((sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
- || (link_info->relax_finalizing
+ || (!link_info->need_relax_finalize
&& sec->need_finalize_relax == 0))
return TRUE;
case R_IA64_PCREL21BI:
case R_IA64_PCREL21M:
case R_IA64_PCREL21F:
- if (link_info->relax_finalizing)
+ /* In the finalize pass, all br relaxations are done. We can
+ skip it. */
+ if (!link_info->need_relax_finalize)
continue;
is_branch = TRUE;
break;
+ case R_IA64_PCREL60B:
+ /* We can't optimize brl to br before the finalize pass since
+ br relaxations will increase the code size. Defer it to
+ the finalize pass. */
+ if (link_info->need_relax_finalize)
+ {
+ sec->need_finalize_relax = 1;
+ continue;
+ }
+ is_branch = TRUE;
+ break;
+
case R_IA64_LTOFF22X:
case R_IA64_LDXMOV:
- if (!link_info->relax_finalizing)
+ /* We can't relax ldx/mov before the finalize pass since
+ br relaxations will increase the code size. Defer it to
+ the finalize pass. */
+ if (link_info->need_relax_finalize)
{
sec->need_finalize_relax = 1;
continue;
isym = isymbuf + ELFNN_R_SYM (irel->r_info);
if (isym->st_shndx == SHN_UNDEF)
- continue; /* We can't do anthing with undefined symbols. */
+ continue; /* We can't do anything with undefined symbols. */
else if (isym->st_shndx == SHN_ABS)
tsec = bfd_abs_section_ptr;
else if (isym->st_shndx == SHN_COMMON)
else
{
- /* We can't do anthing with undefined symbols. */
+ /* We can't do anything with undefined symbols. */
if (h->root.type == bfd_link_hash_undefined
|| h->root.type == bfd_link_hash_undefweak)
continue;
if (is_branch)
{
+ bfd_signed_vma offset;
+
reladdr = (sec->output_section->vma
+ sec->output_offset
+ roff) & (bfd_vma) -4;
/* If the branch is in range, no need to do anything. */
if ((bfd_signed_vma) (symaddr - reladdr) >= -0x1000000
&& (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0)
+ {
+ /* If the 60-bit branch is in 21-bit range, optimize it. */
+ if (r_type == R_IA64_PCREL60B)
+ {
+ elfNN_ia64_relax_brl (abfd, contents, roff);
+
+ irel->r_info
+ = ELF64_R_INFO (ELF64_R_SYM (irel->r_info),
+ R_IA64_PCREL21B);
+
+ /* If the original relocation offset points to slot
+ 1, change it to slot 2. */
+ if ((irel->r_offset & 3) == 1)
+ irel->r_offset += 1;
+ }
+
+ continue;
+ }
+ else if (r_type == R_IA64_PCREL60B)
continue;
/* If the branch and target are in the same section, you've
/* Resize the current section to make room for the new branch. */
trampoff = (sec->_cooked_size + 15) & (bfd_vma) -16;
+
+ /* If trampoline is out of range, there is nothing we
+ can do. */
+ offset = trampoff - (roff & (bfd_vma) -4);
+ if (offset < -0x1000000 || offset > 0x0FFFFF0)
+ continue;
+
amt = trampoff + size;
contents = (bfd_byte *) bfd_realloc (contents, amt);
if (contents == NULL)
}
else
{
+ /* If trampoline is out of range, there is nothing we
+ can do. */
+ offset = f->trampoff - (roff & (bfd_vma) -4);
+ if (offset < -0x1000000 || offset > 0x0FFFFF0)
+ continue;
+
/* Nop out the reloc, since we're finalizing things here. */
irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE);
}
- /* Fix up the existing branch to hit the trampoline. Hope like
- hell this doesn't overflow too. */
- if (elfNN_ia64_install_value (abfd, contents + roff,
- f->trampoff - (roff & (bfd_vma) -4),
+ /* Fix up the existing branch to hit the trampoline. */
+ if (elfNN_ia64_install_value (abfd, contents + roff, offset,
r_type) != bfd_reloc_ok)
goto error_return;
/* ??? Resize .rela.got too. */
}
- if (link_info->relax_finalizing)
+ if (!link_info->need_relax_finalize)
sec->need_finalize_relax = 0;
*again = changed_contents || changed_relocs;
}
static bfd_boolean
-elfNN_ia64_modify_segment_map (abfd)
+elfNN_ia64_modify_segment_map (abfd, info)
bfd *abfd;
+ struct bfd_link_info *info ATTRIBUTE_UNUSED;
{
struct elf_segment_map *m, **pm;
Elf_Internal_Shdr *hdr;
(ind->root.elf_link_hash_flags
& (ELF_LINK_HASH_REF_DYNAMIC
| ELF_LINK_HASH_REF_REGULAR
- | ELF_LINK_HASH_REF_REGULAR_NONWEAK));
+ | ELF_LINK_HASH_REF_REGULAR_NONWEAK
+ | ELF_LINK_HASH_NEEDS_PLT));
if (ind->root.root.type != bfd_link_hash_indirect)
return;
}
/* Create function descriptor section (.opd). This section is called .opd
- because it contains "official prodecure descriptors". The "official"
+ because it contains "official procedure descriptors". The "official"
refers to the fact that these descriptors are used when taking the address
of a procedure, thus ensuring a unique address for each procedure. */
if (info->pie)
{
asection *fptr_rel;
- fptr_rel = bfd_make_section(abfd, ".rela.opd");
+ fptr_rel = bfd_make_section(dynobj, ".rela.opd");
if (fptr_rel == NULL
- || !bfd_set_section_flags (abfd, fptr_rel,
+ || !bfd_set_section_flags (dynobj, fptr_rel,
(SEC_ALLOC | SEC_LOAD
| SEC_HAS_CONTENTS
| SEC_IN_MEMORY
return NULL;
}
- if (sec->flags & SEC_READONLY)
- ia64_info->reltext = 1;
-
return srel;
}
static bfd_boolean
-count_dyn_reloc (abfd, dyn_i, srel, type)
- bfd *abfd;
- struct elfNN_ia64_dyn_sym_info *dyn_i;
- asection *srel;
- int type;
+count_dyn_reloc (bfd *abfd, struct elfNN_ia64_dyn_sym_info *dyn_i,
+ asection *srel, int type, bfd_boolean reltext)
{
struct elfNN_ia64_dyn_reloc_entry *rent;
rent->count = 0;
dyn_i->reloc_entries = rent;
}
+ rent->reltext = reltext;
rent->count++;
return TRUE;
if (!srel)
return FALSE;
}
- if (!count_dyn_reloc (abfd, dyn_i, srel, dynrel_type))
+ if (!count_dyn_reloc (abfd, dyn_i, srel, dynrel_type,
+ (sec->flags & SEC_READONLY) != 0))
return FALSE;
}
}
default:
abort ();
}
+ if (rent->reltext)
+ ia64_info->reltext = 1;
rent->srel->_raw_size += sizeof (ElfNN_External_Rela) * count;
}
if (strip)
ia64_info->fptr_sec = NULL;
}
+ else if (sec == ia64_info->rel_fptr_sec)
+ {
+ if (strip)
+ ia64_info->rel_fptr_sec = NULL;
+ else
+ /* We use the reloc_count field as a counter if we need to
+ copy relocs into the output file. */
+ sec->reloc_count = 0;
+ }
else if (sec == ia64_info->plt_sec)
{
if (strip)
elfNN_ia64_tprel_base (info)
struct bfd_link_info *info;
{
- struct elf_link_tls_segment *tls_segment
- = elf_hash_table (info)->tls_segment;
+ asection *tls_sec = elf_hash_table (info)->tls_sec;
- BFD_ASSERT (tls_segment != NULL);
- return (tls_segment->start
- - align_power ((bfd_vma) 16, tls_segment->align));
+ BFD_ASSERT (tls_sec != NULL);
+ return tls_sec->vma - align_power ((bfd_vma) 16, tls_sec->alignment_power);
}
/* Return the base VMA address which should be subtracted from real addresses
elfNN_ia64_dtprel_base (info)
struct bfd_link_info *info;
{
- BFD_ASSERT (elf_hash_table (info)->tls_segment != NULL);
- return elf_hash_table (info)->tls_segment->start;
+ BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL);
+ return elf_hash_table (info)->tls_sec->vma;
}
/* Called through qsort to sort the .IA_64.unwind section during a
if (r_symndx < symtab_hdr->sh_info)
{
/* Reloc against local symbol. */
+ asection *msec;
sym = local_syms + r_symndx;
sym_sec = local_sections[r_symndx];
- value = _bfd_elf_rela_local_sym (output_bfd, sym, sym_sec, rel);
+ msec = sym_sec;
+ value = _bfd_elf_rela_local_sym (output_bfd, sym, &msec, rel);
if ((sym_sec->flags & SEC_MERGE)
&& ELF_ST_TYPE (sym->st_info) == STT_SECTION
&& sym_sec->sec_info_type == ELF_INFO_TYPE_MERGE)
if (loc_h && ! loc_h->sec_merge_done)
{
struct elfNN_ia64_dyn_sym_info *dynent;
- asection *msec;
for (dynent = loc_h->info; dynent; dynent = dynent->next)
{
BFD_ASSERT (srel != NULL);
+ switch (r_type)
+ {
+ case R_IA64_IMM14:
+ case R_IA64_IMM22:
+ case R_IA64_IMM64:
+ /* ??? People shouldn't be doing non-pic code in
+ shared libraries nor dynamic executables. */
+ (*_bfd_error_handler)
+ (_("%s: non-pic code with imm relocation against dynamic symbol `%s'"),
+ bfd_archive_filename (input_bfd),
+ h->root.root.string);
+ ret_val = FALSE;
+ continue;
+
+ default:
+ break;
+ }
+
/* If we don't need dynamic symbol lookup, find a
matching RELATIVE relocation. */
dyn_r_type = r_type;
break;
default:
- /* We can't represent this without a dynamic symbol.
- Adjust the relocation to be against an output
- section symbol, which are always present in the
- dynamic symbol table. */
- /* ??? People shouldn't be doing non-pic code in
- shared libraries. Hork. */
- (*_bfd_error_handler)
- (_("%s: linking non-pic code in a shared library"),
- bfd_archive_filename (input_bfd));
- ret_val = FALSE;
- continue;
+ break;
}
dynindx = 0;
addend = value;