/* IA-64 support for 64-bit ELF
- Copyright 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of BFD, the Binary File Descriptor library.
/* TRUE for the different kinds of linker data we want created. */
unsigned want_got : 1;
+ unsigned want_gotx : 1;
unsigned want_fptr : 1;
unsigned want_ltoff_fptr : 1;
unsigned want_plt : 1;
bfd_size_type minplt_entries; /* number of minplt entries */
unsigned reltext : 1; /* are there relocs against readonly sections? */
+ unsigned self_dtpmod_done : 1;/* has self DTPMOD entry been finished? */
+ bfd_vma self_dtpmod_offset; /* .got offset to self DTPMOD entry */
struct elfNN_ia64_local_hash_table loc_hash_table;
};
+struct elfNN_ia64_allocate_data
+{
+ struct bfd_link_info *info;
+ bfd_size_type ofs;
+};
+
#define elfNN_ia64_hash_table(p) \
((struct elfNN_ia64_link_hash_table *) ((p)->hash))
static bfd_boolean elfNN_ia64_relax_section
PARAMS((bfd *abfd, asection *sec, struct bfd_link_info *link_info,
bfd_boolean *again));
+static void elfNN_ia64_relax_ldxmov
+ PARAMS((bfd *abfd, bfd_byte *contents, bfd_vma off));
static bfd_boolean is_unwind_section_name
PARAMS ((bfd *abfd, const char *));
static bfd_boolean elfNN_ia64_section_from_shdr
PARAMS ((struct bfd_link_info *info));
static int elfNN_ia64_unwind_entry_compare
PARAMS ((const PTR, const PTR));
+static bfd_boolean elfNN_ia64_choose_gp
+ PARAMS ((bfd *abfd, struct bfd_link_info *info));
static bfd_boolean elfNN_ia64_final_link
PARAMS ((bfd *abfd, struct bfd_link_info *info));
static bfd_boolean elfNN_ia64_relocate_section
reloc->address += input_section->output_offset;
return bfd_reloc_ok;
}
+
+ if (input_section->flags & SEC_DEBUGGING)
+ return bfd_reloc_continue;
+
*error_message = "Unsupported call to elfNN_ia64_reloc";
return bfd_reloc_notsupported;
}
#define DYNAMIC_INTERPRETER(abfd) \
(elfNN_ia64_aix_vec (abfd->xvec) ? AIX_DYNAMIC_INTERPRETER : ELF_DYNAMIC_INTERPRETER)
-/* Select out of range branch fixup type. Note that Itanium does
- not support brl, and so it gets emulated by the kernel. */
-#undef USE_BRL
-
-#ifdef USE_BRL
static const bfd_byte oor_brl[16] =
{
0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* brl.sptk.few tgt;; */
0x00, 0x00, 0x00, 0xc0
};
-#else
-static const bfd_byte oor_ip[48] =
-{
- 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */
- 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, /* movl r15=0 */
- 0x01, 0x00, 0x00, 0x60,
- 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MII] nop.m 0 */
- 0x00, 0x01, 0x00, 0x60, 0x00, 0x00, /* mov r16=ip;; */
- 0xf2, 0x80, 0x00, 0x80, /* add r16=r15,r16;; */
- 0x11, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MIB] nop.m 0 */
- 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */
- 0x60, 0x00, 0x80, 0x00 /* br b6;; */
-};
-#endif
\f
-/* These functions do relaxation for IA-64 ELF.
-
- This is primarily to support branches to targets out of range;
- relaxation of R_IA64_LTOFF22X and R_IA64_LDXMOV not yet supported. */
+/* These functions do relaxation for IA-64 ELF. */
static bfd_boolean
elfNN_ia64_relax_section (abfd, sec, link_info, again)
struct one_fixup *fixups = NULL;
bfd_boolean changed_contents = FALSE;
bfd_boolean changed_relocs = FALSE;
+ bfd_boolean changed_got = FALSE;
+ bfd_vma gp = 0;
/* Assume we're not going to change any sizes, and we'll only need
one pass. */
*again = FALSE;
+ /* Don't even try to relax for non-ELF outputs. */
+ if (link_info->hash->creator->flavour != bfd_target_elf_flavour)
+ return FALSE;
+
/* Nothing to do if there are no relocations. */
if ((sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0)
ia64_info = elfNN_ia64_hash_table (link_info);
irelend = internal_relocs + sec->reloc_count;
- for (irel = internal_relocs; irel < irelend; irel++)
- if (ELFNN_R_TYPE (irel->r_info) == (int) R_IA64_PCREL21B
- || ELFNN_R_TYPE (irel->r_info) == (int) R_IA64_PCREL21M
- || ELFNN_R_TYPE (irel->r_info) == (int) R_IA64_PCREL21F)
- break;
-
- /* No branch-type relocations. */
- if (irel == irelend)
- {
- if (elf_section_data (sec)->relocs != internal_relocs)
- free (internal_relocs);
- return TRUE;
- }
-
/* Get the section contents. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
goto error_return;
}
- for (; irel < irelend; irel++)
+ for (irel = internal_relocs; irel < irelend; irel++)
{
+ unsigned long r_type = ELFNN_R_TYPE (irel->r_info);
bfd_vma symaddr, reladdr, trampoff, toff, roff;
asection *tsec;
struct one_fixup *f;
bfd_size_type amt;
+ bfd_boolean is_branch;
+ struct elfNN_ia64_dyn_sym_info *dyn_i;
- if (ELFNN_R_TYPE (irel->r_info) != (int) R_IA64_PCREL21B
- && ELFNN_R_TYPE (irel->r_info) != (int) R_IA64_PCREL21M
- && ELFNN_R_TYPE (irel->r_info) != (int) R_IA64_PCREL21F)
- continue;
+ switch (r_type)
+ {
+ case R_IA64_PCREL21B:
+ case R_IA64_PCREL21BI:
+ case R_IA64_PCREL21M:
+ case R_IA64_PCREL21F:
+ is_branch = TRUE;
+ break;
+
+ case R_IA64_LTOFF22X:
+ case R_IA64_LDXMOV:
+ is_branch = FALSE;
+ break;
+
+ default:
+ continue;
+ }
/* Get the value of the symbol referred to by the reloc. */
if (ELFNN_R_SYM (irel->r_info) < symtab_hdr->sh_info)
tsec = bfd_section_from_elf_index (abfd, isym->st_shndx);
toff = isym->st_value;
+ dyn_i = get_dyn_sym_info (ia64_info, NULL, abfd, irel, FALSE);
}
else
{
unsigned long indx;
struct elf_link_hash_entry *h;
- struct elfNN_ia64_dyn_sym_info *dyn_i;
indx = ELFNN_R_SYM (irel->r_info) - symtab_hdr->sh_info;
h = elf_sym_hashes (abfd)[indx];
/* For branches to dynamic symbols, we're interested instead
in a branch to the PLT entry. */
- if (dyn_i && dyn_i->want_plt2)
+ if (is_branch && dyn_i && dyn_i->want_plt2)
{
+ /* Internal branches shouldn't be sent to the PLT.
+ Leave this for now and we'll give an error later. */
+ if (r_type != R_IA64_PCREL21B)
+ continue;
+
tsec = ia64_info->plt_sec;
toff = dyn_i->plt2_offset;
+ BFD_ASSERT (irel->r_addend == 0);
}
+
+ /* Can't do anything else with dynamic symbols. */
+ else if (elfNN_ia64_dynamic_symbol_p (h, link_info))
+ continue;
+
else
{
/* We can't do anthing with undefined symbols. */
}
}
- symaddr = (tsec->output_section->vma
- + tsec->output_offset
- + toff
- + irel->r_addend);
+ if (tsec->sec_info_type == ELF_INFO_TYPE_MERGE)
+ toff = _bfd_merged_section_offset (abfd, &tsec,
+ elf_section_data (tsec)->sec_info,
+ toff + irel->r_addend,
+ (bfd_vma) 0);
+ else
+ toff += irel->r_addend;
+
+ symaddr = tsec->output_section->vma + tsec->output_offset + toff;
roff = irel->r_offset;
- reladdr = (sec->output_section->vma
- + sec->output_offset
- + roff) & (bfd_vma) -4;
- /* If the branch is in range, no need to do anything. */
- if ((bfd_signed_vma) (symaddr - reladdr) >= -0x1000000
- && (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0)
- continue;
+ if (is_branch)
+ {
+ reladdr = (sec->output_section->vma
+ + sec->output_offset
+ + roff) & (bfd_vma) -4;
- /* If the branch and target are in the same section, you've
- got one honking big section and we can't help you. You'll
- get an error message later. */
- if (tsec == sec)
- continue;
+ /* If the branch is in range, no need to do anything. */
+ if ((bfd_signed_vma) (symaddr - reladdr) >= -0x1000000
+ && (bfd_signed_vma) (symaddr - reladdr) <= 0x0FFFFF0)
+ continue;
- /* Look for an existing fixup to this address. */
- for (f = fixups; f ; f = f->next)
- if (f->tsec == tsec && f->toff == toff)
- break;
+ /* If the branch and target are in the same section, you've
+ got one honking big section and we can't help you. You'll
+ get an error message later. */
+ if (tsec == sec)
+ continue;
- if (f == NULL)
- {
- /* Two alternatives: If it's a branch to a PLT entry, we can
- make a copy of the FULL_PLT entry. Otherwise, we'll have
- to use a `brl' insn to get where we're going. */
+ /* Look for an existing fixup to this address. */
+ for (f = fixups; f ; f = f->next)
+ if (f->tsec == tsec && f->toff == toff)
+ break;
+
+ if (f == NULL)
+ {
+ /* Two alternatives: If it's a branch to a PLT entry, we can
+ make a copy of the FULL_PLT entry. Otherwise, we'll have
+ to use a `brl' insn to get where we're going. */
+
+ size_t size;
+
+ if (tsec == ia64_info->plt_sec)
+ size = sizeof (plt_full_entry);
+ else
+ {
+ size = sizeof (oor_brl);
+ }
+
+ /* Resize the current section to make room for the new branch. */
+ trampoff = (sec->_cooked_size + 15) & (bfd_vma) -16;
+ amt = trampoff + size;
+ contents = (bfd_byte *) bfd_realloc (contents, amt);
+ if (contents == NULL)
+ goto error_return;
+ sec->_cooked_size = amt;
+
+ if (tsec == ia64_info->plt_sec)
+ {
+ memcpy (contents + trampoff, plt_full_entry, size);
- size_t size;
+ /* Hijack the old relocation for use as the PLTOFF reloc. */
+ irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info),
+ R_IA64_PLTOFF22);
+ irel->r_offset = trampoff;
+ }
+ else
+ {
+ memcpy (contents + trampoff, oor_brl, size);
+ irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info),
+ R_IA64_PCREL60B);
+ irel->r_offset = trampoff + 2;
+ }
- if (tsec == ia64_info->plt_sec)
- size = sizeof (plt_full_entry);
+ /* Record the fixup so we don't do it again this section. */
+ f = (struct one_fixup *)
+ bfd_malloc ((bfd_size_type) sizeof (*f));
+ f->next = fixups;
+ f->tsec = tsec;
+ f->toff = toff;
+ f->trampoff = trampoff;
+ fixups = f;
+ }
else
{
-#ifdef USE_BRL
- size = sizeof (oor_brl);
-#else
- size = sizeof (oor_ip);
-#endif
+ /* Nop out the reloc, since we're finalizing things here. */
+ irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE);
}
- /* Resize the current section to make room for the new branch. */
- trampoff = (sec->_cooked_size + 15) & (bfd_vma) -16;
- amt = trampoff + size;
- contents = (bfd_byte *) bfd_realloc (contents, amt);
- if (contents == NULL)
+ /* Fix up the existing branch to hit the trampoline. Hope like
+ hell this doesn't overflow too. */
+ if (elfNN_ia64_install_value (abfd, contents + roff,
+ f->trampoff - (roff & (bfd_vma) -4),
+ r_type) != bfd_reloc_ok)
goto error_return;
- sec->_cooked_size = amt;
- if (tsec == ia64_info->plt_sec)
+ changed_contents = TRUE;
+ changed_relocs = TRUE;
+ }
+ else
+ {
+ /* Fetch the gp. */
+ if (gp == 0)
{
- memcpy (contents + trampoff, plt_full_entry, size);
+ bfd *obfd = sec->output_section->owner;
+ gp = _bfd_get_gp_value (obfd);
+ if (gp == 0)
+ {
+ if (!elfNN_ia64_choose_gp (obfd, link_info))
+ goto error_return;
+ gp = _bfd_get_gp_value (obfd);
+ }
+ }
+
+ /* If the data is out of range, do nothing. */
+ if ((bfd_signed_vma) (symaddr - gp) >= 0x200000
+ ||(bfd_signed_vma) (symaddr - gp) < -0x200000)
+ continue;
- /* Hijack the old relocation for use as the PLTOFF reloc. */
+ if (r_type == R_IA64_LTOFF22X)
+ {
irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info),
- R_IA64_PLTOFF22);
- irel->r_offset = trampoff;
+ R_IA64_GPREL22);
+ changed_relocs = TRUE;
+ if (dyn_i->want_gotx)
+ {
+ dyn_i->want_gotx = 0;
+ changed_got |= !dyn_i->want_got;
+ }
}
else
{
-#ifdef USE_BRL
- memcpy (contents + trampoff, oor_brl, size);
- irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info),
- R_IA64_PCREL60B);
- irel->r_offset = trampoff + 2;
-#else
- memcpy (contents + trampoff, oor_ip, size);
- irel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info),
- R_IA64_PCREL64I);
- irel->r_addend -= 16;
- irel->r_offset = trampoff + 2;
-#endif
+ elfNN_ia64_relax_ldxmov (abfd, contents, roff);
+ irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE);
+ changed_contents = TRUE;
+ changed_relocs = TRUE;
}
-
- /* Record the fixup so we don't do it again this section. */
- f = (struct one_fixup *) bfd_malloc ((bfd_size_type) sizeof (*f));
- f->next = fixups;
- f->tsec = tsec;
- f->toff = toff;
- f->trampoff = trampoff;
- fixups = f;
- }
- else
- {
- /* Nop out the reloc, since we're finalizing things here. */
- irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE);
}
-
- /* Fix up the existing branch to hit the trampoline. Hope like
- hell this doesn't overflow too. */
- if (elfNN_ia64_install_value (abfd, contents + roff,
- f->trampoff - (roff & (bfd_vma) -4),
- R_IA64_PCREL21B) != bfd_reloc_ok)
- goto error_return;
-
- changed_contents = TRUE;
- changed_relocs = TRUE;
}
+ /* ??? If we created fixups, this may push the code segment large
+ enough that the data segment moves, which will change the GP.
+ Reset the GP so that we re-calculate next round. We need to
+ do this at the _beginning_ of the next round; now will not do. */
+
/* Clean up and go home. */
while (fixups)
{
elf_section_data (sec)->relocs = internal_relocs;
}
+ if (changed_got)
+ {
+ struct elfNN_ia64_allocate_data data;
+ data.info = link_info;
+ data.ofs = 0;
+ ia64_info->self_dtpmod_offset = (bfd_vma) -1;
+
+ elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_data_got, &data);
+ elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_global_fptr_got, &data);
+ elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_local_got, &data);
+ ia64_info->got_sec->_raw_size = data.ofs;
+ ia64_info->got_sec->_cooked_size = data.ofs;
+
+ /* ??? Resize .rela.got too. */
+ }
+
*again = changed_contents || changed_relocs;
return TRUE;
free (internal_relocs);
return FALSE;
}
+
+static void
+elfNN_ia64_relax_ldxmov (abfd, contents, off)
+ bfd *abfd;
+ bfd_byte *contents;
+ bfd_vma off;
+{
+ int shift, r1, r3;
+ bfd_vma dword, insn;
+
+ switch ((int)off & 0x3)
+ {
+ case 0: shift = 5; break;
+ case 1: shift = 14; off += 3; break;
+ case 2: shift = 23; off += 6; break;
+ case 3:
+ abort ();
+ }
+
+ dword = bfd_get_64 (abfd, contents + off);
+ insn = (dword >> shift) & 0x1ffffffffffLL;
+
+ r1 = (insn >> 6) & 127;
+ r3 = (insn >> 20) & 127;
+ if (r1 == r3)
+ insn = 0x8000000; /* nop */
+ else
+ insn = (insn & 0x7f01fff) | 0x10800000000LL; /* (qp) mov r1 = r3 */
+
+ dword &= ~(0x1ffffffffffLL << shift);
+ dword |= (insn << shift);
+ bfd_put_64 (abfd, dword, contents + off);
+}
\f
/* Return TRUE if NAME is an unwind table section name. */
{
struct elfNN_ia64_link_hash_table *ret;
- ret = bfd_zalloc (abfd, (bfd_size_type) sizeof (*ret));
+ ret = bfd_zmalloc ((bfd_size_type) sizeof (*ret));
if (!ret)
return 0;
+
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
elfNN_ia64_new_elf_hash_entry))
{
- bfd_release (abfd, ret);
+ free (ret);
return 0;
}
if (!elfNN_ia64_local_hash_table_init (&ret->loc_hash_table, abfd,
elfNN_ia64_new_loc_hash_entry))
- return 0;
+ {
+ free (ret);
+ return 0;
+ }
+
return &ret->root.root;
}
const Elf_Internal_Rela *rel;
bfd_boolean create;
{
- char *addr_name;
- size_t len;
struct elfNN_ia64_local_hash_entry *ret;
+ asection *sec = abfd->sections;
+ char addr_name [34];
+
+ BFD_ASSERT ((sizeof (sec->id)*2 + 1 + sizeof (unsigned long)*2 + 1) <= 34);
+ BFD_ASSERT (sec);
/* Construct a string for use in the elfNN_ia64_local_hash_table.
name describes what was once anonymous memory. */
- len = sizeof (void*)*2 + 1 + sizeof (bfd_vma)*4 + 1 + 1;
- len += 10; /* %p slop */
-
- addr_name = bfd_malloc (len);
- if (addr_name == NULL)
- return 0;
- sprintf (addr_name, "%p:%lx",
- (void *) abfd, (unsigned long) ELFNN_R_SYM (rel->r_info));
+ sprintf (addr_name, "%x:%lx",
+ sec->id, (unsigned long) ELFNN_R_SYM (rel->r_info));
/* Collect the canonical entry data for this address. */
ret = elfNN_ia64_local_hash_lookup (&ia64_info->loc_hash_table,
addr_name, create, create);
- free (addr_name);
return ret;
}
struct elfNN_ia64_local_hash_entry *loc_h;
loc_h = get_local_sym_hash (ia64_info, abfd, rel, create);
- BFD_ASSERT (loc_h);
+ if (!loc_h)
+ {
+ BFD_ASSERT (!create);
+ return NULL;
+ }
pp = &loc_h->info;
}
{
enum {
NEED_GOT = 1,
- NEED_FPTR = 2,
- NEED_PLTOFF = 4,
- NEED_MIN_PLT = 8,
- NEED_FULL_PLT = 16,
- NEED_DYNREL = 32,
- NEED_LTOFF_FPTR = 64,
- NEED_TPREL = 128,
- NEED_DTPMOD = 256,
- NEED_DTPREL = 512
+ NEED_GOTX = 2,
+ NEED_FPTR = 4,
+ NEED_PLTOFF = 8,
+ NEED_MIN_PLT = 16,
+ NEED_FULL_PLT = 32,
+ NEED_DYNREL = 64,
+ NEED_LTOFF_FPTR = 128,
+ NEED_TPREL = 256,
+ NEED_DTPMOD = 512,
+ NEED_DTPREL = 1024
};
struct elf_link_hash_entry *h = NULL;
break;
case R_IA64_LTOFF22:
- case R_IA64_LTOFF22X:
case R_IA64_LTOFF64I:
need_entry = NEED_GOT;
break;
+ case R_IA64_LTOFF22X:
+ need_entry = NEED_GOTX;
+ break;
+
case R_IA64_PLTOFF22:
case R_IA64_PLTOFF64I:
case R_IA64_PLTOFF64MSB:
dyn_i->h = h;
/* Create what's needed. */
- if (need_entry & (NEED_GOT | NEED_TPREL | NEED_DTPMOD | NEED_DTPREL))
+ if (need_entry & (NEED_GOT | NEED_GOTX | NEED_TPREL
+ | NEED_DTPMOD | NEED_DTPREL))
{
if (!got)
{
}
if (need_entry & NEED_GOT)
dyn_i->want_got = 1;
+ if (need_entry & NEED_GOTX)
+ dyn_i->want_gotx = 1;
if (need_entry & NEED_TPREL)
dyn_i->want_tprel = 1;
if (need_entry & NEED_DTPMOD)
return TRUE;
}
-struct elfNN_ia64_allocate_data
-{
- struct bfd_link_info *info;
- bfd_size_type ofs;
-};
-
/* For cleanliness, and potentially faster dynamic loading, allocate
external GOT entries first. */
{
struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data;
- if (dyn_i->want_got
+ if ((dyn_i->want_got || dyn_i->want_gotx)
&& ! dyn_i->want_fptr
&& (elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info)
|| (elfNN_ia64_aix_vec (x->info->hash->creator)
}
if (dyn_i->want_dtpmod)
{
- dyn_i->dtpmod_offset = x->ofs;
- x->ofs += 8;
+ if (elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info))
+ {
+ dyn_i->dtpmod_offset = x->ofs;
+ x->ofs += 8;
+ }
+ else
+ {
+ struct elfNN_ia64_link_hash_table *ia64_info;
+
+ ia64_info = elfNN_ia64_hash_table (x->info);
+ if (ia64_info->self_dtpmod_offset == (bfd_vma) -1)
+ {
+ ia64_info->self_dtpmod_offset = x->ofs;
+ x->ofs += 8;
+ }
+ dyn_i->dtpmod_offset = ia64_info->self_dtpmod_offset;
+ }
}
if (dyn_i->want_dtprel)
{
{
struct elfNN_ia64_allocate_data *x = (struct elfNN_ia64_allocate_data *)data;
- if (dyn_i->want_got
+ if ((dyn_i->want_got || dyn_i->want_gotx)
&& ! (elfNN_ia64_dynamic_symbol_p (dyn_i->h, x->info)
|| elfNN_ia64_aix_vec (x->info->hash->creator)))
{
/* Take care of the GOT and PLT relocations. */
- if (((dynamic_symbol || shared) && dyn_i->want_got)
+ if (((dynamic_symbol || shared) && (dyn_i->want_got || dyn_i->want_gotx))
|| (dyn_i->want_ltoff_fptr && dyn_i->h && dyn_i->h->dynindx != -1))
ia64_info->rel_got_sec->_raw_size += sizeof (ElfNN_External_Rela);
if ((dynamic_symbol || shared) && dyn_i->want_tprel)
ia64_info->rel_got_sec->_raw_size += sizeof (ElfNN_External_Rela);
- if ((dynamic_symbol || shared) && dyn_i->want_dtpmod)
+ if (dynamic_symbol && dyn_i->want_dtpmod)
ia64_info->rel_got_sec->_raw_size += sizeof (ElfNN_External_Rela);
if (dynamic_symbol && dyn_i->want_dtprel)
ia64_info->rel_got_sec->_raw_size += sizeof (ElfNN_External_Rela);
dynobj = elf_hash_table(info)->dynobj;
ia64_info = elfNN_ia64_hash_table (info);
+ ia64_info->self_dtpmod_offset = (bfd_vma) -1;
BFD_ASSERT(dynobj != NULL);
data.info = info;
/* Allocate space for the dynamic relocations that turned out to be
required. */
+ if (info->shared && ia64_info->self_dtpmod_offset != (bfd_vma) -1)
+ ia64_info->rel_got_sec->_raw_size += sizeof (ElfNN_External_Rela);
elfNN_ia64_dyn_sym_traverse (ia64_info, allocate_dynrel_entries, &data);
}
got_offset = dyn_i->tprel_offset;
break;
case R_IA64_DTPMOD64LSB:
- done = dyn_i->dtpmod_done;
- dyn_i->dtpmod_done = TRUE;
+ if (dyn_i->dtpmod_offset != ia64_info->self_dtpmod_offset)
+ {
+ done = dyn_i->dtpmod_done;
+ dyn_i->dtpmod_done = TRUE;
+ }
+ else
+ {
+ done = ia64_info->self_dtpmod_done;
+ ia64_info->self_dtpmod_done = TRUE;
+ dynindx = 0;
+ }
got_offset = dyn_i->dtpmod_offset;
break;
case R_IA64_DTPREL64LSB:
return (av < bv ? -1 : av > bv ? 1 : 0);
}
+/* Make sure we've got ourselves a nice fat __gp value. */
static bfd_boolean
-elfNN_ia64_final_link (abfd, info)
+elfNN_ia64_choose_gp (abfd, info)
bfd *abfd;
struct bfd_link_info *info;
{
+ bfd_vma min_vma = (bfd_vma) -1, max_vma = 0;
+ bfd_vma min_short_vma = min_vma, max_short_vma = 0;
+ struct elf_link_hash_entry *gp;
+ bfd_vma gp_val;
+ asection *os;
struct elfNN_ia64_link_hash_table *ia64_info;
- asection *unwind_output_sec;
ia64_info = elfNN_ia64_hash_table (info);
- /* Make sure we've got ourselves a nice fat __gp value. */
- if (!info->relocateable)
+ /* Find the min and max vma of all sections marked short. Also collect
+ min and max vma of any type, for use in selecting a nice gp. */
+ for (os = abfd->sections; os ; os = os->next)
{
- bfd_vma min_vma = (bfd_vma) -1, max_vma = 0;
- bfd_vma min_short_vma = min_vma, max_short_vma = 0;
- struct elf_link_hash_entry *gp;
- bfd_vma gp_val;
- asection *os;
+ bfd_vma lo, hi;
- /* Find the min and max vma of all sections marked short. Also
- collect min and max vma of any type, for use in selecting a
- nice gp. */
- for (os = abfd->sections; os ; os = os->next)
+ if ((os->flags & SEC_ALLOC) == 0)
+ continue;
+
+ lo = os->vma;
+ hi = os->vma + os->_raw_size;
+ if (hi < lo)
+ hi = (bfd_vma) -1;
+
+ if (min_vma > lo)
+ min_vma = lo;
+ if (max_vma < hi)
+ max_vma = hi;
+ if (os->flags & SEC_SMALL_DATA)
{
- bfd_vma lo, hi;
+ if (min_short_vma > lo)
+ min_short_vma = lo;
+ if (max_short_vma < hi)
+ max_short_vma = hi;
+ }
+ }
- if ((os->flags & SEC_ALLOC) == 0)
- continue;
+ /* See if the user wants to force a value. */
+ gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE,
+ FALSE, FALSE);
- lo = os->vma;
- hi = os->vma + os->_raw_size;
- if (hi < lo)
- hi = (bfd_vma) -1;
+ if (gp
+ && (gp->root.type == bfd_link_hash_defined
+ || gp->root.type == bfd_link_hash_defweak))
+ {
+ asection *gp_sec = gp->root.u.def.section;
+ gp_val = (gp->root.u.def.value
+ + gp_sec->output_section->vma
+ + gp_sec->output_offset);
+ }
+ else
+ {
+ /* Pick a sensible value. */
- if (min_vma > lo)
- min_vma = lo;
- if (max_vma < hi)
- max_vma = hi;
- if (os->flags & SEC_SMALL_DATA)
- {
- if (min_short_vma > lo)
- min_short_vma = lo;
- if (max_short_vma < hi)
- max_short_vma = hi;
- }
+ asection *got_sec = ia64_info->got_sec;
+
+ /* Start with just the address of the .got. */
+ if (got_sec)
+ gp_val = got_sec->output_section->vma;
+ else if (max_short_vma != 0)
+ gp_val = min_short_vma;
+ else
+ gp_val = min_vma;
+
+ /* If it is possible to address the entire image, but we
+ don't with the choice above, adjust. */
+ if (max_vma - min_vma < 0x400000
+ && max_vma - gp_val <= 0x200000
+ && gp_val - min_vma > 0x200000)
+ gp_val = min_vma + 0x200000;
+ else if (max_short_vma != 0)
+ {
+ /* If we don't cover all the short data, adjust. */
+ if (max_short_vma - gp_val >= 0x200000)
+ gp_val = min_short_vma + 0x200000;
+
+ /* If we're addressing stuff past the end, adjust back. */
+ if (gp_val > max_vma)
+ gp_val = max_vma - 0x200000 + 8;
}
+ }
- /* See if the user wants to force a value. */
- gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE,
- FALSE, FALSE);
+ /* Validate whether all SHF_IA_64_SHORT sections are within
+ range of the chosen GP. */
- if (gp
- && (gp->root.type == bfd_link_hash_defined
- || gp->root.type == bfd_link_hash_defweak))
+ if (max_short_vma != 0)
+ {
+ if (max_short_vma - min_short_vma >= 0x400000)
{
- asection *gp_sec = gp->root.u.def.section;
- gp_val = (gp->root.u.def.value
- + gp_sec->output_section->vma
- + gp_sec->output_offset);
+ (*_bfd_error_handler)
+ (_("%s: short data segment overflowed (0x%lx >= 0x400000)"),
+ bfd_get_filename (abfd),
+ (unsigned long) (max_short_vma - min_short_vma));
+ return FALSE;
}
- else
+ else if ((gp_val > min_short_vma
+ && gp_val - min_short_vma > 0x200000)
+ || (gp_val < max_short_vma
+ && max_short_vma - gp_val >= 0x200000))
{
- /* Pick a sensible value. */
+ (*_bfd_error_handler)
+ (_("%s: __gp does not cover short data segment"),
+ bfd_get_filename (abfd));
+ return FALSE;
+ }
+ }
- asection *got_sec = ia64_info->got_sec;
+ _bfd_set_gp_value (abfd, gp_val);
- /* Start with just the address of the .got. */
- if (got_sec)
- gp_val = got_sec->output_section->vma;
- else if (max_short_vma != 0)
- gp_val = min_short_vma;
- else
- gp_val = min_vma;
-
- /* If it is possible to address the entire image, but we
- don't with the choice above, adjust. */
- if (max_vma - min_vma < 0x400000
- && max_vma - gp_val <= 0x200000
- && gp_val - min_vma > 0x200000)
- gp_val = min_vma + 0x200000;
- else if (max_short_vma != 0)
- {
- /* If we don't cover all the short data, adjust. */
- if (max_short_vma - gp_val >= 0x200000)
- gp_val = min_short_vma + 0x200000;
+ return TRUE;
+}
- /* If we're addressing stuff past the end, adjust back. */
- if (gp_val > max_vma)
- gp_val = max_vma - 0x200000 + 8;
- }
- }
+static bfd_boolean
+elfNN_ia64_final_link (abfd, info)
+ bfd *abfd;
+ struct bfd_link_info *info;
+{
+ struct elfNN_ia64_link_hash_table *ia64_info;
+ asection *unwind_output_sec;
+
+ ia64_info = elfNN_ia64_hash_table (info);
- /* Validate whether all SHF_IA_64_SHORT sections are within
- range of the chosen GP. */
+ /* Make sure we've got ourselves a nice fat __gp value. */
+ if (!info->relocateable)
+ {
+ bfd_vma gp_val = _bfd_get_gp_value (abfd);
+ struct elf_link_hash_entry *gp;
- if (max_short_vma != 0)
+ if (gp_val == 0)
{
- if (max_short_vma - min_short_vma >= 0x400000)
- {
- (*_bfd_error_handler)
- (_("%s: short data segment overflowed (0x%lx >= 0x400000)"),
- bfd_get_filename (abfd),
- (unsigned long) (max_short_vma - min_short_vma));
- return FALSE;
- }
- else if ((gp_val > min_short_vma
- && gp_val - min_short_vma > 0x200000)
- || (gp_val < max_short_vma
- && max_short_vma - gp_val >= 0x200000))
- {
- (*_bfd_error_handler)
- (_("%s: __gp does not cover short data segment"),
- bfd_get_filename (abfd));
- return FALSE;
- }
+ if (! elfNN_ia64_choose_gp (abfd, info))
+ return FALSE;
+ gp_val = _bfd_get_gp_value (abfd);
}
- _bfd_set_gp_value (abfd, gp_val);
-
+ gp = elf_link_hash_lookup (elf_hash_table (info), "__gp", FALSE,
+ FALSE, FALSE);
if (gp)
{
gp->root.type = bfd_link_hash_defined;
value = _bfd_elf_rela_local_sym (output_bfd, sym, sym_sec, rel);
if ((sym_sec->flags & SEC_MERGE)
&& ELF_ST_TYPE (sym->st_info) == STT_SECTION
- && (elf_section_data (sym_sec)->sec_info_type
- == ELF_INFO_TYPE_MERGE))
+ && sym_sec->sec_info_type == ELF_INFO_TYPE_MERGE)
{
struct elfNN_ia64_local_hash_entry *loc_h;
else if (h->root.type == bfd_link_hash_undefweak)
undef_weak_ref = TRUE;
else if (info->shared
- && (!info->symbolic || info->allow_shlib_undefined)
&& !info->no_undefined
&& ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
;
(!info->shared || info->no_undefined
|| ELF_ST_VISIBILITY (h->other)))))
return FALSE;
- ret_val = FALSE;
continue;
}
}
srel, rel->r_offset, dyn_r_type,
dynindx, addend);
}
- /* FALLTHRU */
+ /* Fall through. */
case R_IA64_LTV32MSB:
case R_IA64_LTV32LSB:
}
goto finish_pcrel;
- case R_IA64_PCREL21BI:
- case R_IA64_PCREL21F:
- case R_IA64_PCREL21M:
- /* ??? These two are only used for speculation fixup code.
- They should never be dynamic. */
- if (dynamic_symbol_p)
- {
- (*_bfd_error_handler)
- (_("%s: dynamic relocation against speculation fixup"),
- bfd_archive_filename (input_bfd));
- ret_val = FALSE;
- continue;
- }
- if (undef_weak_ref)
- {
- (*_bfd_error_handler)
- (_("%s: speculation fixup against undefined weak symbol"),
- bfd_archive_filename (input_bfd));
- ret_val = FALSE;
- continue;
- }
- goto finish_pcrel;
-
case R_IA64_PCREL21B:
case R_IA64_PCREL60B:
/* We should have created a PLT entry for any dynamic symbol. */
}
goto finish_pcrel;
+ case R_IA64_PCREL21BI:
+ case R_IA64_PCREL21F:
+ case R_IA64_PCREL21M:
case R_IA64_PCREL22:
case R_IA64_PCREL64I:
+ /* The PCREL21BI reloc is specifically not intended for use with
+ dynamic relocs. PCREL21F and PCREL21M are used for speculation
+ fixup code, and thus probably ought not be dynamic. The
+ PCREL22 and PCREL64I relocs aren't emitted as dynamic relocs. */
+ if (dynamic_symbol_p)
+ {
+ const char *msg;
+
+ if (r_type == R_IA64_PCREL21BI)
+ msg = _("%s: @internal branch to dynamic symbol %s");
+ else if (r_type == R_IA64_PCREL21F || r_type == R_IA64_PCREL21M)
+ msg = _("%s: speculation fixup to dynamic symbol %s");
+ else
+ msg = _("%s: @pcrel relocation against dynamic symbol %s");
+ (*_bfd_error_handler) (msg, bfd_archive_filename (input_bfd),
+ h->root.root.string);
+ ret_val = FALSE;
+ continue;
+ }
+ goto finish_pcrel;
+
finish_pcrel:
/* Make pc-relative. */
value -= (input_section->output_section->vma
case R_IA64_DTPREL14:
case R_IA64_DTPREL22:
case R_IA64_DTPREL64I:
+ case R_IA64_DTPREL64LSB:
+ case R_IA64_DTPREL64MSB:
value -= elfNN_ia64_dtprel_base (info);
r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
break;
case R_IA64_LTOFF_DTPREL22:
{
int got_r_type;
+ long dynindx = h ? h->dynindx : -1;
+ bfd_vma r_addend = rel->r_addend;
switch (r_type)
{
default:
case R_IA64_LTOFF_TPREL22:
- if (!dynamic_symbol_p && !info->shared)
- value -= elfNN_ia64_tprel_base (info);
+ if (!dynamic_symbol_p)
+ {
+ if (!info->shared)
+ value -= elfNN_ia64_tprel_base (info);
+ else
+ {
+ r_addend += value - elfNN_ia64_dtprel_base (info);
+ dynindx = 0;
+ }
+ }
got_r_type = R_IA64_TPREL64LSB;
break;
case R_IA64_LTOFF_DTPMOD22:
break;
}
dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE);
- value = set_got_entry (input_bfd, info, dyn_i,
- (h ? h->dynindx : -1), rel->r_addend,
+ value = set_got_entry (input_bfd, info, dyn_i, dynindx, r_addend,
value, got_r_type);
value -= gp_val;
r = elfNN_ia64_install_value (output_bfd, hit_addr, value,
bfd_elfNN_swap_dyn_out (abfd, &dyn, dyncon);
}
- /* Initialize the PLT0 entry */
+ /* Initialize the PLT0 entry. */
if (ia64_info->plt_sec)
{
bfd_byte *loc = ia64_info->plt_sec->contents;
return TRUE;
}
\f
-/* ELF file flag handling: */
+/* ELF file flag handling: */
/* Function to keep IA-64 specific file flags. */
static bfd_boolean