/* IA-64 support for 64-bit ELF
- Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
PARAMS((bfd *abfd, asection *sec, struct bfd_link_info *link_info,
bfd_boolean *again));
static void elfNN_ia64_relax_ldxmov
- PARAMS((bfd *abfd, bfd_byte *contents, bfd_vma off));
+ PARAMS((bfd_byte *contents, bfd_vma off));
static bfd_boolean is_unwind_section_name
PARAMS ((bfd *abfd, const char *));
static bfd_boolean elfNN_ia64_section_from_shdr
static bfd_boolean elfNN_ia64_size_dynamic_sections
PARAMS ((bfd *output_bfd, struct bfd_link_info *info));
static bfd_reloc_status_type elfNN_ia64_install_value
- PARAMS ((bfd *abfd, bfd_byte *hit_addr, bfd_vma val, unsigned int r_type));
+ PARAMS ((bfd_byte *hit_addr, bfd_vma val, unsigned int r_type));
static void elfNN_ia64_install_dyn_reloc
PARAMS ((bfd *abfd, struct bfd_link_info *info, asection *sec,
asection *srel, bfd_vma offset, unsigned int type,
IA64_HOWTO (R_IA64_TPREL64LSB, "TPREL64LSB", 4, FALSE, FALSE),
IA64_HOWTO (R_IA64_LTOFF_TPREL22, "LTOFF_TPREL22", 0, FALSE, FALSE),
- IA64_HOWTO (R_IA64_DTPMOD64MSB, "TPREL64MSB", 4, FALSE, FALSE),
- IA64_HOWTO (R_IA64_DTPMOD64LSB, "TPREL64LSB", 4, FALSE, FALSE),
+ IA64_HOWTO (R_IA64_DTPMOD64MSB, "DTPMOD64MSB", 4, FALSE, FALSE),
+ IA64_HOWTO (R_IA64_DTPMOD64LSB, "DTPMOD64LSB", 4, FALSE, FALSE),
IA64_HOWTO (R_IA64_LTOFF_DTPMOD22, "LTOFF_DTPMOD22", 0, FALSE, FALSE),
IA64_HOWTO (R_IA64_DTPREL14, "DTPREL14", 0, FALSE, FALSE),
}
static void
-elfNN_ia64_relax_brl (bfd *abfd, bfd_byte *contents, bfd_vma off)
+elfNN_ia64_relax_brl (bfd_byte *contents, bfd_vma off)
{
- int template;
+ unsigned int template, t0, t1, t2, t3;
bfd_byte *hit_addr;
- bfd_vma t0, t1, i0, i1, i2;
hit_addr = (bfd_byte *) (contents + off);
hit_addr -= (long) hit_addr & 0x3;
- t0 = bfd_get_64 (abfd, hit_addr);
- t1 = bfd_get_64 (abfd, hit_addr + 8);
-
- /* Keep the instruction in slot 0. */
- i0 = (t0 >> 5) & 0x1ffffffffffLL;
- /* Use nop.b for slot 1. */
- i1 = 0x4000000000LL;
- /* For slot 2, turn brl into br by masking out bit 40. */
- i2 = (t1 >> 23) & 0x0ffffffffffLL;
+ t0 = bfd_getl32 (hit_addr + 0);
+ t1 = bfd_getl32 (hit_addr + 4);
+ t2 = bfd_getl32 (hit_addr + 8);
+ t3 = bfd_getl32 (hit_addr + 12);
/* Turn a MLX bundle into a MBB bundle with the same stop-bit
variety. */
template = 0x12;
- if ((t0 & 0x1fLL) == 5)
+ if ((t0 & 0x1f) == 5)
template += 1;
- t0 = (i1 << 46) | (i0 << 5) | template;
- t1 = (i2 << 23) | (i1 >> 18);
- bfd_put_64 (abfd, t0, hit_addr);
- bfd_put_64 (abfd, t1, hit_addr + 8);
+ /* Keep the instruction in slot 0. */
+ t0 &= 0xffffffe0;
+ t1 &= 0x3fff;
+
+ t0 |= template;
+
+ /* For slot 2, turn brl into br by masking out bit 40. */
+ t2 &= 0xff800000;
+ t3 &= 0x7fffffff;
+
+ /* Use nop.b for slot 1. */
+ t2 |= 0x100000;
+
+ bfd_putl32 (t0, hit_addr);
+ bfd_putl32 (t1, hit_addr + 4);
+ bfd_putl32 (t2, hit_addr + 8);
+ bfd_putl32 (t3, hit_addr + 12);
}
\f
/* These functions do relaxation for IA-64 ELF. */
location of interest is just "sym". */
if (symtype == STT_SECTION)
toff += irel->r_addend;
-
+
toff = _bfd_merged_section_offset (abfd, &tsec,
elf_section_data (tsec)->sec_info,
toff);
/* If the 60-bit branch is in 21-bit range, optimize it. */
if (r_type == R_IA64_PCREL60B)
{
- elfNN_ia64_relax_brl (abfd, contents, roff);
+ elfNN_ia64_relax_brl (contents, roff);
irel->r_info
- = ELF64_R_INFO (ELF64_R_SYM (irel->r_info),
+ = ELFNN_R_INFO (ELFNN_R_SYM (irel->r_info),
R_IA64_PCREL21B);
/* If the original relocation offset points to slot
else if (r_type == R_IA64_PCREL60B)
continue;
+ /* We can't put a trampoline in a .init/.fini section. Issue
+ an error. */
+ if (strcmp (sec->output_section->name, ".init") == 0
+ || strcmp (sec->output_section->name, ".fini") == 0)
+ {
+ (*_bfd_error_handler)
+ (_("%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect branch."),
+ sec->owner, sec, (unsigned long) roff);
+ bfd_set_error (bfd_error_bad_value);
+ goto error_return;
+ }
+
/* If the branch and target are in the same section, you've
- got one honking big section and we can't help you. You'll
- get an error message later. */
- if (tsec == sec)
+ got one honking big section and we can't help you unless
+ you are branching backwards. You'll get an error message
+ later. */
+ if (tsec == sec && toff > roff)
continue;
/* Look for an existing fixup to this address. */
}
/* Fix up the existing branch to hit the trampoline. */
- if (elfNN_ia64_install_value (abfd, contents + roff, offset,
- r_type) != bfd_reloc_ok)
+ if (elfNN_ia64_install_value (contents + roff, offset, r_type)
+ != bfd_reloc_ok)
goto error_return;
changed_contents = TRUE;
}
else
{
- elfNN_ia64_relax_ldxmov (abfd, contents, roff);
+ elfNN_ia64_relax_ldxmov (contents, roff);
irel->r_info = ELFNN_R_INFO (0, R_IA64_NONE);
changed_contents = TRUE;
changed_relocs = TRUE;
enough that the data segment moves, which will change the GP.
Reset the GP so that we re-calculate next round. We need to
do this at the _beginning_ of the next round; now will not do. */
-
+
/* Clean up and go home. */
while (fixups)
{
}
static void
-elfNN_ia64_relax_ldxmov (abfd, contents, off)
- bfd *abfd;
+elfNN_ia64_relax_ldxmov (contents, off)
bfd_byte *contents;
bfd_vma off;
{
abort ();
}
- dword = bfd_get_64 (abfd, contents + off);
+ dword = bfd_getl64 (contents + off);
insn = (dword >> shift) & 0x1ffffffffffLL;
r1 = (insn >> 6) & 127;
dword &= ~(0x1ffffffffffLL << shift);
dword |= (insn << shift);
- bfd_put_64 (abfd, dword, contents + off);
+ bfd_putl64 (dword, contents + off);
}
\f
/* Return TRUE if NAME is an unwind table section name. */
bfd_boolean linker ATTRIBUTE_UNUSED;
{
Elf_Internal_Shdr *hdr;
- const char *sname;
- asection *text_sect, *s;
- size_t len;
+ asection *s;
for (s = abfd->sections; s; s = s->next)
{
switch (hdr->sh_type)
{
case SHT_IA_64_UNWIND:
- /* See comments in gas/config/tc-ia64.c:dot_endp on why we
- have to do this. */
- sname = bfd_get_section_name (abfd, s);
- len = sizeof (ELF_STRING_ia64_unwind) - 1;
- if (sname && strncmp (sname, ELF_STRING_ia64_unwind, len) == 0)
- {
- sname += len;
-
- if (sname[0] == '\0')
- /* .IA_64.unwind -> .text */
- text_sect = bfd_get_section_by_name (abfd, ".text");
- else
- /* .IA_64.unwindFOO -> FOO */
- text_sect = bfd_get_section_by_name (abfd, sname);
- }
- else if (sname
- && (len = sizeof (ELF_STRING_ia64_unwind_once) - 1,
- strncmp (sname, ELF_STRING_ia64_unwind_once, len)) == 0)
- {
- /* .gnu.linkonce.ia64unw.FOO -> .gnu.linkonce.t.FOO */
- size_t len2 = sizeof (".gnu.linkonce.t.") - 1;
- char *once_name = bfd_malloc (len2 + strlen (sname + len) + 1);
-
- if (once_name != NULL)
- {
- memcpy (once_name, ".gnu.linkonce.t.", len2);
- strcpy (once_name + len2, sname + len);
- text_sect = bfd_get_section_by_name (abfd, once_name);
- free (once_name);
- }
- else
- /* Should only happen if we run out of memory, in
- which case we're probably toast anyway. Try to
- cope by finding the section the slow way. */
- for (text_sect = abfd->sections;
- text_sect != NULL;
- text_sect = text_sect->next)
- {
- if (strncmp (bfd_section_name (abfd, text_sect),
- ".gnu.linkonce.t.", len2) == 0
- && strcmp (bfd_section_name (abfd, text_sect) + len2,
- sname + len) == 0)
- break;
- }
- }
- else
- /* last resort: fall back on .text */
- text_sect = bfd_get_section_by_name (abfd, ".text");
-
- if (text_sect)
- {
- /* The IA-64 processor-specific ABI requires setting
- sh_link to the unwind section, whereas HP-UX requires
- sh_info to do so. For maximum compatibility, we'll
- set both for now... */
- hdr->sh_link = elf_section_data (text_sect)->this_idx;
- hdr->sh_info = elf_section_data (text_sect)->this_idx;
- }
+ /* The IA-64 processor-specific ABI requires setting sh_link
+ to the unwind section, whereas HP-UX requires sh_info to
+ do so. For maximum compatibility, we'll set both for
+ now... */
+ hdr->sh_info = hdr->sh_link;
break;
}
}
if (!ret)
return 0;
- /* Initialize our local data. All zeros, and definitely easier
- than setting a handful of bit fields. */
- memset (ret, 0, sizeof (*ret));
-
/* Call the allocation method of the superclass. */
ret = ((struct elfNN_ia64_link_hash_entry *)
_bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
table, string));
+ ret->info = NULL;
return (struct bfd_hash_entry *) ret;
}
/* Copy down any references that we may have already seen to the
symbol which just became indirect. */
- dir->root.elf_link_hash_flags |=
- (ind->root.elf_link_hash_flags
- & (ELF_LINK_HASH_REF_DYNAMIC
- | ELF_LINK_HASH_REF_REGULAR
- | ELF_LINK_HASH_REF_REGULAR_NONWEAK
- | ELF_LINK_HASH_NEEDS_PLT));
+ dir->root.ref_dynamic |= ind->root.ref_dynamic;
+ dir->root.ref_regular |= ind->root.ref_regular;
+ dir->root.ref_regular_nonweak |= ind->root.ref_regular_nonweak;
+ dir->root.needs_plt |= ind->root.needs_plt;
if (ind->root.root.type != bfd_link_hash_indirect)
return;
const Elf_Internal_Rela *relend;
Elf_Internal_Shdr *symtab_hdr;
const Elf_Internal_Rela *rel;
- asection *got, *fptr, *srel;
+ asection *got, *fptr, *srel, *pltoff;
if (info->relocatable)
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
ia64_info = elfNN_ia64_hash_table (info);
- got = fptr = srel = NULL;
+ got = fptr = srel = pltoff = NULL;
relend = relocs + sec->reloc_count;
for (rel = relocs; rel < relend; ++rel)
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
- h->elf_link_hash_flags |= ELF_LINK_HASH_REF_REGULAR;
+ h->ref_regular = 1;
}
/* We can only get preliminary data on whether a symbol is
this may help reduce memory usage and processing time later. */
maybe_dynamic = FALSE;
if (h && ((!info->executable
- && (!info->symbolic || info->unresolved_syms_in_shared_libs == RM_IGNORE))
- || ! (h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR)
+ && (!info->symbolic
+ || info->unresolved_syms_in_shared_libs == RM_IGNORE))
+ || !h->def_regular
|| h->root.type == bfd_link_hash_defweak))
maybe_dynamic = TRUE;
{
if (!ia64_info->root.dynobj)
ia64_info->root.dynobj = abfd;
- h->elf_link_hash_flags |= ELF_LINK_HASH_NEEDS_PLT;
+ h->needs_plt = 1;
dyn_i->want_plt = 1;
}
if (need_entry & NEED_FULL_PLT)
dyn_i->want_plt2 = 1;
if (need_entry & NEED_PLTOFF)
- dyn_i->want_pltoff = 1;
+ {
+ /* This is needed here, in case @pltoff is used in a non-shared
+ link. */
+ if (!pltoff)
+ {
+ pltoff = get_pltoff (abfd, info, ia64_info);
+ if (!pltoff)
+ return FALSE;
+ }
+
+ dyn_i->want_pltoff = 1;
+ }
if ((need_entry & NEED_DYNREL) && (sec->flags & SEC_ALLOC))
{
if (!srel)
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
- /* ??? Versioned symbols seem to lose ELF_LINK_HASH_NEEDS_PLT. */
+ /* ??? Versioned symbols seem to lose NEEDS_PLT. */
if (elfNN_ia64_dynamic_symbol_p (h, x->info, 0))
{
bfd_size_type offset = x->ofs;
/* If this is a weak symbol, and there is a real definition, the
processor independent code will have arranged for us to see the
real definition first, and we can just use the same value. */
- if (h->weakdef != NULL)
+ if (h->u.weakdef != NULL)
{
- BFD_ASSERT (h->weakdef->root.type == bfd_link_hash_defined
- || h->weakdef->root.type == bfd_link_hash_defweak);
- h->root.u.def.section = h->weakdef->root.u.def.section;
- h->root.u.def.value = h->weakdef->root.u.def.value;
+ BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
+ || h->u.weakdef->root.type == bfd_link_hash_defweak);
+ h->root.u.def.section = h->u.weakdef->root.u.def.section;
+ h->root.u.def.value = h->u.weakdef->root.u.def.value;
return TRUE;
}
}
static bfd_reloc_status_type
-elfNN_ia64_install_value (abfd, hit_addr, v, r_type)
- bfd *abfd;
+elfNN_ia64_install_value (hit_addr, v, r_type)
bfd_byte *hit_addr;
bfd_vma v;
unsigned int r_type;
{
case IA64_OPND_IMMU64:
hit_addr -= (long) hit_addr & 0x3;
- t0 = bfd_get_64 (abfd, hit_addr);
- t1 = bfd_get_64 (abfd, hit_addr + 8);
+ t0 = bfd_getl64 (hit_addr);
+ t1 = bfd_getl64 (hit_addr + 8);
/* tmpl/s: bits 0.. 5 in t0
slot 0: bits 5..45 in t0
| (((val >> 21) & 0x001) << 21) /* ic */
| (((val >> 63) & 0x001) << 36)) << 23; /* i */
- bfd_put_64 (abfd, t0, hit_addr);
- bfd_put_64 (abfd, t1, hit_addr + 8);
+ bfd_putl64 (t0, hit_addr);
+ bfd_putl64 (t1, hit_addr + 8);
break;
case IA64_OPND_TGT64:
hit_addr -= (long) hit_addr & 0x3;
- t0 = bfd_get_64 (abfd, hit_addr);
- t1 = bfd_get_64 (abfd, hit_addr + 8);
+ t0 = bfd_getl64 (hit_addr);
+ t1 = bfd_getl64 (hit_addr + 8);
/* tmpl/s: bits 0.. 5 in t0
slot 0: bits 5..45 in t0
t1 |= ((((val >> 0) & 0xfffffLL) << 13) /* imm20b */
| (((val >> 59) & 0x1LL) << 36)) << 23; /* i */
- bfd_put_64 (abfd, t0, hit_addr);
- bfd_put_64 (abfd, t1, hit_addr + 8);
+ bfd_putl64 (t0, hit_addr);
+ bfd_putl64 (t1, hit_addr + 8);
break;
default:
case 2: shift = 23; hit_addr += 6; break;
case 3: return bfd_reloc_notsupported; /* shouldn't happen... */
}
- dword = bfd_get_64 (abfd, hit_addr);
+ dword = bfd_getl64 (hit_addr);
insn = (dword >> shift) & 0x1ffffffffffLL;
op = elf64_ia64_operands + opnd;
dword &= ~(0x1ffffffffffLL << shift);
dword |= (insn << shift);
- bfd_put_64 (abfd, dword, hit_addr);
+ bfd_putl64 (dword, hit_addr);
break;
case IA64_OPND_NIL:
if (r_type > R_IA64_MAX_RELOC_CODE)
{
(*_bfd_error_handler)
- (_("%s: unknown relocation type %d"),
- bfd_archive_filename (input_bfd), (int)r_type);
+ (_("%B: unknown relocation type %d"),
+ input_bfd, (int) r_type);
bfd_set_error (bfd_error_bad_value);
ret_val = FALSE;
continue;
/* ??? People shouldn't be doing non-pic code in
shared libraries nor dynamic executables. */
(*_bfd_error_handler)
- (_("%s: non-pic code with imm relocation against dynamic symbol `%s'"),
- bfd_archive_filename (input_bfd),
+ (_("%B: non-pic code with imm relocation against dynamic symbol `%s'"),
+ input_bfd,
h->root.root.string);
ret_val = FALSE;
continue;
case R_IA64_LTV32LSB:
case R_IA64_LTV64MSB:
case R_IA64_LTV64LSB:
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_GPREL22:
if (dynamic_symbol_p)
{
(*_bfd_error_handler)
- (_("%s: @gprel relocation against dynamic symbol %s"),
- bfd_archive_filename (input_bfd), h->root.root.string);
+ (_("%B: @gprel relocation against dynamic symbol %s"),
+ input_bfd, h->root.root.string);
ret_val = FALSE;
continue;
}
value -= gp_val;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_LTOFF22:
value = set_got_entry (input_bfd, info, dyn_i, (h ? h->dynindx : -1),
rel->r_addend, value, R_IA64_DIR64LSB);
value -= gp_val;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_PLTOFF22:
dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE);
value = set_pltoff_entry (output_bfd, info, dyn_i, value, FALSE);
value -= gp_val;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_FPTR64I:
/* ??? People shouldn't be doing non-pic code in
shared libraries. Hork. */
(*_bfd_error_handler)
- (_("%s: linking non-pic code in a position independent executable"),
- bfd_archive_filename (input_bfd));
+ (_("%B: linking non-pic code in a position independent executable"),
+ input_bfd);
ret_val = FALSE;
continue;
}
dynindx, addend);
}
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_LTOFF_FPTR22:
dyn_i = get_dyn_sym_info (ia64_info, h, input_bfd, rel, FALSE);
if (dyn_i->want_fptr)
{
- BFD_ASSERT (h == NULL || h->dynindx == -1)
+ BFD_ASSERT (h == NULL || h->dynindx == -1);
if (!undef_weak_ref)
value = set_fptr_entry (output_bfd, info, dyn_i, value);
dynindx = -1;
value = set_got_entry (output_bfd, info, dyn_i, dynindx,
rel->r_addend, value, R_IA64_FPTR64LSB);
value -= gp_val;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
}
break;
case R_IA64_PCREL64I:
/* The PCREL21BI reloc is specifically not intended for use with
dynamic relocs. PCREL21F and PCREL21M are used for speculation
- fixup code, and thus probably ought not be dynamic. The
+ fixup code, and thus probably ought not be dynamic. The
PCREL22 and PCREL64I relocs aren't emitted as dynamic relocs. */
if (dynamic_symbol_p)
{
const char *msg;
if (r_type == R_IA64_PCREL21BI)
- msg = _("%s: @internal branch to dynamic symbol %s");
+ msg = _("%B: @internal branch to dynamic symbol %s");
else if (r_type == R_IA64_PCREL21F || r_type == R_IA64_PCREL21M)
- msg = _("%s: speculation fixup to dynamic symbol %s");
+ msg = _("%B: speculation fixup to dynamic symbol %s");
else
- msg = _("%s: @pcrel relocation against dynamic symbol %s");
- (*_bfd_error_handler) (msg, bfd_archive_filename (input_bfd),
- h->root.root.string);
+ msg = _("%B: @pcrel relocation against dynamic symbol %s");
+ (*_bfd_error_handler) (msg, input_bfd, h->root.root.string);
ret_val = FALSE;
continue;
}
value -= (input_section->output_section->vma
+ input_section->output_offset
+ rel->r_offset) & ~ (bfd_vma) 0x3;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_SEGREL32MSB:
value -= p->p_vaddr;
else
value = 0;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value,
- r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
}
break;
}
case R_IA64_SECREL32LSB:
case R_IA64_SECREL64MSB:
case R_IA64_SECREL64LSB:
- /* Make output-section relative. */
- if (value > input_section->output_section->vma)
- value -= input_section->output_section->vma;
- else
- value = 0;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ /* Make output-section relative to section where the symbol
+ is defined. PR 475 */
+ if (sym_sec)
+ value -= sym_sec->output_section->vma;
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_IPLTMSB:
r_type = R_IA64_DIR64MSB;
else
r_type = R_IA64_DIR64LSB;
- elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
- r = elfNN_ia64_install_value (output_bfd, hit_addr + 8, gp_val,
- r_type);
+ elfNN_ia64_install_value (hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr + 8, gp_val, r_type);
break;
case R_IA64_TPREL14:
case R_IA64_TPREL22:
case R_IA64_TPREL64I:
value -= elfNN_ia64_tprel_base (info);
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_DTPREL14:
case R_IA64_DTPREL64LSB:
case R_IA64_DTPREL64MSB:
value -= elfNN_ia64_dtprel_base (info);
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
break;
case R_IA64_LTOFF_TPREL22:
value = set_got_entry (input_bfd, info, dyn_i, dynindx, r_addend,
value, got_r_type);
value -= gp_val;
- r = elfNN_ia64_install_value (output_bfd, hit_addr, value,
- r_type);
+ r = elfNN_ia64_install_value (hit_addr, value, r_type);
}
break;
const char *name;
if (h)
- name = h->root.root.string;
+ name = NULL;
else
{
name = bfd_elf_string_from_elf_section (input_bfd,
if (name == NULL)
return FALSE;
if (*name == '\0')
- name = bfd_section_name (input_bfd, input_section);
+ name = bfd_section_name (input_bfd, sym_sec);
}
- if (!(*info->callbacks->reloc_overflow) (info, name,
- howto->name,
- (bfd_vma) 0,
- input_bfd,
- input_section,
- rel->r_offset))
- return FALSE;
+
+ switch (r_type)
+ {
+ case R_IA64_PCREL21B:
+ case R_IA64_PCREL21BI:
+ case R_IA64_PCREL21M:
+ case R_IA64_PCREL21F:
+ if (is_elf_hash_table (info->hash))
+ {
+ /* Relaxtion is always performed for ELF output.
+ Overflow failures for those relocations mean
+ that the section is too big to relax. */
+ (*_bfd_error_handler)
+ (_("%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> 0x1000000)."),
+ input_bfd, input_section, howto->name, name,
+ rel->r_offset, input_section->size);
+ break;
+ }
+ default:
+ if (!(*info->callbacks->reloc_overflow) (info,
+ &h->root,
+ name,
+ howto->name,
+ (bfd_vma) 0,
+ input_bfd,
+ input_section,
+ rel->r_offset))
+ return FALSE;
+ break;
+ }
+
ret_val = FALSE;
}
break;
loc = plt_sec->contents + dyn_i->plt_offset;
memcpy (loc, plt_min_entry, PLT_MIN_ENTRY_SIZE);
- elfNN_ia64_install_value (output_bfd, loc, index, R_IA64_IMM22);
- elfNN_ia64_install_value (output_bfd, loc+2, -dyn_i->plt_offset,
- R_IA64_PCREL21B);
+ elfNN_ia64_install_value (loc, index, R_IA64_IMM22);
+ elfNN_ia64_install_value (loc+2, -dyn_i->plt_offset, R_IA64_PCREL21B);
plt_addr = (plt_sec->output_section->vma
+ plt_sec->output_offset
loc = plt_sec->contents + dyn_i->plt2_offset;
memcpy (loc, plt_full_entry, PLT_FULL_ENTRY_SIZE);
- elfNN_ia64_install_value (output_bfd, loc, pltoff_addr - gp_val,
- R_IA64_IMM22);
+ elfNN_ia64_install_value (loc, pltoff_addr - gp_val, R_IA64_IMM22);
/* Mark the symbol as undefined, rather than as defined in the
plt section. Leave the value alone. */
/* ??? We didn't redefine it in adjust_dynamic_symbol in the
first place. But perhaps elflink.c did some for us. */
- if ((h->elf_link_hash_flags & ELF_LINK_HASH_DEF_REGULAR) == 0)
+ if (!h->def_regular)
sym->st_shndx = SHN_UNDEF;
}
+ sgotplt->output_offset
- gp_val);
- elfNN_ia64_install_value (abfd, loc+1, pltres, R_IA64_GPREL22);
+ elfNN_ia64_install_value (loc+1, pltres, R_IA64_GPREL22);
}
}
if ((in_flags & EF_IA_64_TRAPNIL) != (out_flags & EF_IA_64_TRAPNIL))
{
(*_bfd_error_handler)
- (_("%s: linking trap-on-NULL-dereference with non-trapping files"),
- bfd_archive_filename (ibfd));
+ (_("%B: linking trap-on-NULL-dereference with non-trapping files"),
+ ibfd);
bfd_set_error (bfd_error_bad_value);
ok = FALSE;
if ((in_flags & EF_IA_64_BE) != (out_flags & EF_IA_64_BE))
{
(*_bfd_error_handler)
- (_("%s: linking big-endian files with little-endian files"),
- bfd_archive_filename (ibfd));
+ (_("%B: linking big-endian files with little-endian files"),
+ ibfd);
bfd_set_error (bfd_error_bad_value);
ok = FALSE;
if ((in_flags & EF_IA_64_ABI64) != (out_flags & EF_IA_64_ABI64))
{
(*_bfd_error_handler)
- (_("%s: linking 64-bit files with 32-bit files"),
- bfd_archive_filename (ibfd));
+ (_("%B: linking 64-bit files with 32-bit files"),
+ ibfd);
bfd_set_error (bfd_error_bad_value);
ok = FALSE;
if ((in_flags & EF_IA_64_CONS_GP) != (out_flags & EF_IA_64_CONS_GP))
{
(*_bfd_error_handler)
- (_("%s: linking constant-gp files with non-constant-gp files"),
- bfd_archive_filename (ibfd));
+ (_("%B: linking constant-gp files with non-constant-gp files"),
+ ibfd);
bfd_set_error (bfd_error_bad_value);
ok = FALSE;
!= (out_flags & EF_IA_64_NOFUNCDESC_CONS_GP))
{
(*_bfd_error_handler)
- (_("%s: linking auto-pic files with non-auto-pic files"),
- bfd_archive_filename (ibfd));
+ (_("%B: linking auto-pic files with non-auto-pic files"),
+ ibfd);
bfd_set_error (bfd_error_bad_value);
ok = FALSE;
#define elf_backend_rela_normal 1
#define elf_backend_special_sections elfNN_ia64_special_sections
+/* FIXME: PR 290: The Intel C compiler generates SHT_IA_64_UNWIND with
+ SHF_LINK_ORDER. But it doesn't set theh sh_link or sh_info fields.
+ We don't want to flood users with so many error messages. We turn
+ off the warning for now. It will be turned on later when the Intel
+ compiler is fixed. */
+#define elf_backend_link_order_error_handler NULL
+
#include "elfNN-target.h"
/* HPUX-specific vectors. */