/* MIPS-specific support for ELF
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
+ Free Software Foundation, Inc.
Most of the information added by Ian Lance Taylor, Cygnus Support,
<ian@cygnus.com>.
(abfd == NULL)
(2) SYMBOL + OFFSET addresses, where SYMBOL is local to an input bfd
(abfd != NULL, symndx >= 0)
- (3) global and forced-local symbols
+ (3) SYMBOL addresses, where SYMBOL is not local to an input bfd
(abfd != NULL, symndx == -1)
Type (3) entries are treated differently for different types of GOT.
that should be added to the symbol value. */
bfd_vma addend;
/* If abfd != NULL && symndx == -1, the hash table entry
- corresponding to a global symbol in the got (or, local, if
- h->forced_local). */
+ corresponding to symbol in the GOT. The symbol's entry
+ is in the local area if h->global_got_area is GGA_NONE,
+ otherwise it is in the global area. */
struct mips_elf_link_hash_entry *h;
} d;
struct elf_link_hash_entry *global_gotsym;
/* The number of global .got entries. */
unsigned int global_gotno;
+ /* The number of global .got entries that are in the GGA_RELOC_ONLY area. */
+ unsigned int reloc_only_gotno;
/* The number of .got slots used for TLS. */
unsigned int tls_gotno;
/* The first unused TLS .got entry. Used only during
/* Map an input bfd to a got in a multi-got link. */
-struct mips_elf_bfd2got_hash {
+struct mips_elf_bfd2got_hash
+{
bfd *bfd;
struct mips_got_info *g;
};
#define mips_elf_section_data(sec) \
((struct _mips_elf_section_data *) elf_section_data (sec))
+#define is_mips_elf(bfd) \
+ (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
+ && elf_tdata (bfd) != NULL \
+ && elf_object_id (bfd) == MIPS_ELF_DATA)
+
/* The ABI says that every symbol used by dynamic relocations must have
a global GOT entry. Among other things, this provides the dynamic
linker with a free, directly-indexed cache. The GOT can therefore
#define GGA_RELOC_ONLY 1
#define GGA_NONE 2
+/* Information about a non-PIC interface to a PIC function. There are
+ two ways of creating these interfaces. The first is to add:
+
+ lui $25,%hi(func)
+ addiu $25,$25,%lo(func)
+
+ immediately before a PIC function "func". The second is to add:
+
+ lui $25,%hi(func)
+ j func
+ addiu $25,$25,%lo(func)
+
+ to a separate trampoline section.
+
+ Stubs of the first kind go in a new section immediately before the
+ target function. Stubs of the second kind go in a single section
+ pointed to by the hash table's "strampoline" field. */
+struct mips_elf_la25_stub {
+ /* The generated section that contains this stub. */
+ asection *stub_section;
+
+ /* The offset of the stub from the start of STUB_SECTION. */
+ bfd_vma offset;
+
+ /* One symbol for the original function. Its location is available
+ in H->root.root.u.def. */
+ struct mips_elf_link_hash_entry *h;
+};
+
+/* Macros for populating a mips_elf_la25_stub. */
+
+#define LA25_LUI(VAL) (0x3c190000 | (VAL)) /* lui t9,VAL */
+#define LA25_J(VAL) (0x08000000 | (((VAL) >> 2) & 0x3ffffff)) /* j VAL */
+#define LA25_ADDIU(VAL) (0x27390000 | (VAL)) /* addiu t9,t9,VAL */
+#define LA25_LUI_MICROMIPS(VAL) \
+ (0x41b90000 | (VAL)) /* lui t9,VAL */
+#define LA25_J_MICROMIPS(VAL) \
+ (0xd4000000 | (((VAL) >> 1) & 0x3ffffff)) /* j VAL */
+#define LA25_ADDIU_MICROMIPS(VAL) \
+ (0x33390000 | (VAL)) /* addiu t9,t9,VAL */
+
/* This structure is passed to mips_elf_sort_hash_table_f when sorting
the dynamic symbols. */
/* External symbol information. */
EXTR esym;
+ /* The la25 stub we have created for ths symbol, if any. */
+ struct mips_elf_la25_stub *la25_stub;
+
/* Number of R_MIPS_32, R_MIPS_REL32, or R_MIPS_64 relocs against
this symbol. */
unsigned int possibly_dynamic_relocs;
/* The highest GGA_* value that satisfies all references to this symbol. */
unsigned int global_got_area : 2;
+ /* True if all GOT relocations against this symbol are for calls. This is
+ a looser condition than no_fn_stub below, because there may be other
+ non-call non-GOT relocations against the symbol. */
+ unsigned int got_only_for_calls : 1;
+
/* True if one of the relocations described by possibly_dynamic_relocs
is against a readonly section. */
unsigned int readonly_reloc : 1;
+ /* True if there is a relocation against this symbol that must be
+ resolved by the static linker (in other words, if the relocation
+ cannot possibly be made dynamic). */
+ unsigned int has_static_relocs : 1;
+
/* True if we must not create a .MIPS.stubs entry for this symbol.
This is set, for example, if there are relocations related to
taking the function's address, i.e. any but R_MIPS_CALL*16 ones.
in any relocs other than a 16 bit call. */
unsigned int need_fn_stub : 1;
- /* Are we referenced by some kind of relocation? */
- unsigned int is_relocation_target : 1;
-
- /* Are we referenced by branch relocations? */
- unsigned int is_branch_target : 1;
+ /* True if this symbol is referenced by branch relocations from
+ any non-PIC input file. This is used to determine whether an
+ la25 stub is required. */
+ unsigned int has_nonpic_branches : 1;
/* Does this symbol need a traditional MIPS lazy-binding stub
(as opposed to a PLT entry)? */
/* String section indices for the dynamic section symbols. */
bfd_size_type dynsym_sec_strindex[SIZEOF_MIPS_DYNSYM_SECNAMES];
#endif
+
/* The number of .rtproc entries. */
bfd_size_type procedure_count;
+
/* The size of the .compact_rel section (if SGI_COMPAT). */
bfd_size_type compact_rel_size;
+
/* This flag indicates that the value of DT_MIPS_RLD_MAP dynamic
entry is set to the address of __rld_obj_head as in IRIX5. */
bfd_boolean use_rld_obj_head;
- /* This is the value of the __rld_map or __rld_obj_head symbol. */
- bfd_vma rld_value;
+
+ /* The __rld_map or __rld_obj_head symbol. */
+ struct elf_link_hash_entry *rld_symbol;
+
/* This is set if we see any mips16 stub sections. */
bfd_boolean mips16_stubs_seen;
+
+ /* True if we can generate copy relocs and PLTs. */
+ bfd_boolean use_plts_and_copy_relocs;
+
/* True if we're generating code for VxWorks. */
bfd_boolean is_vxworks;
+
/* True if we already reported the small-data section overflow. */
bfd_boolean small_data_overflow_reported;
+
/* Shortcuts to some dynamic sections, or NULL if they are not
being used. */
asection *srelbss;
asection *splt;
asection *sstubs;
asection *sgot;
+
/* The master GOT information. */
struct mips_got_info *got_info;
- /* The size of the PLT header in bytes (VxWorks only). */
+
+ /* The size of the PLT header in bytes. */
bfd_vma plt_header_size;
- /* The size of a PLT entry in bytes (VxWorks only). */
+
+ /* The size of a PLT entry in bytes. */
bfd_vma plt_entry_size;
+
/* The number of functions that need a lazy-binding stub. */
bfd_vma lazy_stub_count;
+
/* The size of a function stub entry in bytes. */
bfd_vma function_stub_size;
+
+ /* The number of reserved entries at the beginning of the GOT. */
+ unsigned int reserved_gotno;
+
+ /* The section used for mips_elf_la25_stub trampolines.
+ See the comment above that structure for details. */
+ asection *strampoline;
+
+ /* A table of mips_elf_la25_stubs, indexed by (input_section, offset)
+ pairs. */
+ htab_t la25_stubs;
+
+ /* A function FN (NAME, IS, OS) that creates a new input section
+ called NAME and links it to output section OS. If IS is nonnull,
+ the new section should go immediately before it, otherwise it
+ should go at the (current) beginning of OS.
+
+ The function returns the new section on success, otherwise it
+ returns null. */
+ asection *(*add_stub_section) (const char *, asection *, asection *);
+};
+
+/* Get the MIPS ELF linker hash table from a link_info structure. */
+
+#define mips_elf_hash_table(p) \
+ (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
+ == MIPS_ELF_DATA ? ((struct mips_elf_link_hash_table *) ((p)->hash)) : NULL)
+
+/* A structure used to communicate with htab_traverse callbacks. */
+struct mips_htab_traverse_info
+{
+ /* The usual link-wide information. */
+ struct bfd_link_info *info;
+ bfd *output_bfd;
+
+ /* Starts off FALSE and is set to TRUE if the link should be aborted. */
+ bfd_boolean error;
};
#define TLS_RELOC_P(r_type) \
|| r_type == R_MIPS_TLS_TPREL32 \
|| r_type == R_MIPS_TLS_TPREL64 \
|| r_type == R_MIPS_TLS_TPREL_HI16 \
- || r_type == R_MIPS_TLS_TPREL_LO16)
+ || r_type == R_MIPS_TLS_TPREL_LO16 \
+ || r_type == R_MIPS16_TLS_GD \
+ || r_type == R_MIPS16_TLS_LDM \
+ || r_type == R_MIPS16_TLS_DTPREL_HI16 \
+ || r_type == R_MIPS16_TLS_DTPREL_LO16 \
+ || r_type == R_MIPS16_TLS_GOTTPREL \
+ || r_type == R_MIPS16_TLS_TPREL_HI16 \
+ || r_type == R_MIPS16_TLS_TPREL_LO16 \
+ || r_type == R_MICROMIPS_TLS_GD \
+ || r_type == R_MICROMIPS_TLS_LDM \
+ || r_type == R_MICROMIPS_TLS_DTPREL_HI16 \
+ || r_type == R_MICROMIPS_TLS_DTPREL_LO16 \
+ || r_type == R_MICROMIPS_TLS_GOTTPREL \
+ || r_type == R_MICROMIPS_TLS_TPREL_HI16 \
+ || r_type == R_MICROMIPS_TLS_TPREL_LO16)
/* Structure used to pass information to mips_elf_output_extsym. */
/* This will be used when we sort the dynamic relocation records. */
static bfd *reldyn_sorting_bfd;
+/* True if ABFD is for CPUs with load interlocking that include
+ non-MIPS1 CPUs and R3900. */
+#define LOAD_INTERLOCKS_P(abfd) \
+ ( ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) != E_MIPS_ARCH_1) \
+ || ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_3900))
+
+/* True if ABFD is for CPUs that are faster if JAL is converted to BAL.
+ This should be safe for all architectures. We enable this predicate
+ for RM9000 for now. */
+#define JAL_TO_BAL_P(abfd) \
+ ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_9000)
+
+/* True if ABFD is for CPUs that are faster if JALR is converted to BAL.
+ This should be safe for all architectures. We enable this predicate for
+ all CPUs. */
+#define JALR_TO_BAL_P(abfd) 1
+
+/* True if ABFD is for CPUs that are faster if JR is converted to B.
+ This should be safe for all architectures. We enable this predicate for
+ all CPUs. */
+#define JR_TO_B_P(abfd) 1
+
+/* True if ABFD is a PIC object. */
+#define PIC_OBJECT_P(abfd) \
+ ((elf_elfheader (abfd)->e_flags & EF_MIPS_PIC) != 0)
+
/* Nonzero if ABFD is using the N32 ABI. */
#define ABI_N32_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI2) != 0)
#define MIPS_ELF_GOT_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->arch_size / 8)
+/* The size of the .rld_map section. */
+#define MIPS_ELF_RLD_MAP_SIZE(abfd) \
+ (get_elf_backend_data (abfd)->s->arch_size / 8)
+
/* The size of a symbol-table entry. */
#define MIPS_ELF_SYM_SIZE(abfd) \
(get_elf_backend_data (abfd)->s->sizeof_sym)
? bfd_put_64 (abfd, val, ptr) \
: bfd_put_32 (abfd, val, ptr))
+/* The opcode for word-sized loads (LW or LD). */
+#define MIPS_ELF_LOAD_WORD(abfd) \
+ (ABI_64_P (abfd) ? 0xdc000000 : 0x8c000000)
+
/* Add a dynamic symbol table-entry. */
#define MIPS_ELF_ADD_DYNAMIC_ENTRY(info, tag, val) \
_bfd_elf_add_dynamic_entry (info, tag, val)
#define MIPS_ELF_RTYPE_TO_HOWTO(abfd, rtype, rela) \
(get_elf_backend_data (abfd)->elf_backend_mips_rtype_to_howto (rtype, rela))
-/* Determine whether the internal relocation of index REL_IDX is REL
- (zero) or RELA (non-zero). The assumption is that, if there are
- two relocation sections for this section, one of them is REL and
- the other is RELA. If the index of the relocation we're testing is
- in range for the first relocation section, check that the external
- relocation size is that for RELA. It is also assumed that, if
- rel_idx is not in range for the first section, and this first
- section contains REL relocs, then the relocation is in the second
- section, that is RELA. */
-#define MIPS_RELOC_RELA_P(abfd, sec, rel_idx) \
- ((NUM_SHDR_ENTRIES (&elf_section_data (sec)->rel_hdr) \
- * get_elf_backend_data (abfd)->s->int_rels_per_ext_rel \
- > (bfd_vma)(rel_idx)) \
- == (elf_section_data (sec)->rel_hdr.sh_entsize \
- == (ABI_64_P (abfd) ? sizeof (Elf64_External_Rela) \
- : sizeof (Elf32_External_Rela))))
-
/* The name of the dynamic relocation section. */
#define MIPS_ELF_REL_DYN_NAME(INFO) \
(mips_elf_hash_table (INFO)->is_vxworks ? ".rela.dyn" : ".rel.dyn")
#define MINUS_ONE (((bfd_vma)0) - 1)
#define MINUS_TWO (((bfd_vma)0) - 2)
-/* The number of local .got entries we reserve. */
-#define MIPS_RESERVED_GOTNO(INFO) \
- (mips_elf_hash_table (INFO)->is_vxworks ? 3 : 2)
-
/* The value to write into got[1] for SVR4 targets, to identify it is
a GNU object. The dynamic linker can then use got[1] to store the
module pointer. */
#define CALL_STUB_P(name) CONST_STRNEQ (name, CALL_STUB)
#define CALL_FP_STUB_P(name) CONST_STRNEQ (name, CALL_FP_STUB)
\f
+/* The format of the first PLT entry in an O32 executable. */
+static const bfd_vma mips_o32_exec_plt0_entry[] =
+{
+ 0x3c1c0000, /* lui $28, %hi(&GOTPLT[0]) */
+ 0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */
+ 0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
+ 0x031cc023, /* subu $24, $24, $28 */
+ 0x03e07821, /* move $15, $31 # 32-bit move (addu) */
+ 0x0018c082, /* srl $24, $24, 2 */
+ 0x0320f809, /* jalr $25 */
+ 0x2718fffe /* subu $24, $24, 2 */
+};
+
+/* The format of the first PLT entry in an N32 executable. Different
+ because gp ($28) is not available; we use t2 ($14) instead. */
+static const bfd_vma mips_n32_exec_plt0_entry[] =
+{
+ 0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
+ 0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */
+ 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
+ 0x030ec023, /* subu $24, $24, $14 */
+ 0x03e07821, /* move $15, $31 # 32-bit move (addu) */
+ 0x0018c082, /* srl $24, $24, 2 */
+ 0x0320f809, /* jalr $25 */
+ 0x2718fffe /* subu $24, $24, 2 */
+};
+
+/* The format of the first PLT entry in an N64 executable. Different
+ from N32 because of the increased size of GOT entries. */
+static const bfd_vma mips_n64_exec_plt0_entry[] =
+{
+ 0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
+ 0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */
+ 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
+ 0x030ec023, /* subu $24, $24, $14 */
+ 0x03e0782d, /* move $15, $31 # 64-bit move (daddu) */
+ 0x0018c0c2, /* srl $24, $24, 3 */
+ 0x0320f809, /* jalr $25 */
+ 0x2718fffe /* subu $24, $24, 2 */
+};
+
+/* The format of subsequent PLT entries. */
+static const bfd_vma mips_exec_plt_entry[] =
+{
+ 0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
+ 0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
+ 0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
+ 0x03200008 /* jr $25 */
+};
+
/* The format of the first PLT entry in a VxWorks executable. */
-static const bfd_vma mips_vxworks_exec_plt0_entry[] = {
+static const bfd_vma mips_vxworks_exec_plt0_entry[] =
+{
0x3c190000, /* lui t9, %hi(_GLOBAL_OFFSET_TABLE_) */
0x27390000, /* addiu t9, t9, %lo(_GLOBAL_OFFSET_TABLE_) */
0x8f390008, /* lw t9, 8(t9) */
};
/* The format of subsequent PLT entries. */
-static const bfd_vma mips_vxworks_exec_plt_entry[] = {
+static const bfd_vma mips_vxworks_exec_plt_entry[] =
+{
0x10000000, /* b .PLT_resolver */
0x24180000, /* li t8, <pltindex> */
0x3c190000, /* lui t9, %hi(<.got.plt slot>) */
};
/* The format of the first PLT entry in a VxWorks shared object. */
-static const bfd_vma mips_vxworks_shared_plt0_entry[] = {
+static const bfd_vma mips_vxworks_shared_plt0_entry[] =
+{
0x8f990008, /* lw t9, 8(gp) */
0x00000000, /* nop */
0x03200008, /* jr t9 */
};
/* The format of subsequent PLT entries. */
-static const bfd_vma mips_vxworks_shared_plt_entry[] = {
+static const bfd_vma mips_vxworks_shared_plt_entry[] =
+{
0x10000000, /* b .PLT_resolver */
0x24180000 /* li t8, <pltindex> */
};
\f
+/* microMIPS 32-bit opcode helper installer. */
+
+static void
+bfd_put_micromips_32 (const bfd *abfd, bfd_vma opcode, bfd_byte *ptr)
+{
+ bfd_put_16 (abfd, (opcode >> 16) & 0xffff, ptr);
+ bfd_put_16 (abfd, opcode & 0xffff, ptr + 2);
+}
+
+/* microMIPS 32-bit opcode helper retriever. */
+
+static bfd_vma
+bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
+{
+ return (bfd_get_16 (abfd, ptr) << 16) | bfd_get_16 (abfd, ptr + 2);
+}
+\f
/* Look up an entry in a MIPS ELF linker hash table. */
#define mips_elf_link_hash_lookup(table, string, create, copy, follow) \
(bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
(info)))
-/* Get the MIPS ELF linker hash table from a link_info structure. */
-
-#define mips_elf_hash_table(p) \
- ((struct mips_elf_link_hash_table *) ((p)->hash))
-
/* Find the base offsets for thread-local storage in this object,
for GD/LD and IE/LE respectively. */
/* We use -2 as a marker to indicate that the information has
not been set. -1 means there is no associated ifd. */
ret->esym.ifd = -2;
+ ret->la25_stub = 0;
ret->possibly_dynamic_relocs = 0;
ret->fn_stub = NULL;
ret->call_stub = NULL;
ret->call_fp_stub = NULL;
ret->tls_type = GOT_NORMAL;
ret->global_got_area = GGA_NONE;
+ ret->got_only_for_calls = TRUE;
ret->readonly_reloc = FALSE;
+ ret->has_static_relocs = FALSE;
ret->no_fn_stub = FALSE;
ret->need_fn_stub = FALSE;
- ret->is_relocation_target = FALSE;
- ret->is_branch_target = FALSE;
+ ret->has_nonpic_branches = FALSE;
ret->needs_lazy_stub = FALSE;
}
return FALSE;
}
\f
+/* We're going to create a stub for H. Create a symbol for the stub's
+ value and size, to help make the disassembly easier to read. */
+
+static bfd_boolean
+mips_elf_create_stub_symbol (struct bfd_link_info *info,
+ struct mips_elf_link_hash_entry *h,
+ const char *prefix, asection *s, bfd_vma value,
+ bfd_vma size)
+{
+ struct bfd_link_hash_entry *bh;
+ struct elf_link_hash_entry *elfh;
+ const char *name;
+
+ if (ELF_ST_IS_MICROMIPS (h->root.other))
+ value |= 1;
+
+ /* Create a new symbol. */
+ name = ACONCAT ((prefix, h->root.root.root.string, NULL));
+ bh = NULL;
+ if (!_bfd_generic_link_add_one_symbol (info, s->owner, name,
+ BSF_LOCAL, s, value, NULL,
+ TRUE, FALSE, &bh))
+ return FALSE;
+
+ /* Make it a local function. */
+ elfh = (struct elf_link_hash_entry *) bh;
+ elfh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
+ elfh->size = size;
+ elfh->forced_local = 1;
+ return TRUE;
+}
+
/* We're about to redefine H. Create a symbol to represent H's
current value and size, to help make the disassembly easier
to read. */
function, or 0 if we can't decide which function that is. */
static unsigned long
-mips16_stub_symndx (asection *sec, const Elf_Internal_Rela *relocs,
+mips16_stub_symndx (const struct elf_backend_data *bed,
+ asection *sec ATTRIBUTE_UNUSED,
+ const Elf_Internal_Rela *relocs,
const Elf_Internal_Rela *relend)
{
+ int int_rels_per_ext_rel = bed->s->int_rels_per_ext_rel;
const Elf_Internal_Rela *rel;
- /* Trust the first R_MIPS_NONE relocation, if any. */
- for (rel = relocs; rel < relend; rel++)
+ /* Trust the first R_MIPS_NONE relocation, if any, but not a subsequent
+ one in a compound relocation. */
+ for (rel = relocs; rel < relend; rel += int_rels_per_ext_rel)
if (ELF_R_TYPE (sec->owner, rel->r_info) == R_MIPS_NONE)
return ELF_R_SYM (sec->owner, rel->r_info);
/* Check the mips16 stubs for a particular symbol, and see if we can
discard them. */
-static bfd_boolean
-mips_elf_check_mips16_stubs (struct mips_elf_link_hash_entry *h, void *data)
+static void
+mips_elf_check_mips16_stubs (struct bfd_link_info *info,
+ struct mips_elf_link_hash_entry *h)
{
- struct bfd_link_info *info;
-
- info = (struct bfd_link_info *) data;
- if (h->root.root.type == bfd_link_hash_warning)
- h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
-
/* Dynamic symbols must use the standard call interface, in case other
objects try to call them. */
if (h->fn_stub != NULL
h->call_fp_stub->reloc_count = 0;
h->call_fp_stub->flags |= SEC_EXCLUDE;
}
+}
+
+/* Hashtable callbacks for mips_elf_la25_stubs. */
+
+static hashval_t
+mips_elf_la25_stub_hash (const void *entry_)
+{
+ const struct mips_elf_la25_stub *entry;
+
+ entry = (struct mips_elf_la25_stub *) entry_;
+ return entry->h->root.root.u.def.section->id
+ + entry->h->root.root.u.def.value;
+}
+
+static int
+mips_elf_la25_stub_eq (const void *entry1_, const void *entry2_)
+{
+ const struct mips_elf_la25_stub *entry1, *entry2;
+
+ entry1 = (struct mips_elf_la25_stub *) entry1_;
+ entry2 = (struct mips_elf_la25_stub *) entry2_;
+ return ((entry1->h->root.root.u.def.section
+ == entry2->h->root.root.u.def.section)
+ && (entry1->h->root.root.u.def.value
+ == entry2->h->root.root.u.def.value));
+}
+
+/* Called by the linker to set up the la25 stub-creation code. FN is
+ the linker's implementation of add_stub_function. Return true on
+ success. */
+
+bfd_boolean
+_bfd_mips_elf_init_stubs (struct bfd_link_info *info,
+ asection *(*fn) (const char *, asection *,
+ asection *))
+{
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ htab->add_stub_section = fn;
+ htab->la25_stubs = htab_try_create (1, mips_elf_la25_stub_hash,
+ mips_elf_la25_stub_eq, NULL);
+ if (htab->la25_stubs == NULL)
+ return FALSE;
+
+ return TRUE;
+}
+
+/* Return true if H is a locally-defined PIC function, in the sense
+ that it or its fn_stub might need $25 to be valid on entry.
+ Note that MIPS16 functions set up $gp using PC-relative instructions,
+ so they themselves never need $25 to be valid. Only non-MIPS16
+ entry points are of interest here. */
+
+static bfd_boolean
+mips_elf_local_pic_function_p (struct mips_elf_link_hash_entry *h)
+{
+ return ((h->root.root.type == bfd_link_hash_defined
+ || h->root.root.type == bfd_link_hash_defweak)
+ && h->root.def_regular
+ && !bfd_is_abs_section (h->root.root.u.def.section)
+ && (!ELF_ST_IS_MIPS16 (h->root.other)
+ || (h->fn_stub && h->need_fn_stub))
+ && (PIC_OBJECT_P (h->root.root.u.def.section->owner)
+ || ELF_ST_IS_MIPS_PIC (h->root.other)));
+}
+
+/* Set *SEC to the input section that contains the target of STUB.
+ Return the offset of the target from the start of that section. */
+
+static bfd_vma
+mips_elf_get_la25_target (struct mips_elf_la25_stub *stub,
+ asection **sec)
+{
+ if (ELF_ST_IS_MIPS16 (stub->h->root.other))
+ {
+ BFD_ASSERT (stub->h->need_fn_stub);
+ *sec = stub->h->fn_stub;
+ return 0;
+ }
+ else
+ {
+ *sec = stub->h->root.root.u.def.section;
+ return stub->h->root.root.u.def.value;
+ }
+}
+
+/* STUB describes an la25 stub that we have decided to implement
+ by inserting an LUI/ADDIU pair before the target function.
+ Create the section and redirect the function symbol to it. */
+
+static bfd_boolean
+mips_elf_add_la25_intro (struct mips_elf_la25_stub *stub,
+ struct bfd_link_info *info)
+{
+ struct mips_elf_link_hash_table *htab;
+ char *name;
+ asection *s, *input_section;
+ unsigned int align;
+
+ htab = mips_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ /* Create a unique name for the new section. */
+ name = bfd_malloc (11 + sizeof (".text.stub."));
+ if (name == NULL)
+ return FALSE;
+ sprintf (name, ".text.stub.%d", (int) htab_elements (htab->la25_stubs));
+
+ /* Create the section. */
+ mips_elf_get_la25_target (stub, &input_section);
+ s = htab->add_stub_section (name, input_section,
+ input_section->output_section);
+ if (s == NULL)
+ return FALSE;
+
+ /* Make sure that any padding goes before the stub. */
+ align = input_section->alignment_power;
+ if (!bfd_set_section_alignment (s->owner, s, align))
+ return FALSE;
+ if (align > 3)
+ s->size = (1 << align) - 8;
+
+ /* Create a symbol for the stub. */
+ mips_elf_create_stub_symbol (info, stub->h, ".pic.", s, s->size, 8);
+ stub->stub_section = s;
+ stub->offset = s->size;
+
+ /* Allocate room for it. */
+ s->size += 8;
+ return TRUE;
+}
+
+/* STUB describes an la25 stub that we have decided to implement
+ with a separate trampoline. Allocate room for it and redirect
+ the function symbol to it. */
+
+static bfd_boolean
+mips_elf_add_la25_trampoline (struct mips_elf_la25_stub *stub,
+ struct bfd_link_info *info)
+{
+ struct mips_elf_link_hash_table *htab;
+ asection *s;
+
+ htab = mips_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ /* Create a trampoline section, if we haven't already. */
+ s = htab->strampoline;
+ if (s == NULL)
+ {
+ asection *input_section = stub->h->root.root.u.def.section;
+ s = htab->add_stub_section (".text", NULL,
+ input_section->output_section);
+ if (s == NULL || !bfd_set_section_alignment (s->owner, s, 4))
+ return FALSE;
+ htab->strampoline = s;
+ }
+
+ /* Create a symbol for the stub. */
+ mips_elf_create_stub_symbol (info, stub->h, ".pic.", s, s->size, 16);
+ stub->stub_section = s;
+ stub->offset = s->size;
+
+ /* Allocate room for it. */
+ s->size += 16;
+ return TRUE;
+}
+
+/* H describes a symbol that needs an la25 stub. Make sure that an
+ appropriate stub exists and point H at it. */
+
+static bfd_boolean
+mips_elf_add_la25_stub (struct bfd_link_info *info,
+ struct mips_elf_link_hash_entry *h)
+{
+ struct mips_elf_link_hash_table *htab;
+ struct mips_elf_la25_stub search, *stub;
+ bfd_boolean use_trampoline_p;
+ asection *s;
+ bfd_vma value;
+ void **slot;
+
+ /* Describe the stub we want. */
+ search.stub_section = NULL;
+ search.offset = 0;
+ search.h = h;
+
+ /* See if we've already created an equivalent stub. */
+ htab = mips_elf_hash_table (info);
+ if (htab == NULL)
+ return FALSE;
+
+ slot = htab_find_slot (htab->la25_stubs, &search, INSERT);
+ if (slot == NULL)
+ return FALSE;
+
+ stub = (struct mips_elf_la25_stub *) *slot;
+ if (stub != NULL)
+ {
+ /* We can reuse the existing stub. */
+ h->la25_stub = stub;
+ return TRUE;
+ }
+
+ /* Create a permanent copy of ENTRY and add it to the hash table. */
+ stub = bfd_malloc (sizeof (search));
+ if (stub == NULL)
+ return FALSE;
+ *stub = search;
+ *slot = stub;
+
+ /* Prefer to use LUI/ADDIU stubs if the function is at the beginning
+ of the section and if we would need no more than 2 nops. */
+ value = mips_elf_get_la25_target (stub, &s);
+ use_trampoline_p = (value != 0 || s->alignment_power > 4);
+
+ h->la25_stub = stub;
+ return (use_trampoline_p
+ ? mips_elf_add_la25_trampoline (stub, info)
+ : mips_elf_add_la25_intro (stub, info));
+}
+
+/* A mips_elf_link_hash_traverse callback that is called before sizing
+ sections. DATA points to a mips_htab_traverse_info structure. */
+static bfd_boolean
+mips_elf_check_symbols (struct mips_elf_link_hash_entry *h, void *data)
+{
+ struct mips_htab_traverse_info *hti;
+
+ hti = (struct mips_htab_traverse_info *) data;
+ if (!hti->info->relocatable)
+ mips_elf_check_mips16_stubs (hti->info, h);
+
+ if (mips_elf_local_pic_function_p (h))
+ {
+ /* PR 12845: If H is in a section that has been garbage
+ collected it will have its output section set to *ABS*. */
+ if (bfd_is_abs_section (h->root.root.u.def.section->output_section))
+ return TRUE;
+
+ /* H is a function that might need $25 to be valid on entry.
+ If we're creating a non-PIC relocatable object, mark H as
+ being PIC. If we're creating a non-relocatable object with
+ non-PIC branches and jumps to H, make sure that H has an la25
+ stub. */
+ if (hti->info->relocatable)
+ {
+ if (!PIC_OBJECT_P (hti->output_bfd))
+ h->root.other = ELF_ST_SET_MIPS_PIC (h->root.other);
+ }
+ else if (h->has_nonpic_branches && !mips_elf_add_la25_stub (hti->info, h))
+ {
+ hti->error = TRUE;
+ return FALSE;
+ }
+ }
return TRUE;
}
\f
case R_MIPS16_CALL16:
case R_MIPS16_HI16:
case R_MIPS16_LO16:
+ case R_MIPS16_TLS_GD:
+ case R_MIPS16_TLS_LDM:
+ case R_MIPS16_TLS_DTPREL_HI16:
+ case R_MIPS16_TLS_DTPREL_LO16:
+ case R_MIPS16_TLS_GOTTPREL:
+ case R_MIPS16_TLS_TPREL_HI16:
+ case R_MIPS16_TLS_TPREL_LO16:
return TRUE;
default:
}
}
+/* Check if a microMIPS reloc. */
+
static inline bfd_boolean
-got16_reloc_p (int r_type)
+micromips_reloc_p (unsigned int r_type)
{
- return r_type == R_MIPS_GOT16 || r_type == R_MIPS16_GOT16;
+ return r_type >= R_MICROMIPS_min && r_type < R_MICROMIPS_max;
}
+/* Similar to MIPS16, the two 16-bit halves in microMIPS must be swapped
+ on a little-endian system. This does not apply to R_MICROMIPS_PC7_S1
+ and R_MICROMIPS_PC10_S1 relocs that apply to 16-bit instructions. */
+
static inline bfd_boolean
-call16_reloc_p (int r_type)
+micromips_reloc_shuffle_p (unsigned int r_type)
{
- return r_type == R_MIPS_CALL16 || r_type == R_MIPS16_CALL16;
+ return (micromips_reloc_p (r_type)
+ && r_type != R_MICROMIPS_PC7_S1
+ && r_type != R_MICROMIPS_PC10_S1);
}
static inline bfd_boolean
-hi16_reloc_p (int r_type)
+got16_reloc_p (int r_type)
{
- return r_type == R_MIPS_HI16 || r_type == R_MIPS16_HI16;
+ return (r_type == R_MIPS_GOT16
+ || r_type == R_MIPS16_GOT16
+ || r_type == R_MICROMIPS_GOT16);
}
static inline bfd_boolean
-lo16_reloc_p (int r_type)
+call16_reloc_p (int r_type)
{
- return r_type == R_MIPS_LO16 || r_type == R_MIPS16_LO16;
+ return (r_type == R_MIPS_CALL16
+ || r_type == R_MIPS16_CALL16
+ || r_type == R_MICROMIPS_CALL16);
}
static inline bfd_boolean
-mips16_call_reloc_p (int r_type)
+got_disp_reloc_p (unsigned int r_type)
{
- return r_type == R_MIPS16_26 || r_type == R_MIPS16_CALL16;
+ return r_type == R_MIPS_GOT_DISP || r_type == R_MICROMIPS_GOT_DISP;
}
-void
-_bfd_mips16_elf_reloc_unshuffle (bfd *abfd, int r_type,
- bfd_boolean jal_shuffle, bfd_byte *data)
+static inline bfd_boolean
+got_page_reloc_p (unsigned int r_type)
{
- bfd_vma extend, insn, val;
-
- if (!mips16_reloc_p (r_type))
- return;
+ return r_type == R_MIPS_GOT_PAGE || r_type == R_MICROMIPS_GOT_PAGE;
+}
- /* Pick up the mips16 extend instruction and the real instruction. */
- extend = bfd_get_16 (abfd, data);
- insn = bfd_get_16 (abfd, data + 2);
- if (r_type == R_MIPS16_26)
- {
- if (jal_shuffle)
- val = ((extend & 0xfc00) << 16) | ((extend & 0x3e0) << 11)
- | ((extend & 0x1f) << 21) | insn;
- else
- val = extend << 16 | insn;
- }
- else
- val = ((extend & 0xf800) << 16) | ((insn & 0xffe0) << 11)
- | ((extend & 0x1f) << 11) | (extend & 0x7e0) | (insn & 0x1f);
- bfd_put_32 (abfd, val, data);
+static inline bfd_boolean
+got_ofst_reloc_p (unsigned int r_type)
+{
+ return r_type == R_MIPS_GOT_OFST || r_type == R_MICROMIPS_GOT_OFST;
}
-void
-_bfd_mips16_elf_reloc_shuffle (bfd *abfd, int r_type,
- bfd_boolean jal_shuffle, bfd_byte *data)
+static inline bfd_boolean
+got_hi16_reloc_p (unsigned int r_type)
{
- bfd_vma extend, insn, val;
+ return r_type == R_MIPS_GOT_HI16 || r_type == R_MICROMIPS_GOT_HI16;
+}
- if (!mips16_reloc_p (r_type))
+static inline bfd_boolean
+got_lo16_reloc_p (unsigned int r_type)
+{
+ return r_type == R_MIPS_GOT_LO16 || r_type == R_MICROMIPS_GOT_LO16;
+}
+
+static inline bfd_boolean
+call_hi16_reloc_p (unsigned int r_type)
+{
+ return r_type == R_MIPS_CALL_HI16 || r_type == R_MICROMIPS_CALL_HI16;
+}
+
+static inline bfd_boolean
+call_lo16_reloc_p (unsigned int r_type)
+{
+ return r_type == R_MIPS_CALL_LO16 || r_type == R_MICROMIPS_CALL_LO16;
+}
+
+static inline bfd_boolean
+hi16_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS_HI16
+ || r_type == R_MIPS16_HI16
+ || r_type == R_MICROMIPS_HI16);
+}
+
+static inline bfd_boolean
+lo16_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS_LO16
+ || r_type == R_MIPS16_LO16
+ || r_type == R_MICROMIPS_LO16);
+}
+
+static inline bfd_boolean
+mips16_call_reloc_p (int r_type)
+{
+ return r_type == R_MIPS16_26 || r_type == R_MIPS16_CALL16;
+}
+
+static inline bfd_boolean
+jal_reloc_p (int r_type)
+{
+ return (r_type == R_MIPS_26
+ || r_type == R_MIPS16_26
+ || r_type == R_MICROMIPS_26_S1);
+}
+
+static inline bfd_boolean
+micromips_branch_reloc_p (int r_type)
+{
+ return (r_type == R_MICROMIPS_26_S1
+ || r_type == R_MICROMIPS_PC16_S1
+ || r_type == R_MICROMIPS_PC10_S1
+ || r_type == R_MICROMIPS_PC7_S1);
+}
+
+static inline bfd_boolean
+tls_gd_reloc_p (unsigned int r_type)
+{
+ return (r_type == R_MIPS_TLS_GD
+ || r_type == R_MIPS16_TLS_GD
+ || r_type == R_MICROMIPS_TLS_GD);
+}
+
+static inline bfd_boolean
+tls_ldm_reloc_p (unsigned int r_type)
+{
+ return (r_type == R_MIPS_TLS_LDM
+ || r_type == R_MIPS16_TLS_LDM
+ || r_type == R_MICROMIPS_TLS_LDM);
+}
+
+static inline bfd_boolean
+tls_gottprel_reloc_p (unsigned int r_type)
+{
+ return (r_type == R_MIPS_TLS_GOTTPREL
+ || r_type == R_MIPS16_TLS_GOTTPREL
+ || r_type == R_MICROMIPS_TLS_GOTTPREL);
+}
+
+void
+_bfd_mips_elf_reloc_unshuffle (bfd *abfd, int r_type,
+ bfd_boolean jal_shuffle, bfd_byte *data)
+{
+ bfd_vma first, second, val;
+
+ if (!mips16_reloc_p (r_type) && !micromips_reloc_shuffle_p (r_type))
+ return;
+
+ /* Pick up the first and second halfwords of the instruction. */
+ first = bfd_get_16 (abfd, data);
+ second = bfd_get_16 (abfd, data + 2);
+ if (micromips_reloc_p (r_type) || (r_type == R_MIPS16_26 && !jal_shuffle))
+ val = first << 16 | second;
+ else if (r_type != R_MIPS16_26)
+ val = (((first & 0xf800) << 16) | ((second & 0xffe0) << 11)
+ | ((first & 0x1f) << 11) | (first & 0x7e0) | (second & 0x1f));
+ else
+ val = (((first & 0xfc00) << 16) | ((first & 0x3e0) << 11)
+ | ((first & 0x1f) << 21) | second);
+ bfd_put_32 (abfd, val, data);
+}
+
+void
+_bfd_mips_elf_reloc_shuffle (bfd *abfd, int r_type,
+ bfd_boolean jal_shuffle, bfd_byte *data)
+{
+ bfd_vma first, second, val;
+
+ if (!mips16_reloc_p (r_type) && !micromips_reloc_shuffle_p (r_type))
return;
val = bfd_get_32 (abfd, data);
- if (r_type == R_MIPS16_26)
+ if (micromips_reloc_p (r_type) || (r_type == R_MIPS16_26 && !jal_shuffle))
{
- if (jal_shuffle)
- {
- insn = val & 0xffff;
- extend = ((val >> 16) & 0xfc00) | ((val >> 11) & 0x3e0)
- | ((val >> 21) & 0x1f);
- }
- else
- {
- insn = val & 0xffff;
- extend = val >> 16;
- }
+ second = val & 0xffff;
+ first = val >> 16;
+ }
+ else if (r_type != R_MIPS16_26)
+ {
+ second = ((val >> 11) & 0xffe0) | (val & 0x1f);
+ first = ((val >> 16) & 0xf800) | ((val >> 11) & 0x1f) | (val & 0x7e0);
}
else
{
- insn = ((val >> 11) & 0xffe0) | (val & 0x1f);
- extend = ((val >> 16) & 0xf800) | ((val >> 11) & 0x1f) | (val & 0x7e0);
+ second = val & 0xffff;
+ first = ((val >> 16) & 0xfc00) | ((val >> 11) & 0x3e0)
+ | ((val >> 21) & 0x1f);
}
- bfd_put_16 (abfd, insn, data + 2);
- bfd_put_16 (abfd, extend, data);
+ bfd_put_16 (abfd, second, data + 2);
+ bfd_put_16 (abfd, first, data);
}
bfd_reloc_status_type
if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
return bfd_reloc_outofrange;
- _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE,
- location);
- vallo = bfd_get_32 (abfd, location);
- _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE,
+ _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE,
location);
+ vallo = bfd_get_32 (abfd, location);
+ _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE,
+ location);
while (mips_hi16_list != NULL)
{
hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MIPS_HI16, FALSE);
else if (hi->rel.howto->type == R_MIPS16_GOT16)
hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MIPS16_HI16, FALSE);
+ else if (hi->rel.howto->type == R_MICROMIPS_GOT16)
+ hi->rel.howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, R_MICROMIPS_HI16, FALSE);
/* VALLO is a signed 16-bit number. Bias it by 0x8000 so that any
carry or borrow will induce a change of +1 or -1 in the high part. */
val += reloc_entry->addend;
/* Add VAL to the relocation field. */
- _bfd_mips16_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE,
- location);
+ _bfd_mips_elf_reloc_unshuffle (abfd, reloc_entry->howto->type, FALSE,
+ location);
status = _bfd_relocate_contents (reloc_entry->howto, abfd, val,
location);
- _bfd_mips16_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE,
- location);
+ _bfd_mips_elf_reloc_shuffle (abfd, reloc_entry->howto->type, FALSE,
+ location);
if (status != bfd_reloc_ok)
return status;
bfd_boolean strip;
asection *sec, *output_section;
- if (h->root.root.type == bfd_link_hash_warning)
- h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
-
if (h->root.indx == -2)
strip = FALSE;
else if ((h->root.def_dynamic
dname = MIPS_ELF_REL_DYN_NAME (info);
dynobj = elf_hash_table (info)->dynobj;
- sreloc = bfd_get_section_by_name (dynobj, dname);
+ sreloc = bfd_get_linker_section (dynobj, dname);
if (sreloc == NULL && create_p)
{
- sreloc = bfd_make_section_with_flags (dynobj, dname,
- (SEC_ALLOC
- | SEC_LOAD
- | SEC_HAS_CONTENTS
- | SEC_IN_MEMORY
- | SEC_LINKER_CREATED
- | SEC_READONLY));
+ sreloc = bfd_make_section_anyway_with_flags (dynobj, dname,
+ (SEC_ALLOC
+ | SEC_LOAD
+ | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED
+ | SEC_READONLY));
if (sreloc == NULL
|| ! bfd_set_section_alignment (dynobj, sreloc,
MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
return sreloc;
}
-/* Returns the GOT section, if it hasn't been excluded. */
-
-static asection *
-mips_elf_got_section (struct bfd_link_info *info)
-{
- struct mips_elf_link_hash_table *htab;
-
- htab = mips_elf_hash_table (info);
- if (htab->sgot == NULL || (htab->sgot->flags & SEC_EXCLUDE) != 0)
- return NULL;
- return htab->sgot;
-}
-
/* Count the number of relocations needed for a TLS GOT entry, with
access types from TLS_TYPE, and symbol H (or a local symbol if H
is NULL). */
static void
mips_elf_output_dynamic_relocation (bfd *output_bfd,
asection *sreloc,
+ unsigned long reloc_index,
unsigned long indx,
int r_type,
bfd_vma offset)
(*get_elf_backend_data (output_bfd)->s->swap_reloc_out)
(output_bfd, &rel[0],
(sreloc->contents
- + sreloc->reloc_count * sizeof (Elf64_Mips_External_Rel)));
+ + reloc_index * sizeof (Elf64_Mips_External_Rel)));
}
else
bfd_elf32_swap_reloc_out
(output_bfd, &rel[0],
(sreloc->contents
- + sreloc->reloc_count * sizeof (Elf32_External_Rel)));
- ++sreloc->reloc_count;
+ + reloc_index * sizeof (Elf32_External_Rel)));
}
/* Initialize a set of TLS GOT entries for one symbol. */
struct mips_elf_link_hash_entry *h,
bfd_vma value)
{
+ struct mips_elf_link_hash_table *htab;
int indx;
asection *sreloc, *sgot;
bfd_vma offset, offset2;
bfd_boolean need_relocs = FALSE;
- sgot = mips_elf_got_section (info);
+ htab = mips_elf_hash_table (info);
+ if (htab == NULL)
+ return;
+
+ sgot = htab->sgot;
indx = 0;
if (h != NULL)
if (need_relocs)
{
mips_elf_output_dynamic_relocation
- (abfd, sreloc, indx,
+ (abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_DTPMOD64 : R_MIPS_TLS_DTPMOD32,
sgot->output_offset + sgot->output_section->vma + offset);
if (indx)
mips_elf_output_dynamic_relocation
- (abfd, sreloc, indx,
+ (abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_DTPREL64 : R_MIPS_TLS_DTPREL32,
sgot->output_offset + sgot->output_section->vma + offset2);
else
sgot->contents + offset);
mips_elf_output_dynamic_relocation
- (abfd, sreloc, indx,
+ (abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_TPREL64 : R_MIPS_TLS_TPREL32,
sgot->output_offset + sgot->output_section->vma + offset);
}
sgot->contents + got_offset);
else
mips_elf_output_dynamic_relocation
- (abfd, sreloc, indx,
+ (abfd, sreloc, sreloc->reloc_count++, indx,
ABI_64_P (abfd) ? R_MIPS_TLS_DTPMOD64 : R_MIPS_TLS_DTPMOD32,
sgot->output_offset + sgot->output_section->vma + got_offset);
}
int r_type, struct bfd_link_info *info,
struct mips_elf_link_hash_entry *h, bfd_vma symbol)
{
- BFD_ASSERT (r_type == R_MIPS_TLS_GOTTPREL || r_type == R_MIPS_TLS_GD
- || r_type == R_MIPS_TLS_LDM);
+ BFD_ASSERT (tls_gottprel_reloc_p (r_type)
+ || tls_gd_reloc_p (r_type)
+ || tls_ldm_reloc_p (r_type));
mips_elf_initialize_tls_slots (abfd, got_index, tls_type, info, h, symbol);
- if (r_type == R_MIPS_TLS_GOTTPREL)
+ if (tls_gottprel_reloc_p (r_type))
{
BFD_ASSERT (*tls_type & GOT_TLS_IE);
if (*tls_type & GOT_TLS_GD)
return got_index;
}
- if (r_type == R_MIPS_TLS_GD)
+ if (tls_gd_reloc_p (r_type))
{
BFD_ASSERT (*tls_type & GOT_TLS_GD);
return got_index;
}
- if (r_type == R_MIPS_TLS_LDM)
+ if (tls_ldm_reloc_p (r_type))
{
BFD_ASSERT (*tls_type & GOT_TLS_LDM);
return got_index;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
BFD_ASSERT (h->plt.offset != (bfd_vma) -1);
+ /* This function only works for VxWorks, because a non-VxWorks .got.plt
+ section starts with reserved entries. */
+ BFD_ASSERT (htab->is_vxworks);
+
/* Calculate the index of the symbol's PLT entry. */
plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
struct mips_got_entry *entry;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
entry = mips_elf_create_local_got_entry (abfd, info, ibfd, value,
r_symndx, h, r_type);
if (!entry)
int r_type, struct bfd_link_info *info)
{
struct mips_elf_link_hash_table *htab;
- bfd_vma index;
+ bfd_vma got_index;
struct mips_got_info *g, *gg;
long global_got_dynindx = 0;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
gg = g = htab->got_info;
if (g->bfd2got && ibfd)
{
+ h->root.u.def.section->output_offset
+ h->root.u.def.section->output_section->vma);
- index = mips_tls_got_index (abfd, hm->tls_got_offset, &hm->tls_type,
- r_type, info, hm, value);
+ got_index = mips_tls_got_index (abfd, hm->tls_got_offset, &hm->tls_type,
+ r_type, info, hm, value);
}
else
{
indices into the GOT. That makes it easy to calculate the GOT
offset. */
BFD_ASSERT (h->dynindx >= global_got_dynindx);
- index = ((h->dynindx - global_got_dynindx + g->local_gotno)
- * MIPS_ELF_GOT_SIZE (abfd));
+ got_index = ((h->dynindx - global_got_dynindx + g->local_gotno)
+ * MIPS_ELF_GOT_SIZE (abfd));
}
- BFD_ASSERT (index < htab->sgot->size);
+ BFD_ASSERT (got_index < htab->sgot->size);
- return index;
+ return got_index;
}
/* Find a GOT page entry that points to within 32KB of VALUE. These
mips_elf_got_page (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
bfd_vma value, bfd_vma *offsetp)
{
- bfd_vma page, index;
+ bfd_vma page, got_index;
struct mips_got_entry *entry;
page = (value + 0x8000) & ~(bfd_vma) 0xffff;
if (!entry)
return MINUS_ONE;
- index = entry->gotidx;
+ got_index = entry->gotidx;
if (offsetp)
*offsetp = value - entry->d.address;
- return index;
+ return got_index;
}
/* Find a local GOT entry for an R_MIPS*_GOT16 relocation against VALUE.
- EXTERNAL is true if the relocation was against a global symbol
- that has been forced local. */
+ EXTERNAL is true if the relocation was originally against a global
+ symbol that binds locally. */
static bfd_vma
mips_elf_got16_entry (bfd *abfd, bfd *ibfd, struct bfd_link_info *info,
static bfd_vma
mips_elf_got_offset_from_index (struct bfd_link_info *info, bfd *output_bfd,
- bfd *input_bfd, bfd_vma index)
+ bfd *input_bfd, bfd_vma got_index)
{
struct mips_elf_link_hash_table *htab;
asection *sgot;
bfd_vma gp;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
sgot = htab->sgot;
gp = _bfd_get_gp_value (output_bfd)
+ mips_elf_adjust_gp (output_bfd, htab->got_info, input_bfd);
- return sgot->output_section->vma + sgot->output_offset + index - gp;
+ return sgot->output_section->vma + sgot->output_offset + got_index - gp;
}
/* Create and return a local GOT entry for VALUE, which was calculated
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
entry.abfd = NULL;
entry.symndx = -1;
BFD_ASSERT (g != NULL);
}
- /* We might have a symbol, H, if it has been forced local. Use the
- global entry then. It doesn't matter whether an entry is local
- or global for TLS, since the dynamic linker does not
- automatically relocate TLS GOT entries. */
- BFD_ASSERT (h == NULL || h->root.forced_local);
+ /* This function shouldn't be called for symbols that live in the global
+ area of the GOT. */
+ BFD_ASSERT (h == NULL || h->global_got_area == GGA_NONE);
if (TLS_RELOC_P (r_type))
{
struct mips_got_entry *p;
entry.abfd = ibfd;
- if (r_type == R_MIPS_TLS_LDM)
+ if (tls_ldm_reloc_p (r_type))
{
entry.tls_type = GOT_TLS_LDM;
entry.symndx = 0;
{
Elf_Internal_Rela outrel;
asection *s;
- bfd_byte *loc;
+ bfd_byte *rloc;
bfd_vma got_address;
s = mips_elf_rel_dyn_section (info, FALSE);
+ htab->sgot->output_offset
+ entry.gotidx);
- loc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
+ rloc = s->contents + (s->reloc_count++ * sizeof (Elf32_External_Rela));
outrel.r_offset = got_address;
outrel.r_info = ELF32_R_INFO (STN_UNDEF, R_MIPS_32);
outrel.r_addend = value;
- bfd_elf32_swap_reloca_out (abfd, &outrel, loc);
+ bfd_elf32_swap_reloca_out (abfd, &outrel, rloc);
}
return *loc;
return TRUE;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
g = htab->got_info;
if (g == NULL)
return TRUE;
hsd.low = NULL;
- hsd.max_unref_got_dynindx =
- hsd.min_got_dynindx = elf_hash_table (info)->dynsymcount
- /* In the multi-got case, assigned_gotno of the master got_info
- indicate the number of entries that aren't referenced in the
- primary GOT, but that must have entries because there are
- dynamic relocations that reference it. Since they aren't
- referenced, we move them to the end of the GOT, so that they
- don't prevent other entries that are referenced from getting
- too large offsets. */
- - (g->next ? g->assigned_gotno : 0);
+ hsd.max_unref_got_dynindx
+ = hsd.min_got_dynindx
+ = (elf_hash_table (info)->dynsymcount - g->reloc_only_gotno);
hsd.max_non_got_dynindx = count_section_dynsyms (abfd, info) + 1;
mips_elf_link_hash_traverse (((struct mips_elf_link_hash_table *)
elf_hash_table (info)),
{
struct mips_elf_hash_sort_data *hsd = data;
- if (h->root.root.type == bfd_link_hash_warning)
- h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
-
/* Symbols without dynamic symbol table entries aren't interesting
at all. */
if (h->root.dynindx == -1)
/* If H is a symbol that needs a global GOT entry, but has a dynamic
symbol table index lower than any we've seen to date, record it for
- posterity. */
+ posterity. FOR_CALL is true if the caller is only interested in
+ using the GOT entry for calls. */
static bfd_boolean
mips_elf_record_global_got_symbol (struct elf_link_hash_entry *h,
bfd *abfd, struct bfd_link_info *info,
+ bfd_boolean for_call,
unsigned char tls_flag)
{
struct mips_elf_link_hash_table *htab;
struct mips_got_info *g;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
hmips = (struct mips_elf_link_hash_entry *) h;
+ if (!for_call)
+ hmips->got_only_for_calls = FALSE;
/* A global symbol in the GOT must also be in the dynamic symbol
table. */
struct mips_got_entry entry, **loc;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
g = htab->got_info;
BFD_ASSERT (g != NULL);
void **loc;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
g = htab->got_info;
BFD_ASSERT (g != NULL);
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
s = mips_elf_rel_dyn_section (info, FALSE);
BFD_ASSERT (s != NULL);
}
/* A mips_elf_link_hash_traverse callback for which DATA points
- to a mips_got_info. Count the number of type (3) entries. */
+ to the link_info structure. Count the number of type (3) entries
+ in the master GOT. */
static int
mips_elf_count_got_symbols (struct mips_elf_link_hash_entry *h, void *data)
{
+ struct bfd_link_info *info;
+ struct mips_elf_link_hash_table *htab;
struct mips_got_info *g;
- g = (struct mips_got_info *) data;
+ info = (struct bfd_link_info *) data;
+ htab = mips_elf_hash_table (info);
+ g = htab->got_info;
if (h->global_got_area != GGA_NONE)
{
- if (h->root.forced_local || h->root.dynindx == -1)
- {
- /* We no longer need this entry if it was only used for
- relocations; those relocations will be against the
- null or section symbol instead of H. */
+ /* Make a final decision about whether the symbol belongs in the
+ local or global GOT. Symbols that bind locally can (and in the
+ case of forced-local symbols, must) live in the local GOT.
+ Those that are aren't in the dynamic symbol table must also
+ live in the local GOT.
+
+ Note that the former condition does not always imply the
+ latter: symbols do not bind locally if they are completely
+ undefined. We'll report undefined symbols later if appropriate. */
+ if (h->root.dynindx == -1
+ || (h->got_only_for_calls
+ ? SYMBOL_CALLS_LOCAL (info, &h->root)
+ : SYMBOL_REFERENCES_LOCAL (info, &h->root)))
+ {
+ /* The symbol belongs in the local GOT. We no longer need this
+ entry if it was only used for relocations; those relocations
+ will be against the null or section symbol instead of H. */
if (h->global_got_area != GGA_RELOC_ONLY)
g->local_gotno++;
h->global_got_area = GGA_NONE;
}
+ else if (htab->is_vxworks
+ && h->got_only_for_calls
+ && h->root.plt.offset != MINUS_ONE)
+ /* On VxWorks, calls can refer directly to the .got.plt entry;
+ they don't need entries in the regular GOT. .got.plt entries
+ will be allocated by _bfd_mips_elf_adjust_dynamic_symbol. */
+ h->global_got_area = GGA_NONE;
else
- g->global_gotno++;
+ {
+ g->global_gotno++;
+ if (h->global_got_area == GGA_RELOC_ONLY)
+ g->reloc_only_gotno++;
+ }
}
return 1;
}
g->global_gotsym = NULL;
g->global_gotno = 0;
+ g->reloc_only_gotno = 0;
g->local_gotno = 0;
g->page_gotno = 0;
g->assigned_gotno = -1;
if (entry->tls_type & GOT_TLS_IE)
g->tls_gotno += 1;
}
- else if (entry->symndx >= 0 || entry->d.h->root.forced_local)
+ else if (entry->symndx >= 0 || entry->d.h->global_got_area == GGA_NONE)
++g->local_gotno;
else
++g->global_gotno;
if (estimate >= from->page_gotno + to->page_gotno)
estimate = from->page_gotno + to->page_gotno;
- /* And conservatively estimate how many local, global and TLS entries
+ /* And conservatively estimate how many local and TLS entries
would be needed. */
- estimate += (from->local_gotno
- + from->global_gotno
- + from->tls_gotno
- + to->local_gotno
- + to->global_gotno
- + to->tls_gotno);
+ estimate += from->local_gotno + to->local_gotno;
+ estimate += from->tls_gotno + to->tls_gotno;
+
+ /* If we're merging with the primary got, we will always have
+ the full set of global entries. Otherwise estimate those
+ conservatively as well. */
+ if (to == arg->primary)
+ estimate += arg->global_count;
+ else
+ estimate += from->global_gotno + to->global_gotno;
/* Bail out if the combined GOT might be too big. */
if (estimate > arg->max_count)
entry = (struct mips_got_entry *) *entryp;
info = (struct bfd_link_info *) data;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
if (entry->abfd != NULL
&& entry->symndx == -1
&& entry->d.h->needs_lazy_stub)
dynobj = elf_hash_table (info)->dynobj;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
g = htab->got_info;
g->bfd2got = htab_try_create (1, mips_elf_bfd2got_entry_hash,
mips_elf_bfd2got_entry_eq, NULL);
got_per_bfd_arg.primary = NULL;
got_per_bfd_arg.max_count = ((MIPS_ELF_GOT_MAX_SIZE (info)
/ MIPS_ELF_GOT_SIZE (abfd))
- - MIPS_RESERVED_GOTNO (info));
+ - htab->reserved_gotno);
got_per_bfd_arg.max_pages = pages;
/* The number of globals that will be included in the primary GOT.
See the calls to mips_elf_set_global_got_offset below for more
g->next->global_gotsym = NULL;
g->next->global_gotno = 0;
+ g->next->reloc_only_gotno = 0;
g->next->local_gotno = 0;
g->next->page_gotno = 0;
g->next->tls_gotno = 0;
/* Every symbol that is referenced in a dynamic relocation must be
present in the primary GOT, so arrange for them to appear after
those that are actually referenced. */
- gg->assigned_gotno = gg->global_gotno - g->global_gotno;
+ gg->reloc_only_gotno = gg->global_gotno - g->global_gotno;
g->global_gotno = gg->global_gotno;
set_got_offset_arg.g = NULL;
{
struct mips_got_info *gn;
- assign += MIPS_RESERVED_GOTNO (info);
+ assign += htab->reserved_gotno;
g->assigned_gotno = assign;
g->local_gotno += assign;
g->local_gotno += (pages < g->page_gotno ? pages : g->page_gotno);
BFD_ASSERT (g->assigned_gotno == g->next->local_gotno
+ g->next->global_gotno
+ g->next->tls_gotno
- + MIPS_RESERVED_GOTNO (info));
+ + htab->reserved_gotno);
}
}
return NULL;
}
-/* Return whether a relocation is against a local symbol. */
+/* Return whether an input relocation is against a local symbol. */
static bfd_boolean
mips_elf_local_relocation_p (bfd *input_bfd,
const Elf_Internal_Rela *relocation,
- asection **local_sections,
- bfd_boolean check_forced)
+ asection **local_sections)
{
unsigned long r_symndx;
Elf_Internal_Shdr *symtab_hdr;
- struct mips_elf_link_hash_entry *h;
size_t extsymoff;
r_symndx = ELF_R_SYM (input_bfd, relocation->r_info);
if (elf_bad_symtab (input_bfd) && local_sections[r_symndx] != NULL)
return TRUE;
- if (check_forced)
- {
- /* Look up the hash table to check whether the symbol
- was forced local. */
- h = (struct mips_elf_link_hash_entry *)
- elf_sym_hashes (input_bfd) [r_symndx - extsymoff];
- /* Find the real hash-table entry for this symbol. */
- while (h->root.root.type == bfd_link_hash_indirect
- || h->root.root.type == bfd_link_hash_warning)
- h = (struct mips_elf_link_hash_entry *) h->root.root.u.i.link;
- if (h->root.forced_local)
- return TRUE;
- }
-
return FALSE;
}
\f
flagword flags;
register asection *s;
- if (bfd_get_section_by_name (abfd, ".compact_rel") == NULL)
+ if (bfd_get_linker_section (abfd, ".compact_rel") == NULL)
{
flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED
| SEC_READONLY);
- s = bfd_make_section_with_flags (abfd, ".compact_rel", flags);
+ s = bfd_make_section_anyway_with_flags (abfd, ".compact_rel", flags);
if (s == NULL
|| ! bfd_set_section_alignment (abfd, s,
MIPS_ELF_LOG_FILE_ALIGN (abfd)))
/* Create the .got section to hold the global offset table. */
static bfd_boolean
-mips_elf_create_got_section (bfd *abfd, struct bfd_link_info *info,
- bfd_boolean maybe_exclude)
+mips_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
{
flagword flags;
register asection *s;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
/* This function may be called more than once. */
- s = htab->sgot;
- if (s)
- {
- if (! maybe_exclude)
- s->flags &= ~SEC_EXCLUDE;
- return TRUE;
- }
+ if (htab->sgot)
+ return TRUE;
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED);
- if (maybe_exclude)
- flags |= SEC_EXCLUDE;
-
/* We have to use an alignment of 2**4 here because this is hardcoded
in the function stub generation and in the linker script. */
- s = bfd_make_section_with_flags (abfd, ".got", flags);
+ s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
if (s == NULL
|| ! bfd_set_section_alignment (abfd, s, 4))
return FALSE;
return FALSE;
g->global_gotsym = NULL;
g->global_gotno = 0;
+ g->reloc_only_gotno = 0;
g->tls_gotno = 0;
- g->local_gotno = MIPS_RESERVED_GOTNO (info);
+ g->local_gotno = 0;
g->page_gotno = 0;
- g->assigned_gotno = MIPS_RESERVED_GOTNO (info);
+ g->assigned_gotno = 0;
g->bfd2got = NULL;
g->next = NULL;
g->tls_ldm_offset = MINUS_ONE;
mips_elf_section_data (s)->elf.this_hdr.sh_flags
|= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
- /* VxWorks also needs a .got.plt section. */
- if (htab->is_vxworks)
- {
- s = bfd_make_section_with_flags (abfd, ".got.plt",
- SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
- | SEC_IN_MEMORY | SEC_LINKER_CREATED);
- if (s == NULL || !bfd_set_section_alignment (abfd, s, 4))
- return FALSE;
+ /* We also need a .got.plt section when generating PLTs. */
+ s = bfd_make_section_anyway_with_flags (abfd, ".got.plt",
+ SEC_ALLOC | SEC_LOAD
+ | SEC_HAS_CONTENTS
+ | SEC_IN_MEMORY
+ | SEC_LINKER_CREATED);
+ if (s == NULL)
+ return FALSE;
+ htab->sgotplt = s;
- htab->sgotplt = s;
- }
return TRUE;
}
\f
&& (strcmp (h->root.root.string, "__GOTT_BASE__") == 0
|| strcmp (h->root.root.string, "__GOTT_INDEX__") == 0));
}
+
+/* Return TRUE if a relocation of type R_TYPE from INPUT_BFD might
+ require an la25 stub. See also mips_elf_local_pic_function_p,
+ which determines whether the destination function ever requires a
+ stub. */
+
+static bfd_boolean
+mips_elf_relocation_needs_la25_stub (bfd *input_bfd, int r_type,
+ bfd_boolean target_is_16_bit_code_p)
+{
+ /* We specifically ignore branches and jumps from EF_PIC objects,
+ where the onus is on the compiler or programmer to perform any
+ necessary initialization of $25. Sometimes such initialization
+ is unnecessary; for example, -mno-shared functions do not use
+ the incoming value of $25, and may therefore be called directly. */
+ if (PIC_OBJECT_P (input_bfd))
+ return FALSE;
+
+ switch (r_type)
+ {
+ case R_MIPS_26:
+ case R_MIPS_PC16:
+ case R_MICROMIPS_26_S1:
+ case R_MICROMIPS_PC7_S1:
+ case R_MICROMIPS_PC10_S1:
+ case R_MICROMIPS_PC16_S1:
+ case R_MICROMIPS_PC23_S2:
+ return TRUE;
+
+ case R_MIPS16_26:
+ return !target_is_16_bit_code_p;
+
+ default:
+ return FALSE;
+ }
+}
\f
/* Calculate the value produced by the RELOCATION (which comes from
the INPUT_BFD). The ADDEND is the addend to use for this
RELOCATION; RELOCATION->R_ADDEND is ignored.
The result of the relocation calculation is stored in VALUEP.
- REQUIRE_JALXP indicates whether or not the opcode used with this
- relocation must be JALX.
+ On exit, set *CROSS_MODE_JUMP_P to true if the relocation field
+ is a MIPS16 or microMIPS jump to standard MIPS code, or vice versa.
This function returns bfd_reloc_continue if the caller need take no
further action regarding this relocation, bfd_reloc_notsupported if
bfd_vma addend, reloc_howto_type *howto,
Elf_Internal_Sym *local_syms,
asection **local_sections, bfd_vma *valuep,
- const char **namep, bfd_boolean *require_jalxp,
+ const char **namep,
+ bfd_boolean *cross_mode_jump_p,
bfd_boolean save_addend)
{
/* The eventual value we will return. */
bfd_boolean overflowed_p;
/* TRUE if this relocation refers to a MIPS16 function. */
bfd_boolean target_is_16_bit_code_p = FALSE;
+ bfd_boolean target_is_micromips_code_p = FALSE;
struct mips_elf_link_hash_table *htab;
bfd *dynobj;
dynobj = elf_hash_table (info)->dynobj;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
/* Parse the relocation. */
r_symndx = ELF_R_SYM (input_bfd, relocation->r_info);
used in the array of hash table entries. */
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
local_p = mips_elf_local_relocation_p (input_bfd, relocation,
- local_sections, FALSE);
+ local_sections);
was_local_p = local_p;
if (! elf_bad_symtab (input_bfd))
extsymoff = symtab_hdr->sh_info;
addend += sec->output_section->vma + sec->output_offset;
}
- /* MIPS16 text labels should be treated as odd. */
- if (ELF_ST_IS_MIPS16 (sym->st_other))
+ /* MIPS16/microMIPS text labels should be treated as odd. */
+ if (ELF_ST_IS_COMPRESSED (sym->st_other))
++symbol;
/* Record the name of this symbol, for our caller. */
*namep = bfd_section_name (input_bfd, sec);
target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other);
+ target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other);
}
else
{
http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf */
symbol = 0;
}
+ else if ((*info->callbacks->undefined_symbol)
+ (info, h->root.root.root.string, input_bfd,
+ input_section, relocation->r_offset,
+ (info->unresolved_syms_in_objects == RM_GENERATE_ERROR)
+ || ELF_ST_VISIBILITY (h->root.other)))
+ {
+ return bfd_reloc_undefined;
+ }
else
{
- if (! ((*info->callbacks->undefined_symbol)
- (info, h->root.root.root.string, input_bfd,
- input_section, relocation->r_offset,
- (info->unresolved_syms_in_objects == RM_GENERATE_ERROR)
- || ELF_ST_VISIBILITY (h->root.other))))
- return bfd_reloc_undefined;
- symbol = 0;
+ return bfd_reloc_notsupported;
}
target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other);
+ /* If the output section is the PLT section,
+ then the target is not microMIPS. */
+ target_is_micromips_code_p = (htab->splt != sec
+ && ELF_ST_IS_MICROMIPS (h->root.other));
}
/* If this is a reference to a 16-bit function with a stub, we need
have already noticed that we were going to need the
stub. */
if (local_p)
- sec = elf_tdata (input_bfd)->local_stubs[r_symndx];
+ {
+ sec = elf_tdata (input_bfd)->local_stubs[r_symndx];
+ value = 0;
+ }
else
{
BFD_ASSERT (h->need_fn_stub);
- sec = h->fn_stub;
+ if (h->la25_stub)
+ {
+ /* If a LA25 header for the stub itself exists, point to the
+ prepended LUI/ADDIU sequence. */
+ sec = h->la25_stub->stub_section;
+ value = h->la25_stub->offset;
+ }
+ else
+ {
+ sec = h->fn_stub;
+ value = 0;
+ }
}
- symbol = sec->output_section->vma + sec->output_offset;
+ symbol = sec->output_section->vma + sec->output_offset + value;
/* The target is 16-bit, but the stub isn't. */
target_is_16_bit_code_p = FALSE;
}
BFD_ASSERT (sec->size > 0);
symbol = sec->output_section->vma + sec->output_offset;
}
+ /* If this is a direct call to a PIC function, redirect to the
+ non-PIC stub. */
+ else if (h != NULL && h->la25_stub
+ && mips_elf_relocation_needs_la25_stub (input_bfd, r_type,
+ target_is_16_bit_code_p))
+ symbol = (h->la25_stub->stub_section->output_section->vma
+ + h->la25_stub->stub_section->output_offset
+ + h->la25_stub->offset);
+
+ /* Make sure MIPS16 and microMIPS are not used together. */
+ if ((r_type == R_MIPS16_26 && target_is_micromips_code_p)
+ || (micromips_branch_reloc_p (r_type) && target_is_16_bit_code_p))
+ {
+ (*_bfd_error_handler)
+ (_("MIPS16 and microMIPS functions cannot call each other"));
+ return bfd_reloc_notsupported;
+ }
/* Calls from 16-bit code to 32-bit code and vice versa require the
- special jalx instruction. */
- *require_jalxp = (!info->relocatable
- && (((r_type == R_MIPS16_26) && !target_is_16_bit_code_p)
- || ((r_type == R_MIPS_26) && target_is_16_bit_code_p)));
-
- local_p = mips_elf_local_relocation_p (input_bfd, relocation,
- local_sections, TRUE);
+ mode change. However, we can ignore calls to undefined weak symbols,
+ which should never be executed at runtime. This exception is important
+ because the assembly writer may have "known" that any definition of the
+ symbol would be 16-bit code, and that direct jumps were therefore
+ acceptable. */
+ *cross_mode_jump_p = (!info->relocatable
+ && !(h && h->root.root.type == bfd_link_hash_undefweak)
+ && ((r_type == R_MIPS16_26 && !target_is_16_bit_code_p)
+ || (r_type == R_MICROMIPS_26_S1
+ && !target_is_micromips_code_p)
+ || ((r_type == R_MIPS_26 || r_type == R_MIPS_JALR)
+ && (target_is_16_bit_code_p
+ || target_is_micromips_code_p))));
+
+ local_p = (h == NULL
+ || (h->got_only_for_calls
+ ? SYMBOL_CALLS_LOCAL (info, &h->root)
+ : SYMBOL_REFERENCES_LOCAL (info, &h->root)));
gp0 = _bfd_get_gp_value (input_bfd);
gp = _bfd_get_gp_value (abfd);
- if (dynobj)
+ if (htab->got_info)
gp += mips_elf_adjust_gp (abfd, htab->got_info, input_bfd);
if (gnu_local_gp_p)
symbol = gp;
- /* If we haven't already determined the GOT offset, oand we're going
+ /* Global R_MIPS_GOT_PAGE/R_MICROMIPS_GOT_PAGE relocations are equivalent
+ to R_MIPS_GOT_DISP/R_MICROMIPS_GOT_DISP. The addend is applied by the
+ corresponding R_MIPS_GOT_OFST/R_MICROMIPS_GOT_OFST. */
+ if (got_page_reloc_p (r_type) && !local_p)
+ {
+ r_type = (micromips_reloc_p (r_type)
+ ? R_MICROMIPS_GOT_DISP : R_MIPS_GOT_DISP);
+ addend = 0;
+ }
+
+ /* If we haven't already determined the GOT offset, and we're going
to need it, get it now. */
switch (r_type)
{
- case R_MIPS_GOT_PAGE:
- case R_MIPS_GOT_OFST:
- /* We need to decay to GOT_DISP/addend if the symbol doesn't
- bind locally. */
- local_p = local_p || _bfd_elf_symbol_refs_local_p (&h->root, info, 1);
- if (local_p || r_type == R_MIPS_GOT_OFST)
- break;
- /* Fall through. */
-
case R_MIPS16_CALL16:
case R_MIPS16_GOT16:
case R_MIPS_CALL16:
case R_MIPS_CALL_HI16:
case R_MIPS_GOT_LO16:
case R_MIPS_CALL_LO16:
+ case R_MICROMIPS_CALL16:
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_GOT_DISP:
+ case R_MICROMIPS_GOT_HI16:
+ case R_MICROMIPS_CALL_HI16:
+ case R_MICROMIPS_GOT_LO16:
+ case R_MICROMIPS_CALL_LO16:
case R_MIPS_TLS_GD:
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_LDM:
+ case R_MIPS16_TLS_GD:
+ case R_MIPS16_TLS_GOTTPREL:
+ case R_MIPS16_TLS_LDM:
+ case R_MICROMIPS_TLS_GD:
+ case R_MICROMIPS_TLS_GOTTPREL:
+ case R_MICROMIPS_TLS_LDM:
/* Find the index into the GOT where this value is located. */
- if (r_type == R_MIPS_TLS_LDM)
+ if (tls_ldm_reloc_p (r_type))
{
g = mips_elf_local_got_index (abfd, input_bfd, info,
0, 0, NULL, r_type);
/* On VxWorks, CALL relocations should refer to the .got.plt
entry, which is initialized to point at the PLT stub. */
if (htab->is_vxworks
- && (r_type == R_MIPS_CALL_HI16
- || r_type == R_MIPS_CALL_LO16
+ && (call_hi16_reloc_p (r_type)
+ || call_lo16_reloc_p (r_type)
|| call16_reloc_p (r_type)))
{
BFD_ASSERT (addend == 0);
}
else
{
- /* GOT_PAGE may take a non-zero addend, that is ignored in a
- GOT_PAGE relocation that decays to GOT_DISP because the
- symbol turns out to be global. The addend is then added
- as GOT_OFST. */
- BFD_ASSERT (addend == 0 || r_type == R_MIPS_GOT_PAGE);
+ BFD_ASSERT (addend == 0);
g = mips_elf_global_got_index (dynobj, input_bfd,
&h->root, r_type, info);
if (h->tls_type == GOT_NORMAL
- && (! elf_hash_table(info)->dynamic_sections_created
- || (info->shared
- && (info->symbolic || h->root.forced_local)
- && h->root.def_regular)))
- /* This is a static link or a -Bsymbolic link. The
- symbol is defined locally, or was forced to be local.
- We must initialize this entry in the GOT. */
+ && !elf_hash_table (info)->dynamic_sections_created)
+ /* This is a static link. We must initialize the GOT entry. */
MIPS_ELF_PUT_WORD (dynobj, symbol, htab->sgot->contents + g);
}
}
case R_MIPS_REL32:
case R_MIPS_64:
if ((info->shared
- || (!htab->is_vxworks
- && htab->root.dynamic_sections_created
+ || (htab->root.dynamic_sections_created
&& h != NULL
&& h->root.def_dynamic
- && !h->root.def_regular))
- && r_symndx != 0
+ && !h->root.def_regular
+ && !h->has_static_relocs))
+ && r_symndx != STN_UNDEF
&& (h == NULL
|| h->root.root.type != bfd_link_hash_undefweak
|| ELF_ST_VISIBILITY (h->root.other) == STV_DEFAULT)
&& (input_section->flags & SEC_ALLOC) != 0)
{
- /* If we're creating a shared library, or this relocation is
- against a symbol in a shared library, then we can't know
+ /* If we're creating a shared library, then we can't know
where the symbol will end up. So, we create a relocation
record in the output, and leave the job up to the dynamic
- linker.
-
- In VxWorks executables, references to external symbols
- are handled using copy relocs or PLT stubs, so there's
- no need to add a dynamic relocation here. */
+ linker. We must do the same for executable references to
+ shared library symbols, unless we've decided to use copy
+ relocs or PLTs instead. */
value = addend;
if (!mips_elf_create_dynamic_relocation (abfd,
info,
mips_elf_perform_relocation. So, we just fall through to the
R_MIPS_26 case here. */
case R_MIPS_26:
- if (local_p)
- value = ((addend | ((p + 4) & 0xf0000000)) + symbol) >> 2;
- else
- {
- value = (_bfd_mips_elf_sign_extend (addend, 28) + symbol) >> 2;
- if (h->root.root.type != bfd_link_hash_undefweak)
- overflowed_p = (value >> 26) != ((p + 4) >> 28);
- }
- value &= howto->dst_mask;
+ case R_MICROMIPS_26_S1:
+ {
+ unsigned int shift;
+
+ /* Make sure the target of JALX is word-aligned. Bit 0 must be
+ the correct ISA mode selector and bit 1 must be 0. */
+ if (*cross_mode_jump_p && (symbol & 3) != (r_type == R_MIPS_26))
+ return bfd_reloc_outofrange;
+
+ /* Shift is 2, unusually, for microMIPS JALX. */
+ shift = (!*cross_mode_jump_p && r_type == R_MICROMIPS_26_S1) ? 1 : 2;
+
+ if (was_local_p)
+ value = addend | ((p + 4) & (0xfc000000 << shift));
+ else
+ value = _bfd_mips_elf_sign_extend (addend, 26 + shift);
+ value = (value + symbol) >> shift;
+ if (!was_local_p && h->root.root.type != bfd_link_hash_undefweak)
+ overflowed_p = (value >> 26) != ((p + 4) >> (26 + shift));
+ value &= howto->dst_mask;
+ }
break;
case R_MIPS_TLS_DTPREL_HI16:
+ case R_MIPS16_TLS_DTPREL_HI16:
+ case R_MICROMIPS_TLS_DTPREL_HI16:
value = (mips_elf_high (addend + symbol - dtprel_base (info))
& howto->dst_mask);
break;
case R_MIPS_TLS_DTPREL_LO16:
case R_MIPS_TLS_DTPREL32:
case R_MIPS_TLS_DTPREL64:
+ case R_MIPS16_TLS_DTPREL_LO16:
+ case R_MICROMIPS_TLS_DTPREL_LO16:
value = (symbol + addend - dtprel_base (info)) & howto->dst_mask;
break;
case R_MIPS_TLS_TPREL_HI16:
+ case R_MIPS16_TLS_TPREL_HI16:
+ case R_MICROMIPS_TLS_TPREL_HI16:
value = (mips_elf_high (addend + symbol - tprel_base (info))
& howto->dst_mask);
break;
case R_MIPS_TLS_TPREL_LO16:
+ case R_MIPS_TLS_TPREL32:
+ case R_MIPS_TLS_TPREL64:
+ case R_MIPS16_TLS_TPREL_LO16:
+ case R_MICROMIPS_TLS_TPREL_LO16:
value = (symbol + addend - tprel_base (info)) & howto->dst_mask;
break;
case R_MIPS_HI16:
case R_MIPS16_HI16:
+ case R_MICROMIPS_HI16:
if (!gp_disp_p)
{
value = mips_elf_high (addend + symbol);
12: addu $v0,$v1
14: move $gp,$v0
So the offsets of hi and lo relocs are the same, but the
- $pc is four higher than $t9 would be, so reduce
- both reloc addends by 4. */
+ base $pc is that used by the ADDIUPC instruction at $t9 + 4.
+ ADDIUPC clears the low two bits of the instruction address,
+ so the base is ($t9 + 4) & ~3. */
if (r_type == R_MIPS16_HI16)
- value = mips_elf_high (addend + gp - p - 4);
+ value = mips_elf_high (addend + gp - ((p + 4) & ~(bfd_vma) 0x3));
+ /* The microMIPS .cpload sequence uses the same assembly
+ instructions as the traditional psABI version, but the
+ incoming $t9 has the low bit set. */
+ else if (r_type == R_MICROMIPS_HI16)
+ value = mips_elf_high (addend + gp - p - 1);
else
value = mips_elf_high (addend + gp - p);
overflowed_p = mips_elf_overflow_p (value, 16);
case R_MIPS_LO16:
case R_MIPS16_LO16:
+ case R_MICROMIPS_LO16:
+ case R_MICROMIPS_HI0_LO16:
if (!gp_disp_p)
value = (symbol + addend) & howto->dst_mask;
else
/* See the comment for R_MIPS16_HI16 above for the reason
for this conditional. */
if (r_type == R_MIPS16_LO16)
- value = addend + gp - p;
+ value = addend + gp - (p & ~(bfd_vma) 0x3);
+ else if (r_type == R_MICROMIPS_LO16
+ || r_type == R_MICROMIPS_HI0_LO16)
+ value = addend + gp - p + 3;
else
value = addend + gp - p + 4;
/* The MIPS ABI requires checking the R_MIPS_LO16 relocation
break;
case R_MIPS_LITERAL:
+ case R_MICROMIPS_LITERAL:
/* Because we don't merge literal sections, we can handle this
just like R_MIPS_GPREL16. In the long run, we should merge
shared literals, and then we will need to additional work
order. We don't need to do anything special here; the
differences are handled in mips_elf_perform_relocation. */
case R_MIPS_GPREL16:
+ case R_MICROMIPS_GPREL7_S2:
+ case R_MICROMIPS_GPREL16:
/* Only sign-extend the addend if it was extracted from the
instruction. If the addend was separate, leave it alone,
otherwise we may lose significant bits. */
case R_MIPS16_CALL16:
case R_MIPS_GOT16:
case R_MIPS_CALL16:
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_CALL16:
/* VxWorks does not have separate local and global semantics for
R_MIPS*_GOT16; every relocation evaluates to "G". */
if (!htab->is_vxworks && local_p)
{
- bfd_boolean forced;
-
- forced = ! mips_elf_local_relocation_p (input_bfd, relocation,
- local_sections, FALSE);
value = mips_elf_got16_entry (abfd, input_bfd, info,
- symbol + addend, forced);
+ symbol + addend, !was_local_p);
if (value == MINUS_ONE)
return bfd_reloc_outofrange;
value
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_LDM:
case R_MIPS_GOT_DISP:
- got_disp:
+ case R_MIPS16_TLS_GD:
+ case R_MIPS16_TLS_GOTTPREL:
+ case R_MIPS16_TLS_LDM:
+ case R_MICROMIPS_TLS_GD:
+ case R_MICROMIPS_TLS_GOTTPREL:
+ case R_MICROMIPS_TLS_LDM:
+ case R_MICROMIPS_GOT_DISP:
value = g;
overflowed_p = mips_elf_overflow_p (value, 16);
break;
value &= howto->dst_mask;
break;
+ case R_MICROMIPS_PC7_S1:
+ value = symbol + _bfd_mips_elf_sign_extend (addend, 8) - p;
+ overflowed_p = mips_elf_overflow_p (value, 8);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MICROMIPS_PC10_S1:
+ value = symbol + _bfd_mips_elf_sign_extend (addend, 11) - p;
+ overflowed_p = mips_elf_overflow_p (value, 11);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MICROMIPS_PC16_S1:
+ value = symbol + _bfd_mips_elf_sign_extend (addend, 17) - p;
+ overflowed_p = mips_elf_overflow_p (value, 17);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
+ case R_MICROMIPS_PC23_S2:
+ value = symbol + _bfd_mips_elf_sign_extend (addend, 25) - ((p | 3) ^ 3);
+ overflowed_p = mips_elf_overflow_p (value, 25);
+ value >>= howto->rightshift;
+ value &= howto->dst_mask;
+ break;
+
case R_MIPS_GOT_HI16:
case R_MIPS_CALL_HI16:
+ case R_MICROMIPS_GOT_HI16:
+ case R_MICROMIPS_CALL_HI16:
/* We're allowed to handle these two relocations identically.
The dynamic linker is allowed to handle the CALL relocations
differently by creating a lazy evaluation stub. */
case R_MIPS_GOT_LO16:
case R_MIPS_CALL_LO16:
+ case R_MICROMIPS_GOT_LO16:
+ case R_MICROMIPS_CALL_LO16:
value = g & howto->dst_mask;
break;
case R_MIPS_GOT_PAGE:
- /* GOT_PAGE relocations that reference non-local symbols decay
- to GOT_DISP. The corresponding GOT_OFST relocation decays to
- 0. */
- if (! local_p)
- goto got_disp;
+ case R_MICROMIPS_GOT_PAGE:
value = mips_elf_got_page (abfd, input_bfd, info, symbol + addend, NULL);
if (value == MINUS_ONE)
return bfd_reloc_outofrange;
break;
case R_MIPS_GOT_OFST:
+ case R_MICROMIPS_GOT_OFST:
if (local_p)
mips_elf_got_page (abfd, input_bfd, info, symbol + addend, &value);
else
break;
case R_MIPS_SUB:
+ case R_MICROMIPS_SUB:
value = symbol - addend;
value &= howto->dst_mask;
break;
case R_MIPS_HIGHER:
+ case R_MICROMIPS_HIGHER:
value = mips_elf_higher (addend + symbol);
value &= howto->dst_mask;
break;
case R_MIPS_HIGHEST:
+ case R_MICROMIPS_HIGHEST:
value = mips_elf_highest (addend + symbol);
value &= howto->dst_mask;
break;
case R_MIPS_SCN_DISP:
+ case R_MICROMIPS_SCN_DISP:
value = symbol + addend - sec->output_offset;
value &= howto->dst_mask;
break;
case R_MIPS_JALR:
+ case R_MICROMIPS_JALR:
/* This relocation is only a hint. In some cases, we optimize
it into a bal instruction. But we don't try to optimize
- branches to the PLT; that will wind up wasting time. */
- if (h != NULL && h->root.plt.offset != (bfd_vma) -1)
+ when the symbol does not resolve locally. */
+ if (h != NULL && !SYMBOL_CALLS_LOCAL (info, &h->root))
return bfd_reloc_continue;
value = symbol + addend;
break;
/* It has been determined that the result of the RELOCATION is the
VALUE. Use HOWTO to place VALUE into the output file at the
appropriate position. The SECTION is the section to which the
- relocation applies. If REQUIRE_JALX is TRUE, then the opcode used
- for the relocation must be either JAL or JALX, and it is
- unconditionally converted to JALX.
+ relocation applies.
+ CROSS_MODE_JUMP_P is true if the relocation field
+ is a MIPS16 or microMIPS jump to standard MIPS code, or vice versa.
Returns FALSE if anything goes wrong. */
const Elf_Internal_Rela *relocation,
bfd_vma value, bfd *input_bfd,
asection *input_section, bfd_byte *contents,
- bfd_boolean require_jalx)
+ bfd_boolean cross_mode_jump_p)
{
bfd_vma x;
bfd_byte *location;
/* Figure out where the relocation is occurring. */
location = contents + relocation->r_offset;
- _bfd_mips16_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location);
+ _bfd_mips_elf_reloc_unshuffle (input_bfd, r_type, FALSE, location);
/* Obtain the current value. */
x = mips_elf_obtain_contents (howto, relocation, input_bfd, contents);
x |= (value & howto->dst_mask);
/* If required, turn JAL into JALX. */
- if (require_jalx)
+ if (cross_mode_jump_p && jal_reloc_p (r_type))
{
bfd_boolean ok;
bfd_vma opcode = x >> 26;
ok = ((opcode == 0x6) || (opcode == 0x7));
jalx_opcode = 0x7;
}
+ else if (r_type == R_MICROMIPS_26_S1)
+ {
+ ok = ((opcode == 0x3d) || (opcode == 0x3c));
+ jalx_opcode = 0x3c;
+ }
else
{
ok = ((opcode == 0x3) || (opcode == 0x1d));
jalx_opcode = 0x1d;
}
- /* If the opcode is not JAL or JALX, there's a problem. */
+ /* If the opcode is not JAL or JALX, there's a problem. We cannot
+ convert J or JALS to JALX. */
if (!ok)
{
(*_bfd_error_handler)
- (_("%B: %A+0x%lx: jump to stub routine which is not jal"),
+ (_("%B: %A+0x%lx: Unsupported jump between ISA modes; consider recompiling with interlinking enabled."),
input_bfd,
input_section,
(unsigned long) relocation->r_offset);
x = (x & ~(0x3f << 26)) | (jalx_opcode << 26);
}
- /* On the RM9000, bal is faster than jal, because bal uses branch
- prediction hardware. If we are linking for the RM9000, and we
- see jal, and bal fits, use it instead. Note that this
- transformation should be safe for all architectures. */
- if (bfd_get_mach (input_bfd) == bfd_mach_mips9000
- && !info->relocatable
- && !require_jalx
- && ((r_type == R_MIPS_26 && (x >> 26) == 0x3) /* jal addr */
- || (r_type == R_MIPS_JALR && x == 0x0320f809))) /* jalr t9 */
+ /* Try converting JAL to BAL and J(AL)R to B(AL), if the target is in
+ range. */
+ if (!info->relocatable
+ && !cross_mode_jump_p
+ && ((JAL_TO_BAL_P (input_bfd)
+ && r_type == R_MIPS_26
+ && (x >> 26) == 0x3) /* jal addr */
+ || (JALR_TO_BAL_P (input_bfd)
+ && r_type == R_MIPS_JALR
+ && x == 0x0320f809) /* jalr t9 */
+ || (JR_TO_B_P (input_bfd)
+ && r_type == R_MIPS_JALR
+ && x == 0x03200008))) /* jr t9 */
{
bfd_vma addr;
bfd_vma dest;
dest = value;
off = dest - addr;
if (off <= 0x1ffff && off >= -0x20000)
- x = 0x04110000 | (((bfd_vma) off >> 2) & 0xffff); /* bal addr */
+ {
+ if (x == 0x03200008) /* jr t9 */
+ x = 0x10000000 | (((bfd_vma) off >> 2) & 0xffff); /* b addr */
+ else
+ x = 0x04110000 | (((bfd_vma) off >> 2) & 0xffff); /* bal addr */
+ }
}
/* Put the value into the output. */
bfd_put (8 * bfd_get_reloc_size (howto), input_bfd, x, location);
- _bfd_mips16_elf_reloc_shuffle(input_bfd, r_type, !info->relocatable,
- location);
+ _bfd_mips_elf_reloc_shuffle (input_bfd, r_type, !info->relocatable,
+ location);
return TRUE;
}
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
r_type = ELF_R_TYPE (output_bfd, rel->r_info);
dynobj = elf_hash_table (info)->dynobj;
sreloc = mips_elf_rel_dyn_section (info, FALSE);
/* We must now calculate the dynamic symbol table index to use
in the relocation. */
- if (h != NULL
- && (!h->root.def_regular
- || (info->shared && !info->symbolic && !h->root.forced_local)))
+ if (h != NULL && ! SYMBOL_REFERENCES_LOCAL (info, &h->root))
{
+ BFD_ASSERT (htab->is_vxworks || h->global_got_area != GGA_NONE);
indx = h->root.dynindx;
if (SGI_COMPAT (output_bfd))
defined_p = h->root.def_regular;
/* On IRIX5, make an entry of compact relocation info. */
if (IRIX_COMPAT (output_bfd) == ict_irix5)
{
- asection *scpt = bfd_get_section_by_name (dynobj, ".compact_rel");
+ asection *scpt = bfd_get_linker_section (dynobj, ".compact_rel");
bfd_byte *cr;
if (scpt)
case E_MIPS_MACH_LS2F:
return bfd_mach_mips_loongson_2f;
+ case E_MIPS_MACH_LS3A:
+ return bfd_mach_mips_loongson_3a;
+
+ case E_MIPS_MACH_OCTEON2:
+ return bfd_mach_mips_octeon2;
+
case E_MIPS_MACH_OCTEON:
return bfd_mach_mips_octeon;
+ case E_MIPS_MACH_XLR:
+ return bfd_mach_mips_xlr;
+
default:
switch (flags & EF_MIPS_ARCH)
{
{
asection *section = bfd_get_section_by_name (abfd, ".text");
- BFD_ASSERT (SGI_COMPAT (abfd));
if (section != NULL)
{
asym->section = section;
{
asection *section = bfd_get_section_by_name (abfd, ".data");
- BFD_ASSERT (SGI_COMPAT (abfd));
if (section != NULL)
{
asym->section = section;
break;
}
- /* If this is an odd-valued function symbol, assume it's a MIPS16 one. */
+ /* If this is an odd-valued function symbol, assume it's a MIPS16
+ or microMIPS one. */
if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_FUNC
&& (asym->value & 1) != 0)
{
asym->value--;
- elfsym->internal_elf_sym.st_other
- = ELF_ST_SET_MIPS16 (elfsym->internal_elf_sym.st_other);
+ if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS)
+ elfsym->internal_elf_sym.st_other
+ = ELF_ST_SET_MICROMIPS (elfsym->internal_elf_sym.st_other);
+ else
+ elfsym->internal_elf_sym.st_other
+ = ELF_ST_SET_MIPS16 (elfsym->internal_elf_sym.st_other);
}
}
\f
{
const char *name = bfd_get_section_name (abfd, hdr->bfd_section);
+ /* .sbss is not handled specially here because the GNU/Linux
+ prelinker can convert .sbss from NOBITS to PROGBITS and
+ changing it back to NOBITS breaks the binary. The entry in
+ _bfd_mips_elf_special_sections will ensure the correct flags
+ are set on .sbss if BFD creates it without reading it from an
+ input file, and without special handling here the flags set
+ on it in an input file will be followed. */
if (strcmp (name, ".sdata") == 0
|| strcmp (name, ".lit8") == 0
|| strcmp (name, ".lit4") == 0)
hdr->sh_flags |= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
hdr->sh_type = SHT_PROGBITS;
}
- else if (strcmp (name, ".sbss") == 0)
- {
- hdr->sh_flags |= SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL;
- hdr->sh_type = SHT_NOBITS;
- }
else if (strcmp (name, ".srdata") == 0)
{
hdr->sh_flags |= SHF_ALLOC | SHF_MIPS_GPREL;
return FALSE;
mips_elf_hash_table (info)->use_rld_obj_head = TRUE;
+ mips_elf_hash_table (info)->rld_symbol = h;
}
/* If this is a mips16 text symbol, add 1 to the value to make it
odd. This will cause something like .word SYM to come up with
the right value when it is loaded into the PC. */
- if (ELF_ST_IS_MIPS16 (sym->st_other))
+ if (ELF_ST_IS_COMPRESSED (sym->st_other))
++*valp;
return TRUE;
symbol. We mark symbols as small common if appropriate. This is
also where we undo the increment of the value for a mips16 symbol. */
-bfd_boolean
+int
_bfd_mips_elf_link_output_symbol_hook
(struct bfd_link_info *info ATTRIBUTE_UNUSED,
const char *name ATTRIBUTE_UNUSED, Elf_Internal_Sym *sym,
&& strcmp (input_sec->name, ".scommon") == 0)
sym->st_shndx = SHN_MIPS_SCOMMON;
- if (ELF_ST_IS_MIPS16 (sym->st_other))
+ if (ELF_ST_IS_COMPRESSED (sym->st_other))
sym->st_value &= ~1;
- return TRUE;
+ return 1;
}
\f
/* Functions for the dynamic linker. */
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED | SEC_READONLY);
EABI doesn't. */
if (!htab->is_vxworks)
{
- s = bfd_get_section_by_name (abfd, ".dynamic");
+ s = bfd_get_linker_section (abfd, ".dynamic");
if (s != NULL)
{
if (! bfd_set_section_flags (abfd, s, flags))
}
/* We need to create .got section. */
- if (! mips_elf_create_got_section (abfd, info, FALSE))
+ if (!mips_elf_create_got_section (abfd, info))
return FALSE;
if (! mips_elf_rel_dyn_section (info, TRUE))
return FALSE;
/* Create .stub section. */
- s = bfd_make_section_with_flags (abfd,
- MIPS_ELF_STUB_SECTION_NAME (abfd),
- flags | SEC_CODE);
+ s = bfd_make_section_anyway_with_flags (abfd,
+ MIPS_ELF_STUB_SECTION_NAME (abfd),
+ flags | SEC_CODE);
if (s == NULL
|| ! bfd_set_section_alignment (abfd, s,
MIPS_ELF_LOG_FILE_ALIGN (abfd)))
if ((IRIX_COMPAT (abfd) == ict_irix5 || IRIX_COMPAT (abfd) == ict_none)
&& !info->shared
- && bfd_get_section_by_name (abfd, ".rld_map") == NULL)
+ && bfd_get_linker_section (abfd, ".rld_map") == NULL)
{
- s = bfd_make_section_with_flags (abfd, ".rld_map",
- flags &~ (flagword) SEC_READONLY);
+ s = bfd_make_section_anyway_with_flags (abfd, ".rld_map",
+ flags &~ (flagword) SEC_READONLY);
if (s == NULL
|| ! bfd_set_section_alignment (abfd, s,
MIPS_ELF_LOG_FILE_ALIGN (abfd)))
}
/* Change alignments of some sections. */
- s = bfd_get_section_by_name (abfd, ".hash");
+ s = bfd_get_linker_section (abfd, ".hash");
if (s != NULL)
bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
- s = bfd_get_section_by_name (abfd, ".dynsym");
+ s = bfd_get_linker_section (abfd, ".dynsym");
if (s != NULL)
bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
- s = bfd_get_section_by_name (abfd, ".dynstr");
+ s = bfd_get_linker_section (abfd, ".dynstr");
if (s != NULL)
bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
+ /* ??? */
s = bfd_get_section_by_name (abfd, ".reginfo");
if (s != NULL)
bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
- s = bfd_get_section_by_name (abfd, ".dynamic");
+ s = bfd_get_linker_section (abfd, ".dynamic");
if (s != NULL)
bfd_set_section_alignment (abfd, s, MIPS_ELF_LOG_FILE_ALIGN (abfd));
}
and is filled in by the rtld to contain a pointer to
the _r_debug structure. Its symbol value will be set in
_bfd_mips_elf_finish_dynamic_symbol. */
- s = bfd_get_section_by_name (abfd, ".rld_map");
+ s = bfd_get_linker_section (abfd, ".rld_map");
BFD_ASSERT (s != NULL);
name = SGI_COMPAT (abfd) ? "__rld_map" : "__RLD_MAP";
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return FALSE;
+ mips_elf_hash_table (info)->rld_symbol = h;
}
}
+ /* Create the .plt, .rel(a).plt, .dynbss and .rel(a).bss sections.
+ Also create the _PROCEDURE_LINKAGE_TABLE symbol. */
+ if (!_bfd_elf_create_dynamic_sections (abfd, info))
+ return FALSE;
+
+ /* Cache the sections created above. */
+ htab->splt = bfd_get_linker_section (abfd, ".plt");
+ htab->sdynbss = bfd_get_linker_section (abfd, ".dynbss");
if (htab->is_vxworks)
{
- /* Create the .plt, .rela.plt, .dynbss and .rela.bss sections.
- Also create the _PROCEDURE_LINKAGE_TABLE symbol. */
- if (!_bfd_elf_create_dynamic_sections (abfd, info))
- return FALSE;
-
- /* Cache the sections created above. */
- htab->sdynbss = bfd_get_section_by_name (abfd, ".dynbss");
- htab->srelbss = bfd_get_section_by_name (abfd, ".rela.bss");
- htab->srelplt = bfd_get_section_by_name (abfd, ".rela.plt");
- htab->splt = bfd_get_section_by_name (abfd, ".plt");
- if (!htab->sdynbss
- || (!htab->srelbss && !info->shared)
- || !htab->srelplt
- || !htab->splt)
- abort ();
+ htab->srelbss = bfd_get_linker_section (abfd, ".rela.bss");
+ htab->srelplt = bfd_get_linker_section (abfd, ".rela.plt");
+ }
+ else
+ htab->srelplt = bfd_get_linker_section (abfd, ".rel.plt");
+ if (!htab->sdynbss
+ || (htab->is_vxworks && !htab->srelbss && !info->shared)
+ || !htab->srelplt
+ || !htab->splt)
+ abort ();
+ if (htab->is_vxworks)
+ {
/* Do the usual VxWorks handling. */
if (!elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2))
return FALSE;
= 4 * ARRAY_SIZE (mips_vxworks_exec_plt_entry);
}
}
+ else if (!info->shared)
+ {
+ /* All variants of the plt0 entry are the same size. */
+ htab->plt_header_size = 4 * ARRAY_SIZE (mips_o32_exec_plt0_entry);
+ htab->plt_entry_size = 4 * ARRAY_SIZE (mips_exec_plt_entry);
+ }
return TRUE;
}
Elf_Internal_Shdr *rel_hdr;
const struct elf_backend_data *bed;
- /* To determine which flavor or relocation this is, we depend on the
- fact that the INPUT_SECTION's REL_HDR is read before its REL_HDR2. */
- rel_hdr = &elf_section_data (sec)->rel_hdr;
+ /* To determine which flavor of relocation this is, we depend on the
+ fact that the INPUT_SECTION's REL_HDR is read before RELA_HDR. */
+ rel_hdr = elf_section_data (sec)->rel.hdr;
+ if (rel_hdr == NULL)
+ return FALSE;
bed = get_elf_backend_data (abfd);
- if ((size_t) (rel - relocs)
- >= (NUM_SHDR_ENTRIES (rel_hdr) * bed->s->int_rels_per_ext_rel))
- rel_hdr = elf_section_data (sec)->rel_hdr2;
- return rel_hdr->sh_entsize == MIPS_ELF_REL_SIZE (abfd);
+ return ((size_t) (rel - relocs)
+ < NUM_SHDR_ENTRIES (rel_hdr) * bed->s->int_rels_per_ext_rel);
}
/* Read the addend for REL relocation REL, which belongs to bfd ABFD.
location = contents + rel->r_offset;
/* Get the addend, which is stored in the input file. */
- _bfd_mips16_elf_reloc_unshuffle (abfd, r_type, FALSE, location);
+ _bfd_mips_elf_reloc_unshuffle (abfd, r_type, FALSE, location);
addend = mips_elf_obtain_contents (howto, rel, abfd, contents);
- _bfd_mips16_elf_reloc_shuffle (abfd, r_type, FALSE, location);
+ _bfd_mips_elf_reloc_shuffle (abfd, r_type, FALSE, location);
return addend & howto->src_mask;
}
r_type = ELF_R_TYPE (abfd, rel->r_info);
if (mips16_reloc_p (r_type))
lo16_type = R_MIPS16_LO16;
+ else if (micromips_reloc_p (r_type))
+ lo16_type = R_MICROMIPS_LO16;
else
lo16_type = R_MIPS_LO16;
return TRUE;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
dynobj = elf_hash_table (info)->dynobj;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
/* Look at the relocation information to figure out which symbol
this is for. */
- r_symndx = mips16_stub_symndx (sec, relocs, rel_end);
+ r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
(*_bfd_error_handler)
/* Look at the relocation information to figure out which symbol
this is for. */
- r_symndx = mips16_stub_symndx (sec, relocs, rel_end);
+ r_symndx = mips16_stub_symndx (bed, sec, relocs, rel_end);
if (r_symndx == 0)
{
(*_bfd_error_handler)
unsigned long r_symndx;
unsigned int r_type;
struct elf_link_hash_entry *h;
+ bfd_boolean can_make_dynamic_p;
r_symndx = ELF_R_SYM (abfd, rel->r_info);
r_type = ELF_R_TYPE (abfd, rel->r_info);
else
{
h = sym_hashes[r_symndx - extsymoff];
-
- /* This may be an indirect symbol created because of a version. */
- if (h != NULL)
- {
- while (h->root.type == bfd_link_hash_indirect)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- }
+ while (h != NULL
+ && (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning))
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
}
- /* Some relocs require a global offset table. */
- if (dynobj == NULL || htab->sgot == NULL)
+ /* Set CAN_MAKE_DYNAMIC_P to true if we can convert this
+ relocation into a dynamic one. */
+ can_make_dynamic_p = FALSE;
+ switch (r_type)
{
- switch (r_type)
- {
- case R_MIPS16_GOT16:
- case R_MIPS16_CALL16:
- case R_MIPS_GOT16:
- case R_MIPS_CALL16:
- case R_MIPS_CALL_HI16:
- case R_MIPS_CALL_LO16:
- case R_MIPS_GOT_HI16:
- case R_MIPS_GOT_LO16:
- case R_MIPS_GOT_PAGE:
- case R_MIPS_GOT_OFST:
- case R_MIPS_GOT_DISP:
- case R_MIPS_TLS_GOTTPREL:
- case R_MIPS_TLS_GD:
- case R_MIPS_TLS_LDM:
- if (dynobj == NULL)
- elf_hash_table (info)->dynobj = dynobj = abfd;
- if (! mips_elf_create_got_section (dynobj, info, FALSE))
- return FALSE;
- if (htab->is_vxworks && !info->shared)
- {
- (*_bfd_error_handler)
- (_("%B: GOT reloc at 0x%lx not expected in executables"),
- abfd, (unsigned long) rel->r_offset);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
- break;
+ case R_MIPS_GOT16:
+ case R_MIPS_CALL16:
+ case R_MIPS_CALL_HI16:
+ case R_MIPS_CALL_LO16:
+ case R_MIPS_GOT_HI16:
+ case R_MIPS_GOT_LO16:
+ case R_MIPS_GOT_PAGE:
+ case R_MIPS_GOT_OFST:
+ case R_MIPS_GOT_DISP:
+ case R_MIPS_TLS_GOTTPREL:
+ case R_MIPS_TLS_GD:
+ case R_MIPS_TLS_LDM:
+ case R_MIPS16_GOT16:
+ case R_MIPS16_CALL16:
+ case R_MIPS16_TLS_GOTTPREL:
+ case R_MIPS16_TLS_GD:
+ case R_MIPS16_TLS_LDM:
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_CALL16:
+ case R_MICROMIPS_CALL_HI16:
+ case R_MICROMIPS_CALL_LO16:
+ case R_MICROMIPS_GOT_HI16:
+ case R_MICROMIPS_GOT_LO16:
+ case R_MICROMIPS_GOT_PAGE:
+ case R_MICROMIPS_GOT_OFST:
+ case R_MICROMIPS_GOT_DISP:
+ case R_MICROMIPS_TLS_GOTTPREL:
+ case R_MICROMIPS_TLS_GD:
+ case R_MICROMIPS_TLS_LDM:
+ if (dynobj == NULL)
+ elf_hash_table (info)->dynobj = dynobj = abfd;
+ if (!mips_elf_create_got_section (dynobj, info))
+ return FALSE;
+ if (htab->is_vxworks && !info->shared)
+ {
+ (*_bfd_error_handler)
+ (_("%B: GOT reloc at 0x%lx not expected in executables"),
+ abfd, (unsigned long) rel->r_offset);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+ break;
- case R_MIPS_32:
- case R_MIPS_REL32:
- case R_MIPS_64:
- /* In VxWorks executables, references to external symbols
- are handled using copy relocs or PLT stubs, so there's
- no need to add a dynamic relocation here. */
- if (dynobj == NULL
- && (info->shared || (h != NULL && !htab->is_vxworks))
- && (sec->flags & SEC_ALLOC) != 0)
- elf_hash_table (info)->dynobj = dynobj = abfd;
- break;
+ /* This is just a hint; it can safely be ignored. Don't set
+ has_static_relocs for the corresponding symbol. */
+ case R_MIPS_JALR:
+ case R_MICROMIPS_JALR:
+ break;
- default:
+ case R_MIPS_32:
+ case R_MIPS_REL32:
+ case R_MIPS_64:
+ /* In VxWorks executables, references to external symbols
+ must be handled using copy relocs or PLT entries; it is not
+ possible to convert this relocation into a dynamic one.
+
+ For executables that use PLTs and copy-relocs, we have a
+ choice between converting the relocation into a dynamic
+ one or using copy relocations or PLT entries. It is
+ usually better to do the former, unless the relocation is
+ against a read-only section. */
+ if ((info->shared
+ || (h != NULL
+ && !htab->is_vxworks
+ && strcmp (h->root.root.string, "__gnu_local_gp") != 0
+ && !(!info->nocopyreloc
+ && !PIC_OBJECT_P (abfd)
+ && MIPS_ELF_READONLY_SECTION (sec))))
+ && (sec->flags & SEC_ALLOC) != 0)
+ {
+ can_make_dynamic_p = TRUE;
+ if (dynobj == NULL)
+ elf_hash_table (info)->dynobj = dynobj = abfd;
break;
}
+ /* For sections that are not SEC_ALLOC a copy reloc would be
+ output if possible (implying questionable semantics for
+ read-only data objects) or otherwise the final link would
+ fail as ld.so will not process them and could not therefore
+ handle any outstanding dynamic relocations.
+
+ For such sections that are also SEC_DEBUGGING, we can avoid
+ these problems by simply ignoring any relocs as these
+ sections have a predefined use and we know it is safe to do
+ so.
+
+ This is needed in cases such as a global symbol definition
+ in a shared library causing a common symbol from an object
+ file to be converted to an undefined reference. If that
+ happens, then all the relocations against this symbol from
+ SEC_DEBUGGING sections in the object file will resolve to
+ nil. */
+ if ((sec->flags & SEC_DEBUGGING) != 0)
+ break;
+ /* Fall through. */
+
+ default:
+ /* Most static relocations require pointer equality, except
+ for branches. */
+ if (h)
+ h->pointer_equality_needed = TRUE;
+ /* Fall through. */
+
+ case R_MIPS_26:
+ case R_MIPS_PC16:
+ case R_MIPS16_26:
+ case R_MICROMIPS_26_S1:
+ case R_MICROMIPS_PC7_S1:
+ case R_MICROMIPS_PC10_S1:
+ case R_MICROMIPS_PC16_S1:
+ case R_MICROMIPS_PC23_S2:
+ if (h)
+ ((struct mips_elf_link_hash_entry *) h)->has_static_relocs = TRUE;
+ break;
}
if (h)
{
- ((struct mips_elf_link_hash_entry *) h)->is_relocation_target = TRUE;
-
/* Relocations against the special VxWorks __GOTT_BASE__ and
__GOTT_INDEX__ symbols must be left to the loader. Allocate
room for them in .rela.dyn. */
info->flags |= DF_TEXTREL;
}
}
- else if (r_type == R_MIPS_CALL_LO16
- || r_type == R_MIPS_GOT_LO16
- || r_type == R_MIPS_GOT_DISP
+ else if (call_lo16_reloc_p (r_type)
+ || got_lo16_reloc_p (r_type)
+ || got_disp_reloc_p (r_type)
|| (got16_reloc_p (r_type) && htab->is_vxworks))
{
/* We may need a local GOT entry for this relocation. We
return FALSE;
}
+ if (h != NULL
+ && mips_elf_relocation_needs_la25_stub (abfd, r_type,
+ ELF_ST_IS_MIPS16 (h->other)))
+ ((struct mips_elf_link_hash_entry *) h)->has_nonpic_branches = TRUE;
+
switch (r_type)
{
case R_MIPS_CALL16:
case R_MIPS16_CALL16:
+ case R_MICROMIPS_CALL16:
if (h == NULL)
{
(*_bfd_error_handler)
case R_MIPS_CALL_HI16:
case R_MIPS_CALL_LO16:
+ case R_MICROMIPS_CALL_HI16:
+ case R_MICROMIPS_CALL_LO16:
if (h != NULL)
{
- /* VxWorks call relocations point the function's .got.plt
- entry, which will be allocated by adjust_dynamic_symbol.
- Otherwise, this symbol requires a global GOT entry. */
- if ((!htab->is_vxworks || h->forced_local)
- && !mips_elf_record_global_got_symbol (h, abfd, info, 0))
+ /* Make sure there is room in the regular GOT to hold the
+ function's address. We may eliminate it in favour of
+ a .got.plt entry later; see mips_elf_count_got_symbols. */
+ if (!mips_elf_record_global_got_symbol (h, abfd, info, TRUE, 0))
return FALSE;
/* We need a stub, not a plt entry for the undefined
break;
case R_MIPS_GOT_PAGE:
+ case R_MICROMIPS_GOT_PAGE:
/* If this is a global, overridable symbol, GOT_PAGE will
decay to GOT_DISP, so we'll need a GOT entry for it. */
if (h)
struct mips_elf_link_hash_entry *hmips =
(struct mips_elf_link_hash_entry *) h;
- while (hmips->root.root.type == bfd_link_hash_indirect
- || hmips->root.root.type == bfd_link_hash_warning)
- hmips = (struct mips_elf_link_hash_entry *)
- hmips->root.root.u.i.link;
-
/* This symbol is definitely not overridable. */
if (hmips->root.def_regular
&& ! (info->shared && ! info->symbolic
case R_MIPS_GOT16:
case R_MIPS_GOT_HI16:
case R_MIPS_GOT_LO16:
- if (!h || r_type == R_MIPS_GOT_PAGE)
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_GOT_HI16:
+ case R_MICROMIPS_GOT_LO16:
+ if (!h || got_page_reloc_p (r_type))
{
/* This relocation needs (or may need, if h != NULL) a
page entry in the GOT. For R_MIPS_GOT_PAGE we do not
howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE);
addend = mips_elf_read_rel_addend (abfd, rel,
howto, contents);
- if (r_type == R_MIPS_GOT16)
+ if (got16_reloc_p (r_type))
mips_elf_add_lo16_rel_addend (abfd, rel, rel_end,
contents, &addend);
else
if (!mips_elf_record_got_page_entry (info, abfd, r_symndx,
addend))
return FALSE;
- break;
}
/* Fall through. */
case R_MIPS_GOT_DISP:
- if (h && !mips_elf_record_global_got_symbol (h, abfd, info, 0))
+ case R_MICROMIPS_GOT_DISP:
+ if (h && !mips_elf_record_global_got_symbol (h, abfd, info,
+ FALSE, 0))
return FALSE;
break;
case R_MIPS_TLS_GOTTPREL:
+ case R_MIPS16_TLS_GOTTPREL:
+ case R_MICROMIPS_TLS_GOTTPREL:
if (info->shared)
info->flags |= DF_STATIC_TLS;
/* Fall through */
case R_MIPS_TLS_LDM:
- if (r_type == R_MIPS_TLS_LDM)
+ case R_MIPS16_TLS_LDM:
+ case R_MICROMIPS_TLS_LDM:
+ if (tls_ldm_reloc_p (r_type))
{
- r_symndx = 0;
+ r_symndx = STN_UNDEF;
h = NULL;
}
/* Fall through */
case R_MIPS_TLS_GD:
+ case R_MIPS16_TLS_GD:
+ case R_MICROMIPS_TLS_GD:
/* This symbol requires a global offset table entry, or two
for TLS GD relocations. */
{
- unsigned char flag = (r_type == R_MIPS_TLS_GD
- ? GOT_TLS_GD
- : r_type == R_MIPS_TLS_LDM
- ? GOT_TLS_LDM
- : GOT_TLS_IE);
+ unsigned char flag;
+
+ flag = (tls_gd_reloc_p (r_type)
+ ? GOT_TLS_GD
+ : tls_ldm_reloc_p (r_type) ? GOT_TLS_LDM : GOT_TLS_IE);
if (h != NULL)
{
struct mips_elf_link_hash_entry *hmips =
(struct mips_elf_link_hash_entry *) h;
hmips->tls_type |= flag;
- if (h && !mips_elf_record_global_got_symbol (h, abfd,
- info, flag))
+ if (h && !mips_elf_record_global_got_symbol (h, abfd, info,
+ FALSE, flag))
return FALSE;
}
else
{
- BFD_ASSERT (flag == GOT_TLS_LDM || r_symndx != 0);
+ BFD_ASSERT (flag == GOT_TLS_LDM || r_symndx != STN_UNDEF);
if (!mips_elf_record_local_got_symbol (abfd, r_symndx,
rel->r_addend,
/* In VxWorks executables, references to external symbols
are handled using copy relocs or PLT stubs, so there's
no need to add a .rela.dyn entry for this relocation. */
- if ((info->shared || (h != NULL && !htab->is_vxworks))
- && !(h && strcmp (h->root.root.string, "__gnu_local_gp") == 0)
- && (sec->flags & SEC_ALLOC) != 0)
+ if (can_make_dynamic_p)
{
if (sreloc == NULL)
{
are relocations against the text segment. */
hmips->readonly_reloc = TRUE;
}
-
- /* Even though we don't directly need a GOT entry for
- this symbol, a symbol must have a dynamic symbol
- table index greater that DT_MIPS_GOTSYM if there are
- dynamic relocations against it. This does not apply
- to VxWorks, which does not have the usual coupling
- between global GOT entries and .dynsym entries. */
- if (h != NULL && !htab->is_vxworks)
- {
- if (dynobj == NULL)
- elf_hash_table (info)->dynobj = dynobj = abfd;
- if (! mips_elf_create_got_section (dynobj, info, TRUE))
- return FALSE;
- if (!mips_elf_record_global_got_symbol (h, abfd, info, 0))
- return FALSE;
- }
}
if (SGI_COMPAT (abfd))
sizeof (Elf32_External_crinfo);
break;
- case R_MIPS_PC16:
- if (h)
- ((struct mips_elf_link_hash_entry *) h)->is_branch_target = TRUE;
- break;
-
case R_MIPS_26:
- if (h)
- ((struct mips_elf_link_hash_entry *) h)->is_branch_target = TRUE;
- /* Fall through. */
-
case R_MIPS_GPREL16:
case R_MIPS_LITERAL:
case R_MIPS_GPREL32:
+ case R_MICROMIPS_26_S1:
+ case R_MICROMIPS_GPREL16:
+ case R_MICROMIPS_LITERAL:
+ case R_MICROMIPS_GPREL7_S2:
if (SGI_COMPAT (abfd))
mips_elf_hash_table (info)->compact_rel_size +=
sizeof (Elf32_External_crinfo);
case R_MIPS_CALL_HI16:
case R_MIPS_CALL_LO16:
case R_MIPS_JALR:
+ case R_MICROMIPS_CALL16:
+ case R_MICROMIPS_CALL_HI16:
+ case R_MICROMIPS_CALL_LO16:
+ case R_MICROMIPS_JALR:
break;
}
mh = (struct mips_elf_link_hash_entry *) h;
mh->need_fn_stub = TRUE;
}
+
+ /* Refuse some position-dependent relocations when creating a
+ shared library. Do not refuse R_MIPS_32 / R_MIPS_64; they're
+ not PIC, but we can create dynamic relocations and the result
+ will be fine. Also do not refuse R_MIPS_LO16, which can be
+ combined with R_MIPS_GOT16. */
+ if (info->shared)
+ {
+ switch (r_type)
+ {
+ case R_MIPS16_HI16:
+ case R_MIPS_HI16:
+ case R_MIPS_HIGHER:
+ case R_MIPS_HIGHEST:
+ case R_MICROMIPS_HI16:
+ case R_MICROMIPS_HIGHER:
+ case R_MICROMIPS_HIGHEST:
+ /* Don't refuse a high part relocation if it's against
+ no symbol (e.g. part of a compound relocation). */
+ if (r_symndx == STN_UNDEF)
+ break;
+
+ /* R_MIPS_HI16 against _gp_disp is used for $gp setup,
+ and has a special meaning. */
+ if (!NEWABI_P (abfd) && h != NULL
+ && strcmp (h->root.root.string, "_gp_disp") == 0)
+ break;
+
+ /* Likewise __GOTT_BASE__ and __GOTT_INDEX__ on VxWorks. */
+ if (is_gott_symbol (info, h))
+ break;
+
+ /* FALLTHROUGH */
+
+ case R_MIPS16_26:
+ case R_MIPS_26:
+ case R_MICROMIPS_26_S1:
+ howto = MIPS_ELF_RTYPE_TO_HOWTO (abfd, r_type, FALSE);
+ (*_bfd_error_handler)
+ (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
+ abfd, howto->name,
+ (h) ? h->root.root.string : "a local symbol");
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ default:
+ break;
+ }
+ }
}
return TRUE;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
dynobj = elf_hash_table (info)->dynobj;
hmips = (struct mips_elf_link_hash_entry *) h;
if (htab->is_vxworks && !info->shared)
return TRUE;
- /* Ignore indirect and warning symbols. All relocations against
- such symbols will be redirected to the target symbol. */
- if (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
+ /* Ignore indirect symbols. All relocations against such symbols
+ will be redirected to the target symbol. */
+ if (h->root.type == bfd_link_hash_indirect)
return TRUE;
/* If this symbol is defined in a dynamic object, or we are creating
if (do_copy)
{
+ /* Even though we don't directly need a GOT entry for this symbol,
+ the SVR4 psABI requires it to have a dynamic symbol table
+ index greater that DT_MIPS_GOTSYM if there are dynamic
+ relocations against it.
+
+ VxWorks does not enforce the same mapping between the GOT
+ and the symbol table, so the same requirement does not
+ apply there. */
+ if (!htab->is_vxworks)
+ {
+ if (hmips->global_got_area > GGA_RELOC_ONLY)
+ hmips->global_got_area = GGA_RELOC_ONLY;
+ hmips->got_only_for_calls = FALSE;
+ }
+
mips_elf_allocate_dynamic_relocations
(dynobj, info, hmips->possibly_dynamic_relocs);
if (hmips->readonly_reloc)
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
dynobj = elf_hash_table (info)->dynobj;
+ hmips = (struct mips_elf_link_hash_entry *) h;
/* Make sure we know what is going on here. */
BFD_ASSERT (dynobj != NULL
hmips = (struct mips_elf_link_hash_entry *) h;
- /* For a function, create a stub, if allowed. */
- if (! hmips->no_fn_stub
- && h->needs_plt)
+ /* If there are call relocations against an externally-defined symbol,
+ see whether we can create a MIPS lazy-binding stub for it. We can
+ only do this if all references to the function are through call
+ relocations, and in that case, the traditional lazy-binding stubs
+ are much more efficient than PLT entries.
+
+ Traditional stubs are only available on SVR4 psABI-based systems;
+ VxWorks always uses PLTs instead. */
+ if (!htab->is_vxworks && h->needs_plt && !hmips->no_fn_stub)
{
if (! elf_hash_table (info)->dynamic_sections_created)
return TRUE;
return TRUE;
}
}
- else if ((h->type == STT_FUNC)
- && !h->needs_plt)
- {
- /* This will set the entry for this symbol in the GOT to 0, and
- the dynamic linker will take care of this. */
- h->root.u.def.value = 0;
- return TRUE;
- }
+ /* As above, VxWorks requires PLT entries for externally-defined
+ functions that are only accessed through call relocations.
- /* If this is a weak symbol, and there is a real definition, the
- processor independent code will have arranged for us to see the
- real definition first, and we can just use the same value. */
- if (h->u.weakdef != NULL)
+ Both VxWorks and non-VxWorks targets also need PLT entries if there
+ are static-only relocations against an externally-defined function.
+ This can technically occur for shared libraries if there are
+ branches to the symbol, although it is unlikely that this will be
+ used in practice due to the short ranges involved. It can occur
+ for any relative or absolute relocation in executables; in that
+ case, the PLT entry becomes the function's canonical address. */
+ else if (((h->needs_plt && !hmips->no_fn_stub)
+ || (h->type == STT_FUNC && hmips->has_static_relocs))
+ && htab->use_plts_and_copy_relocs
+ && !SYMBOL_CALLS_LOCAL (info, h)
+ && !(ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
+ && h->root.type == bfd_link_hash_undefweak))
{
- BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
- || h->u.weakdef->root.type == bfd_link_hash_defweak);
- h->root.u.def.section = h->u.weakdef->root.u.def.section;
- h->root.u.def.value = h->u.weakdef->root.u.def.value;
- return TRUE;
- }
-
- /* This is a reference to a symbol defined by a dynamic object which
- is not a function. */
-
- return TRUE;
-}
-
-/* Likewise, for VxWorks. */
+ /* If this is the first symbol to need a PLT entry, allocate room
+ for the header. */
+ if (htab->splt->size == 0)
+ {
+ BFD_ASSERT (htab->sgotplt->size == 0);
-bfd_boolean
-_bfd_mips_vxworks_adjust_dynamic_symbol (struct bfd_link_info *info,
- struct elf_link_hash_entry *h)
-{
- bfd *dynobj;
- struct mips_elf_link_hash_entry *hmips;
- struct mips_elf_link_hash_table *htab;
+ /* If we're using the PLT additions to the psABI, each PLT
+ entry is 16 bytes and the PLT0 entry is 32 bytes.
+ Encourage better cache usage by aligning. We do this
+ lazily to avoid pessimizing traditional objects. */
+ if (!htab->is_vxworks
+ && !bfd_set_section_alignment (dynobj, htab->splt, 5))
+ return FALSE;
- htab = mips_elf_hash_table (info);
- dynobj = elf_hash_table (info)->dynobj;
- hmips = (struct mips_elf_link_hash_entry *) h;
+ /* Make sure that .got.plt is word-aligned. We do this lazily
+ for the same reason as above. */
+ if (!bfd_set_section_alignment (dynobj, htab->sgotplt,
+ MIPS_ELF_LOG_FILE_ALIGN (dynobj)))
+ return FALSE;
- /* Make sure we know what is going on here. */
- BFD_ASSERT (dynobj != NULL
- && (h->needs_plt
- || h->needs_copy
- || h->u.weakdef != NULL
- || (h->def_dynamic
- && h->ref_regular
- && !h->def_regular)));
+ htab->splt->size += htab->plt_header_size;
- /* If the symbol is defined by a dynamic object, we need a PLT stub if
- either (a) we want to branch to the symbol or (b) we're linking an
- executable that needs a canonical function address. In the latter
- case, the canonical address will be the address of the executable's
- load stub. */
- if ((hmips->is_branch_target
- || (!info->shared
- && h->type == STT_FUNC
- && hmips->is_relocation_target))
- && h->def_dynamic
- && h->ref_regular
- && !h->def_regular
- && !h->forced_local)
- h->needs_plt = 1;
-
- /* Locally-binding symbols do not need a PLT stub; we can refer to
- the functions directly. */
- else if (h->needs_plt
- && (SYMBOL_CALLS_LOCAL (info, h)
- || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
- && h->root.type == bfd_link_hash_undefweak)))
- {
- h->needs_plt = 0;
- return TRUE;
- }
+ /* On non-VxWorks targets, the first two entries in .got.plt
+ are reserved. */
+ if (!htab->is_vxworks)
+ htab->sgotplt->size
+ += get_elf_backend_data (dynobj)->got_header_size;
- if (h->needs_plt)
- {
- /* If this is the first symbol to need a PLT entry, allocate room
- for the header, and for the header's .rela.plt.unloaded entries. */
- if (htab->splt->size == 0)
- {
- htab->splt->size += htab->plt_header_size;
- if (!info->shared)
+ /* On VxWorks, also allocate room for the header's
+ .rela.plt.unloaded entries. */
+ if (htab->is_vxworks && !info->shared)
htab->srelplt2->size += 2 * sizeof (Elf32_External_Rela);
}
htab->splt->size += htab->plt_entry_size;
/* If the output file has no definition of the symbol, set the
- symbol's value to the address of the stub. Point at the PLT
- load stub rather than the lazy resolution stub; this stub
- will become the canonical function address. */
+ symbol's value to the address of the stub. */
if (!info->shared && !h->def_regular)
{
h->root.u.def.section = htab->splt;
h->root.u.def.value = h->plt.offset;
- h->root.u.def.value += 8;
+ /* For VxWorks, point at the PLT load stub rather than the
+ lazy resolution stub; this stub will become the canonical
+ function address. */
+ if (htab->is_vxworks)
+ h->root.u.def.value += 8;
}
- /* Make room for the .got.plt entry and the R_JUMP_SLOT relocation. */
- htab->sgotplt->size += 4;
- htab->srelplt->size += sizeof (Elf32_External_Rela);
+ /* Make room for the .got.plt entry and the R_MIPS_JUMP_SLOT
+ relocation. */
+ htab->sgotplt->size += MIPS_ELF_GOT_SIZE (dynobj);
+ htab->srelplt->size += (htab->is_vxworks
+ ? MIPS_ELF_RELA_SIZE (dynobj)
+ : MIPS_ELF_REL_SIZE (dynobj));
/* Make room for the .rela.plt.unloaded relocations. */
- if (!info->shared)
+ if (htab->is_vxworks && !info->shared)
htab->srelplt2->size += 3 * sizeof (Elf32_External_Rela);
- return TRUE;
- }
+ /* All relocations against this symbol that could have been made
+ dynamic will now refer to the PLT entry instead. */
+ hmips->possibly_dynamic_relocs = 0;
- /* If a function symbol is defined by a dynamic object, and we do not
- need a PLT stub for it, the symbol's value should be zero. */
- if (h->type == STT_FUNC
- && h->def_dynamic
- && h->ref_regular
- && !h->def_regular)
- {
- h->root.u.def.value = 0;
return TRUE;
}
return TRUE;
}
- /* This is a reference to a symbol defined by a dynamic object which
- is not a function. */
- if (info->shared)
+ /* Otherwise, there is nothing further to do for symbols defined
+ in regular objects. */
+ if (h->def_regular)
return TRUE;
+ /* There's also nothing more to do if we'll convert all relocations
+ against this symbol into dynamic relocations. */
+ if (!hmips->has_static_relocs)
+ return TRUE;
+
+ /* We're now relying on copy relocations. Complain if we have
+ some that we can't convert. */
+ if (!htab->use_plts_and_copy_relocs || info->shared)
+ {
+ (*_bfd_error_handler) (_("non-dynamic relocations refer to "
+ "dynamic symbol %s"),
+ h->root.root.string);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
/* We must allocate the symbol in our .dynbss section, which will
become part of the .bss section of the executable. There will be
an entry for this symbol in the .dynsym section. The dynamic
if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
{
- htab->srelbss->size += sizeof (Elf32_External_Rela);
+ if (htab->is_vxworks)
+ htab->srelbss->size += sizeof (Elf32_External_Rela);
+ else
+ mips_elf_allocate_dynamic_relocations (dynobj, info, 1);
h->needs_copy = 1;
}
+ /* All relocations against this symbol that could have been made
+ dynamic will now refer to the local copy instead. */
+ hmips->possibly_dynamic_relocs = 0;
+
return _bfd_elf_adjust_dynamic_copy (h, htab->sdynbss);
}
\f
{
asection *ri;
struct mips_elf_link_hash_table *htab;
+ struct mips_htab_traverse_info hti;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
/* The .reginfo section has a fixed size. */
ri = bfd_get_section_by_name (output_bfd, ".reginfo");
if (ri != NULL)
bfd_set_section_size (output_bfd, ri, sizeof (Elf32_External_RegInfo));
- if (! (info->relocatable
- || ! mips_elf_hash_table (info)->mips16_stubs_seen))
- mips_elf_link_hash_traverse (mips_elf_hash_table (info),
- mips_elf_check_mips16_stubs, info);
+ hti.info = info;
+ hti.output_bfd = output_bfd;
+ hti.error = FALSE;
+ mips_elf_link_hash_traverse (mips_elf_hash_table (info),
+ mips_elf_check_symbols, &hti);
+ if (hti.error)
+ return FALSE;
return TRUE;
}
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
s = htab->sgot;
if (s == NULL)
return TRUE;
dynobj = elf_hash_table (info)->dynobj;
g = htab->got_info;
+ /* Allocate room for the reserved entries. VxWorks always reserves
+ 3 entries; other objects only reserve 2 entries. */
+ BFD_ASSERT (g->assigned_gotno == 0);
+ if (htab->is_vxworks)
+ htab->reserved_gotno = 3;
+ else
+ htab->reserved_gotno = 2;
+ g->local_gotno += htab->reserved_gotno;
+ g->assigned_gotno = htab->reserved_gotno;
+
/* Replace entries for indirect and warning symbols with entries for
the target symbol. */
if (!mips_elf_resolve_final_got_entries (g))
return FALSE;
/* Count the number of GOT symbols. */
- mips_elf_link_hash_traverse (htab, mips_elf_count_got_symbols, g);
+ mips_elf_link_hash_traverse (htab, mips_elf_count_got_symbols, info);
/* Calculate the total loadable size of the output. That
will give us the maximum number of GOT_PAGE entries
/* Each VxWorks GOT entry needs an explicit relocation. */
unsigned int count;
- count = g->global_gotno + g->local_gotno - MIPS_RESERVED_GOTNO (info);
+ count = g->global_gotno + g->local_gotno - htab->reserved_gotno;
if (count)
mips_elf_allocate_dynamic_relocations (dynobj, info, count);
}
bfd_size_type dynsymcount;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
if (htab->lazy_stub_count == 0)
return;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
if (htab->lazy_stub_count == 0)
return;
htab->sstubs->size = 0;
- mips_elf_link_hash_traverse (mips_elf_hash_table (info),
- mips_elf_allocate_lazy_stub, htab);
+ mips_elf_link_hash_traverse (htab, mips_elf_allocate_lazy_stub, htab);
htab->sstubs->size += htab->function_stub_size;
BFD_ASSERT (htab->sstubs->size
== htab->lazy_stub_count * htab->function_stub_size);
struct bfd_link_info *info)
{
bfd *dynobj;
- asection *s;
+ asection *s, *sreldyn;
bfd_boolean reltext;
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
BFD_ASSERT (dynobj != NULL);
/* Set the contents of the .interp section to the interpreter. */
if (info->executable)
{
- s = bfd_get_section_by_name (dynobj, ".interp");
+ s = bfd_get_linker_section (dynobj, ".interp");
BFD_ASSERT (s != NULL);
s->size
= strlen (ELF_DYNAMIC_INTERPRETER (output_bfd)) + 1;
s->contents
= (bfd_byte *) ELF_DYNAMIC_INTERPRETER (output_bfd);
}
- }
+
+ /* Create a symbol for the PLT, if we know that we are using it. */
+ if (htab->splt && htab->splt->size > 0 && htab->root.hplt == NULL)
+ {
+ struct elf_link_hash_entry *h;
+
+ BFD_ASSERT (htab->use_plts_and_copy_relocs);
+
+ h = _bfd_elf_define_linkage_sym (dynobj, info, htab->splt,
+ "_PROCEDURE_LINKAGE_TABLE_");
+ htab->root.hplt = h;
+ if (h == NULL)
+ return FALSE;
+ h->type = STT_FUNC;
+ }
+ }
/* Allocate space for global sym dynamic relocs. */
- elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (PTR) info);
+ elf_link_hash_traverse (&htab->root, allocate_dynrelocs, info);
mips_elf_estimate_stub_size (output_bfd, info);
{
/* We add a room for __rld_map. It will be filled in by the
rtld to contain a pointer to the _r_debug structure. */
- s->size += 4;
+ s->size += MIPS_ELF_RLD_MAP_SIZE (output_bfd);
}
else if (SGI_COMPAT (output_bfd)
&& CONST_STRNEQ (name, ".compact_rel"))
s->size += mips_elf_hash_table (info)->compact_rel_size;
+ else if (s == htab->splt)
+ {
+ /* If the last PLT entry has a branch delay slot, allocate
+ room for an extra nop to fill the delay slot. This is
+ for CPUs without load interlocking. */
+ if (! LOAD_INTERLOCKS_P (output_bfd)
+ && ! htab->is_vxworks && s->size > 0)
+ s->size += 4;
+ }
else if (! CONST_STRNEQ (name, ".init")
&& s != htab->sgot
&& s != htab->sgotplt
- && s != htab->splt
- && s != htab->sstubs)
+ && s != htab->sstubs
+ && s != htab->sdynbss)
{
/* It's not one of our sections, so don't allocate space. */
continue;
/* SGI object has the equivalence of DT_DEBUG in the
DT_MIPS_RLD_MAP entry. This must come first because glibc
- only fills in DT_MIPS_RLD_MAP (not DT_DEBUG) and GDB only
- looks at the first one it sees. */
+ only fills in DT_MIPS_RLD_MAP (not DT_DEBUG) and some tools
+ may only look at the first one they see. */
if (!info->shared
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTGOT, 0))
return FALSE;
+ sreldyn = mips_elf_rel_dyn_section (info, FALSE);
if (htab->is_vxworks)
{
/* VxWorks uses .rela.dyn instead of .rel.dyn. It does not
use any of the DT_MIPS_* tags. */
- if (mips_elf_rel_dyn_section (info, FALSE))
+ if (sreldyn && sreldyn->size > 0)
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELA, 0))
return FALSE;
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_RELAENT, 0))
return FALSE;
}
- if (htab->splt->size > 0)
- {
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTREL, 0))
- return FALSE;
-
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_JMPREL, 0))
- return FALSE;
-
- if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTRELSZ, 0))
- return FALSE;
- }
}
else
{
- if (mips_elf_rel_dyn_section (info, FALSE))
+ if (sreldyn && sreldyn->size > 0)
{
if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_REL, 0))
return FALSE;
if (IRIX_COMPAT (dynobj) == ict_irix6
&& (bfd_get_section_by_name
- (dynobj, MIPS_ELF_OPTIONS_SECTION_NAME (dynobj)))
+ (output_bfd, MIPS_ELF_OPTIONS_SECTION_NAME (dynobj)))
&& !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_OPTIONS, 0))
return FALSE;
}
+ if (htab->splt->size > 0)
+ {
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTREL, 0))
+ return FALSE;
+
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_JMPREL, 0))
+ return FALSE;
+
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_PLTRELSZ, 0))
+ return FALSE;
+
+ if (! MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_PLTGOT, 0))
+ return FALSE;
+ }
if (htab->is_vxworks
&& !elf_vxworks_add_dynamic_entries (output_bfd, info))
return FALSE;
Elf_Internal_Sym *sym;
asection *sec;
- if (mips_elf_local_relocation_p (input_bfd, rel, local_sections, FALSE))
+ if (mips_elf_local_relocation_p (input_bfd, rel, local_sections))
{
r_type = ELF_R_TYPE (output_bfd, rel->r_info);
- if (r_type == R_MIPS16_GPREL
- || r_type == R_MIPS_GPREL16
+ if (gprel16_reloc_p (r_type)
|| r_type == R_MIPS_GPREL32
- || r_type == R_MIPS_LITERAL)
+ || literal_reloc_p (r_type))
{
rel->r_addend += _bfd_get_gp_value (input_bfd);
rel->r_addend -= _bfd_get_gp_value (output_bfd);
}
}
+/* Handle relocations against symbols from removed linkonce sections,
+ or sections discarded by a linker script. We use this wrapper around
+ RELOC_AGAINST_DISCARDED_SECTION to handle triplets of compound relocs
+ on 64-bit ELF targets. In this case for any relocation handled, which
+ always be the first in a triplet, the remaining two have to be processed
+ together with the first, even if they are R_MIPS_NONE. It is the symbol
+ index referred by the first reloc that applies to all the three and the
+ remaining two never refer to an object symbol. And it is the final
+ relocation (the last non-null one) that determines the output field of
+ the whole relocation so retrieve the corresponding howto structure for
+ the relocatable field to be cleared by RELOC_AGAINST_DISCARDED_SECTION.
+
+ Note that RELOC_AGAINST_DISCARDED_SECTION is a macro that uses "continue"
+ and therefore requires to be pasted in a loop. It also defines a block
+ and does not protect any of its arguments, hence the extra brackets. */
+
+static void
+mips_reloc_against_discarded_section (bfd *output_bfd,
+ struct bfd_link_info *info,
+ bfd *input_bfd, asection *input_section,
+ Elf_Internal_Rela **rel,
+ const Elf_Internal_Rela **relend,
+ bfd_boolean rel_reloc,
+ reloc_howto_type *howto,
+ bfd_byte *contents)
+{
+ const struct elf_backend_data *bed = get_elf_backend_data (output_bfd);
+ int count = bed->s->int_rels_per_ext_rel;
+ unsigned int r_type;
+ int i;
+
+ for (i = count - 1; i > 0; i--)
+ {
+ r_type = ELF_R_TYPE (output_bfd, (*rel)[i].r_info);
+ if (r_type != R_MIPS_NONE)
+ {
+ howto = MIPS_ELF_RTYPE_TO_HOWTO (input_bfd, r_type, !rel_reloc);
+ break;
+ }
+ }
+ do
+ {
+ RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
+ (*rel), count, (*relend),
+ howto, i, contents);
+ }
+ while (0);
+}
+
/* Relocate a MIPS ELF section. */
bfd_boolean
const char *name;
bfd_vma value = 0;
reloc_howto_type *howto;
- bfd_boolean require_jalx;
+ bfd_boolean cross_mode_jump_p;
/* TRUE if the relocation is a RELA relocation, rather than a
REL relocation. */
bfd_boolean rela_relocation_p = TRUE;
asection *sec;
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry *h;
+ bfd_boolean rel_reloc;
+ rel_reloc = (NEWABI_P (input_bfd)
+ && mips_elf_rel_relocation_p (input_bfd, input_section,
+ relocs, rel));
/* Find the relocation howto for this relocation. */
- howto = MIPS_ELF_RTYPE_TO_HOWTO (input_bfd, r_type,
- NEWABI_P (input_bfd)
- && (MIPS_RELOC_RELA_P
- (input_bfd, input_section,
- rel - relocs)));
+ howto = MIPS_ELF_RTYPE_TO_HOWTO (input_bfd, r_type, !rel_reloc);
r_symndx = ELF_R_SYM (input_bfd, rel->r_info);
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
- if (mips_elf_local_relocation_p (input_bfd, rel, local_sections, FALSE))
+ if (mips_elf_local_relocation_p (input_bfd, rel, local_sections))
{
sec = local_sections[r_symndx];
h = NULL;
sec = h->root.u.def.section;
}
- if (sec != NULL && elf_discarded_section (sec))
+ if (sec != NULL && discarded_section (sec))
{
- /* For relocs against symbols from removed linkonce sections,
- or sections discarded by a linker script, we just want the
- section contents zeroed. Avoid any special processing. */
- _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
- rel->r_info = 0;
- rel->r_addend = 0;
+ mips_reloc_against_discarded_section (output_bfd, info, input_bfd,
+ input_section, &rel, &relend,
+ rel_reloc, howto, contents);
continue;
}
if (hi16_reloc_p (r_type)
|| (got16_reloc_p (r_type)
&& mips_elf_local_relocation_p (input_bfd, rel,
- local_sections, FALSE)))
+ local_sections)))
{
if (!mips_elf_add_lo16_rel_addend (input_bfd, rel, relend,
contents, &addend))
{
- const char *name;
-
if (h)
name = h->root.root.string;
else
input_section, info, rel,
addend, howto, local_syms,
local_sections, &value,
- &name, &require_jalx,
+ &name, &cross_mode_jump_p,
use_saved_addend_p))
{
case bfd_reloc_continue:
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
BFD_ASSERT (name != NULL);
if (!htab->small_data_overflow_reported
- && (howto->type == R_MIPS_GPREL16
- || howto->type == R_MIPS_LITERAL))
+ && (gprel16_reloc_p (howto->type)
+ || literal_reloc_p (howto->type)))
{
- const char *msg =
- _("small-data section exceeds 64KB;"
- " lower small-data size limit (see option -G)");
+ msg = _("small-data section exceeds 64KB;"
+ " lower small-data size limit (see option -G)");
htab->small_data_overflow_reported = TRUE;
(*info->callbacks->einfo) ("%P: %s\n", msg);
case bfd_reloc_ok:
break;
+ case bfd_reloc_outofrange:
+ if (jal_reloc_p (howto->type))
+ {
+ msg = _("JALX to a non-word-aligned address");
+ info->callbacks->warning
+ (info, msg, name, input_bfd, input_section, rel->r_offset);
+ return FALSE;
+ }
+ /* Fall through. */
+
default:
abort ();
break;
/* Actually perform the relocation. */
if (! mips_elf_perform_relocation (info, howto, rel, value,
input_bfd, input_section,
- contents, require_jalx))
+ contents, cross_mode_jump_p))
return FALSE;
}
return TRUE;
}
\f
+/* A function that iterates over each entry in la25_stubs and fills
+ in the code for each one. DATA points to a mips_htab_traverse_info. */
+
+static int
+mips_elf_create_la25_stub (void **slot, void *data)
+{
+ struct mips_htab_traverse_info *hti;
+ struct mips_elf_link_hash_table *htab;
+ struct mips_elf_la25_stub *stub;
+ asection *s;
+ bfd_byte *loc;
+ bfd_vma offset, target, target_high, target_low;
+
+ stub = (struct mips_elf_la25_stub *) *slot;
+ hti = (struct mips_htab_traverse_info *) data;
+ htab = mips_elf_hash_table (hti->info);
+ BFD_ASSERT (htab != NULL);
+
+ /* Create the section contents, if we haven't already. */
+ s = stub->stub_section;
+ loc = s->contents;
+ if (loc == NULL)
+ {
+ loc = bfd_malloc (s->size);
+ if (loc == NULL)
+ {
+ hti->error = TRUE;
+ return FALSE;
+ }
+ s->contents = loc;
+ }
+
+ /* Work out where in the section this stub should go. */
+ offset = stub->offset;
+
+ /* Work out the target address. */
+ target = mips_elf_get_la25_target (stub, &s);
+ target += s->output_section->vma + s->output_offset;
+
+ target_high = ((target + 0x8000) >> 16) & 0xffff;
+ target_low = (target & 0xffff);
+
+ if (stub->stub_section != htab->strampoline)
+ {
+ /* This is a simple LUI/ADDIU stub. Zero out the beginning
+ of the section and write the two instructions at the end. */
+ memset (loc, 0, offset);
+ loc += offset;
+ if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
+ {
+ bfd_put_micromips_32 (hti->output_bfd,
+ LA25_LUI_MICROMIPS (target_high),
+ loc);
+ bfd_put_micromips_32 (hti->output_bfd,
+ LA25_ADDIU_MICROMIPS (target_low),
+ loc + 4);
+ }
+ else
+ {
+ bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc);
+ bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 4);
+ }
+ }
+ else
+ {
+ /* This is trampoline. */
+ loc += offset;
+ if (ELF_ST_IS_MICROMIPS (stub->h->root.other))
+ {
+ bfd_put_micromips_32 (hti->output_bfd,
+ LA25_LUI_MICROMIPS (target_high), loc);
+ bfd_put_micromips_32 (hti->output_bfd,
+ LA25_J_MICROMIPS (target), loc + 4);
+ bfd_put_micromips_32 (hti->output_bfd,
+ LA25_ADDIU_MICROMIPS (target_low), loc + 8);
+ bfd_put_32 (hti->output_bfd, 0, loc + 12);
+ }
+ else
+ {
+ bfd_put_32 (hti->output_bfd, LA25_LUI (target_high), loc);
+ bfd_put_32 (hti->output_bfd, LA25_J (target), loc + 4);
+ bfd_put_32 (hti->output_bfd, LA25_ADDIU (target_low), loc + 8);
+ bfd_put_32 (hti->output_bfd, 0, loc + 12);
+ }
+ }
+ return TRUE;
+}
+
/* If NAME is one of the special IRIX6 symbols defined by the linker,
adjust it appropriately now. */
struct mips_elf_link_hash_entry *hmips;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
hmips = (struct mips_elf_link_hash_entry *) h;
- if (h->plt.offset != MINUS_ONE)
+ BFD_ASSERT (!htab->is_vxworks);
+
+ if (h->plt.offset != MINUS_ONE && hmips->no_fn_stub)
{
- bfd_byte stub[MIPS_FUNCTION_STUB_BIG_SIZE];
+ /* We've decided to create a PLT entry for this symbol. */
+ bfd_byte *loc;
+ bfd_vma header_address, plt_index, got_address;
+ bfd_vma got_address_high, got_address_low, load;
+ const bfd_vma *plt_entry;
+
+ BFD_ASSERT (htab->use_plts_and_copy_relocs);
+ BFD_ASSERT (h->dynindx != -1);
+ BFD_ASSERT (htab->splt != NULL);
+ BFD_ASSERT (h->plt.offset <= htab->splt->size);
+ BFD_ASSERT (!h->def_regular);
+
+ /* Calculate the address of the PLT header. */
+ header_address = (htab->splt->output_section->vma
+ + htab->splt->output_offset);
+
+ /* Calculate the index of the entry. */
+ plt_index = ((h->plt.offset - htab->plt_header_size)
+ / htab->plt_entry_size);
+
+ /* Calculate the address of the .got.plt entry. */
+ got_address = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset
+ + (2 + plt_index) * MIPS_ELF_GOT_SIZE (dynobj));
+ got_address_high = ((got_address + 0x8000) >> 16) & 0xffff;
+ got_address_low = got_address & 0xffff;
+
+ /* Initially point the .got.plt entry at the PLT header. */
+ loc = (htab->sgotplt->contents
+ + (2 + plt_index) * MIPS_ELF_GOT_SIZE (dynobj));
+ if (ABI_64_P (output_bfd))
+ bfd_put_64 (output_bfd, header_address, loc);
+ else
+ bfd_put_32 (output_bfd, header_address, loc);
+
+ /* Find out where the .plt entry should go. */
+ loc = htab->splt->contents + h->plt.offset;
+
+ /* Pick the load opcode. */
+ load = MIPS_ELF_LOAD_WORD (output_bfd);
+
+ /* Fill in the PLT entry itself. */
+ plt_entry = mips_exec_plt_entry;
+ bfd_put_32 (output_bfd, plt_entry[0] | got_address_high, loc);
+ bfd_put_32 (output_bfd, plt_entry[1] | got_address_low | load, loc + 4);
+
+ if (! LOAD_INTERLOCKS_P (output_bfd))
+ {
+ bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 8);
+ bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
+ }
+ else
+ {
+ bfd_put_32 (output_bfd, plt_entry[3], loc + 8);
+ bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 12);
+ }
+
+ /* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
+ mips_elf_output_dynamic_relocation (output_bfd, htab->srelplt,
+ plt_index, h->dynindx,
+ R_MIPS_JUMP_SLOT, got_address);
+
+ /* We distinguish between PLT entries and lazy-binding stubs by
+ giving the former an st_other value of STO_MIPS_PLT. Set the
+ flag and leave the value if there are any relocations in the
+ binary where pointer equality matters. */
+ sym->st_shndx = SHN_UNDEF;
+ if (h->pointer_equality_needed)
+ sym->st_other = STO_MIPS_PLT;
+ else
+ sym->st_value = 0;
+ }
+ else if (h->plt.offset != MINUS_ONE)
+ {
+ /* We've decided to create a lazy-binding stub. */
+ bfd_byte stub[MIPS_FUNCTION_STUB_BIG_SIZE];
/* This symbol has a stub. Set it up. */
BFD_ASSERT (h->dynindx != -1
|| h->forced_local);
- sgot = mips_elf_got_section (info);
- BFD_ASSERT (sgot != NULL);
+ sgot = htab->sgot;
g = htab->got_info;
BFD_ASSERT (g != NULL);
/* Run through the global symbol table, creating GOT entries for all
the symbols that need them. */
- if (g->global_gotsym != NULL
- && h->dynindx >= g->global_gotsym->dynindx)
+ if (hmips->global_got_area != GGA_NONE)
{
bfd_vma offset;
bfd_vma value;
MIPS_ELF_PUT_WORD (output_bfd, value, sgot->contents + offset);
}
- if (g->next && h->dynindx != -1 && h->type != STT_TLS)
+ if (hmips->global_got_area != GGA_NONE && g->next && h->type != STT_TLS)
{
struct mips_got_entry e, *p;
bfd_vma entry;
/* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
name = h->root.root.string;
- if (strcmp (name, "_DYNAMIC") == 0
+ if (h == elf_hash_table (info)->hdynamic
|| h == elf_hash_table (info)->hgot)
sym->st_shndx = SHN_ABS;
else if (strcmp (name, "_DYNAMIC_LINK") == 0
}
}
+ /* Emit a copy reloc, if needed. */
+ if (h->needs_copy)
+ {
+ asection *s;
+ bfd_vma symval;
+
+ BFD_ASSERT (h->dynindx != -1);
+ BFD_ASSERT (htab->use_plts_and_copy_relocs);
+
+ s = mips_elf_rel_dyn_section (info, FALSE);
+ symval = (h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset
+ + h->root.u.def.value);
+ mips_elf_output_dynamic_relocation (output_bfd, s, s->reloc_count++,
+ h->dynindx, R_MIPS_COPY, symval);
+ }
+
/* Handle the IRIX6-specific symbols. */
if (IRIX_COMPAT (output_bfd) == ict_irix6)
mips_elf_irix6_finish_dynamic_symbol (output_bfd, name, sym);
- if (! info->shared)
- {
- if (! mips_elf_hash_table (info)->use_rld_obj_head
- && (strcmp (name, "__rld_map") == 0
- || strcmp (name, "__RLD_MAP") == 0))
- {
- asection *s = bfd_get_section_by_name (dynobj, ".rld_map");
- BFD_ASSERT (s != NULL);
- sym->st_value = s->output_section->vma + s->output_offset;
- bfd_put_32 (output_bfd, 0, s->contents);
- if (mips_elf_hash_table (info)->rld_value == 0)
- mips_elf_hash_table (info)->rld_value = sym->st_value;
- }
- else if (mips_elf_hash_table (info)->use_rld_obj_head
- && strcmp (name, "__rld_obj_head") == 0)
- {
- /* IRIX6 does not use a .rld_map section. */
- if (IRIX_COMPAT (output_bfd) == ict_irix5
- || IRIX_COMPAT (output_bfd) == ict_none)
- BFD_ASSERT (bfd_get_section_by_name (dynobj, ".rld_map")
- != NULL);
- mips_elf_hash_table (info)->rld_value = sym->st_value;
- }
- }
-
/* Keep dynamic MIPS16 symbols odd. This allows the dynamic linker to
treat MIPS16 symbols like any other. */
if (ELF_ST_IS_MIPS16 (sym->st_other))
asection *sgot;
struct mips_got_info *g;
struct mips_elf_link_hash_table *htab;
+ struct mips_elf_link_hash_entry *hmips;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
dynobj = elf_hash_table (info)->dynobj;
+ hmips = (struct mips_elf_link_hash_entry *) h;
if (h->plt.offset != (bfd_vma) -1)
{
BFD_ASSERT (h->dynindx != -1 || h->forced_local);
- sgot = mips_elf_got_section (info);
- BFD_ASSERT (sgot != NULL);
+ sgot = htab->sgot;
g = htab->got_info;
BFD_ASSERT (g != NULL);
/* See if this symbol has an entry in the GOT. */
- if (g->global_gotsym != NULL
- && h->dynindx >= g->global_gotsym->dynindx)
+ if (hmips->global_got_area != GGA_NONE)
{
bfd_vma offset;
Elf_Internal_Rela outrel;
++htab->srelbss->reloc_count;
}
- /* If this is a mips16 symbol, force the value to be even. */
- if (ELF_ST_IS_MIPS16 (sym->st_other))
+ /* If this is a mips16/microMIPS symbol, force the value to be even. */
+ if (ELF_ST_IS_COMPRESSED (sym->st_other))
sym->st_value &= ~1;
return TRUE;
}
+/* Write out a plt0 entry to the beginning of .plt. */
+
+static void
+mips_finish_exec_plt (bfd *output_bfd, struct bfd_link_info *info)
+{
+ bfd_byte *loc;
+ bfd_vma gotplt_value, gotplt_value_high, gotplt_value_low;
+ static const bfd_vma *plt_entry;
+ struct mips_elf_link_hash_table *htab;
+
+ htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
+ if (ABI_64_P (output_bfd))
+ plt_entry = mips_n64_exec_plt0_entry;
+ else if (ABI_N32_P (output_bfd))
+ plt_entry = mips_n32_exec_plt0_entry;
+ else
+ plt_entry = mips_o32_exec_plt0_entry;
+
+ /* Calculate the value of .got.plt. */
+ gotplt_value = (htab->sgotplt->output_section->vma
+ + htab->sgotplt->output_offset);
+ gotplt_value_high = ((gotplt_value + 0x8000) >> 16) & 0xffff;
+ gotplt_value_low = gotplt_value & 0xffff;
+
+ /* The PLT sequence is not safe for N64 if .got.plt's address can
+ not be loaded in two instructions. */
+ BFD_ASSERT ((gotplt_value & ~(bfd_vma) 0x7fffffff) == 0
+ || ~(gotplt_value | 0x7fffffff) == 0);
+
+ /* Install the PLT header. */
+ loc = htab->splt->contents;
+ bfd_put_32 (output_bfd, plt_entry[0] | gotplt_value_high, loc);
+ bfd_put_32 (output_bfd, plt_entry[1] | gotplt_value_low, loc + 4);
+ bfd_put_32 (output_bfd, plt_entry[2] | gotplt_value_low, loc + 8);
+ bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
+ bfd_put_32 (output_bfd, plt_entry[4], loc + 16);
+ bfd_put_32 (output_bfd, plt_entry[5], loc + 20);
+ bfd_put_32 (output_bfd, plt_entry[6], loc + 24);
+ bfd_put_32 (output_bfd, plt_entry[7], loc + 28);
+}
+
/* Install the PLT header for a VxWorks executable and finalize the
contents of .rela.plt.unloaded. */
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
plt_entry = mips_vxworks_exec_plt0_entry;
/* Calculate the value of _GLOBAL_OFFSET_TABLE_. */
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
/* We just need to copy the entry byte-by-byte. */
for (i = 0; i < ARRAY_SIZE (mips_vxworks_shared_plt0_entry); i++)
struct mips_elf_link_hash_table *htab;
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
dynobj = elf_hash_table (info)->dynobj;
- sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
+ sdyn = bfd_get_linker_section (dynobj, ".dynamic");
- sgot = mips_elf_got_section (info);
- if (sgot == NULL)
- gg = g = NULL;
- else
- {
- gg = htab->got_info;
- g = mips_elf_got_for_ibfd (gg, output_bfd);
- BFD_ASSERT (g != NULL);
- }
+ sgot = htab->sgot;
+ gg = htab->got_info;
if (elf_hash_table (info)->dynamic_sections_created)
{
int dyn_to_skip = 0, dyn_skipped = 0;
BFD_ASSERT (sdyn != NULL);
+ BFD_ASSERT (gg != NULL);
+
+ g = mips_elf_got_for_ibfd (gg, output_bfd);
BFD_ASSERT (g != NULL);
for (b = sdyn->contents;
break;
case DT_PLTGOT:
- name = ".got";
- if (htab->is_vxworks)
- {
- /* _GLOBAL_OFFSET_TABLE_ is defined to be the beginning
- of the ".got" section in DYNOBJ. */
- s = bfd_get_section_by_name (dynobj, name);
- BFD_ASSERT (s != NULL);
- dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
- }
- else
- {
- s = bfd_get_section_by_name (output_bfd, name);
- BFD_ASSERT (s != NULL);
- dyn.d_un.d_ptr = s->vma;
- }
+ s = htab->sgot;
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
+ break;
+
+ case DT_MIPS_PLTGOT:
+ s = htab->sgotplt;
+ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
break;
case DT_MIPS_RLD_VERSION:
break;
case DT_MIPS_HIPAGENO:
- dyn.d_un.d_val = g->local_gotno - MIPS_RESERVED_GOTNO (info);
+ dyn.d_un.d_val = g->local_gotno - htab->reserved_gotno;
break;
case DT_MIPS_RLD_MAP:
- dyn.d_un.d_ptr = mips_elf_hash_table (info)->rld_value;
+ {
+ struct elf_link_hash_entry *h;
+ h = mips_elf_hash_table (info)->rld_symbol;
+ if (!h)
+ {
+ dyn_to_skip = MIPS_ELF_DYN_SIZE (dynobj);
+ swap_out_p = FALSE;
+ break;
+ }
+ s = h->root.u.def.section;
+ dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
+ + h->root.u.def.value);
+ }
break;
case DT_MIPS_OPTIONS:
break;
case DT_PLTREL:
- BFD_ASSERT (htab->is_vxworks);
- dyn.d_un.d_val = DT_RELA;
+ BFD_ASSERT (htab->use_plts_and_copy_relocs);
+ if (htab->is_vxworks)
+ dyn.d_un.d_val = DT_RELA;
+ else
+ dyn.d_un.d_val = DT_REL;
break;
case DT_PLTRELSZ:
- BFD_ASSERT (htab->is_vxworks);
+ BFD_ASSERT (htab->use_plts_and_copy_relocs);
dyn.d_un.d_val = htab->srelplt->size;
break;
case DT_JMPREL:
- BFD_ASSERT (htab->is_vxworks);
- dyn.d_un.d_val = (htab->srelplt->output_section->vma
+ BFD_ASSERT (htab->use_plts_and_copy_relocs);
+ dyn.d_un.d_ptr = (htab->srelplt->output_section->vma
+ htab->srelplt->output_offset);
break;
for (g = gg->next; g->next != gg; g = g->next)
{
- bfd_vma index = g->next->local_gotno + g->next->global_gotno
+ bfd_vma got_index = g->next->local_gotno + g->next->global_gotno
+ g->next->tls_gotno;
MIPS_ELF_PUT_WORD (output_bfd, 0, sgot->contents
- + index++ * MIPS_ELF_GOT_SIZE (output_bfd));
+ + got_index++ * MIPS_ELF_GOT_SIZE (output_bfd));
MIPS_ELF_PUT_WORD (output_bfd, MIPS_ELF_GNU_GOT1_MASK (output_bfd),
sgot->contents
- + index++ * MIPS_ELF_GOT_SIZE (output_bfd));
+ + got_index++ * MIPS_ELF_GOT_SIZE (output_bfd));
if (! info->shared)
continue;
- while (index < g->assigned_gotno)
+ while (got_index < g->assigned_gotno)
{
rel[0].r_offset = rel[1].r_offset = rel[2].r_offset
- = index++ * MIPS_ELF_GOT_SIZE (output_bfd);
+ = got_index++ * MIPS_ELF_GOT_SIZE (output_bfd);
if (!(mips_elf_create_dynamic_relocation
(output_bfd, info, rel, NULL,
bfd_abs_section_ptr,
if (SGI_COMPAT (output_bfd))
{
/* Write .compact_rel section out. */
- s = bfd_get_section_by_name (dynobj, ".compact_rel");
+ s = bfd_get_linker_section (dynobj, ".compact_rel");
if (s != NULL)
{
cpt.id1 = 1;
}
}
- if (htab->is_vxworks && htab->splt->size > 0)
+ if (htab->splt && htab->splt->size > 0)
{
- if (info->shared)
- mips_vxworks_finish_shared_plt (output_bfd, info);
+ if (htab->is_vxworks)
+ {
+ if (info->shared)
+ mips_vxworks_finish_shared_plt (output_bfd, info);
+ else
+ mips_vxworks_finish_exec_plt (output_bfd, info);
+ }
else
- mips_vxworks_finish_exec_plt (output_bfd, info);
+ {
+ BFD_ASSERT (!info->shared);
+ mips_finish_exec_plt (output_bfd, info);
+ }
}
return TRUE;
}
case bfd_mach_mips8000:
case bfd_mach_mips10000:
case bfd_mach_mips12000:
+ case bfd_mach_mips14000:
+ case bfd_mach_mips16000:
val = E_MIPS_ARCH_4;
break;
val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
break;
+ case bfd_mach_mips_loongson_3a:
+ val = E_MIPS_ARCH_64 | E_MIPS_MACH_LS3A;
+ break;
+
case bfd_mach_mips_octeon:
+ case bfd_mach_mips_octeonp:
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON;
break;
+ case bfd_mach_mips_xlr:
+ val = E_MIPS_ARCH_64 | E_MIPS_MACH_XLR;
+ break;
+
+ case bfd_mach_mips_octeon2:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
+ break;
+
case bfd_mach_mipsisa32:
val = E_MIPS_ARCH_32;
break;
case R_MIPS_GOT_DISP:
case R_MIPS_GOT_PAGE:
case R_MIPS_GOT_OFST:
+ case R_MICROMIPS_GOT16:
+ case R_MICROMIPS_CALL16:
+ case R_MICROMIPS_CALL_HI16:
+ case R_MICROMIPS_CALL_LO16:
+ case R_MICROMIPS_GOT_HI16:
+ case R_MICROMIPS_GOT_LO16:
+ case R_MICROMIPS_GOT_DISP:
+ case R_MICROMIPS_GOT_PAGE:
+ case R_MICROMIPS_GOT_OFST:
/* ??? It would seem that the existing MIPS code does no sort
of reference counting or whatnot on its GOT and PLT entries,
so it is not possible to garbage collect them at this time. */
_bfd_elf_link_hash_copy_indirect (info, dir, ind);
+ dirmips = (struct mips_elf_link_hash_entry *) dir;
+ indmips = (struct mips_elf_link_hash_entry *) ind;
+ /* Any absolute non-dynamic relocations against an indirect or weak
+ definition will be against the target symbol. */
+ if (indmips->has_static_relocs)
+ dirmips->has_static_relocs = TRUE;
+
if (ind->root.type != bfd_link_hash_indirect)
return;
- dirmips = (struct mips_elf_link_hash_entry *) dir;
- indmips = (struct mips_elf_link_hash_entry *) ind;
dirmips->possibly_dynamic_relocs += indmips->possibly_dynamic_relocs;
if (indmips->readonly_reloc)
dirmips->readonly_reloc = TRUE;
if (indmips->no_fn_stub)
dirmips->no_fn_stub = TRUE;
+ if (indmips->fn_stub)
+ {
+ dirmips->fn_stub = indmips->fn_stub;
+ indmips->fn_stub = NULL;
+ }
+ if (indmips->need_fn_stub)
+ {
+ dirmips->need_fn_stub = TRUE;
+ indmips->need_fn_stub = FALSE;
+ }
+ if (indmips->call_stub)
+ {
+ dirmips->call_stub = indmips->call_stub;
+ indmips->call_stub = NULL;
+ }
+ if (indmips->call_fp_stub)
+ {
+ dirmips->call_fp_stub = indmips->call_fp_stub;
+ indmips->call_fp_stub = NULL;
+ }
if (indmips->global_got_area < dirmips->global_got_area)
dirmips->global_got_area = indmips->global_got_area;
if (indmips->global_got_area < GGA_NONE)
indmips->global_got_area = GGA_NONE;
+ if (indmips->has_nonpic_branches)
+ dirmips->has_nonpic_branches = TRUE;
if (dirmips->tls_type == 0)
dirmips->tls_type = indmips->tls_type;
return TRUE;
}
\f
+/* microMIPS code retains local labels for linker relaxation. Omit them
+ from output by default for clarity. */
+
+bfd_boolean
+_bfd_mips_elf_is_target_special_symbol (bfd *abfd, asymbol *sym)
+{
+ return _bfd_elf_is_local_label_name (abfd, sym->name);
+}
+
/* MIPS ELF uses a special find_nearest_line routine in order the
handle the ECOFF debugging information. */
line_ptr))
return TRUE;
- if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
+ if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
+ section, symbols, offset,
filename_ptr, functionname_ptr,
- line_ptr, ABI_64_P (abfd) ? 8 : 0,
+ line_ptr, NULL, ABI_64_P (abfd) ? 8 : 0,
&elf_tdata (abfd)->dwarf2_find_line_info))
return TRUE;
line_ptr);
}
-bfd_boolean
-_bfd_mips_elf_find_inliner_info (bfd *abfd,
- const char **filename_ptr,
- const char **functionname_ptr,
- unsigned int *line_ptr)
-{
- bfd_boolean found;
- found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
- functionname_ptr, line_ptr,
- & elf_tdata (abfd)->dwarf2_find_line_info);
- return found;
-}
+bfd_boolean
+_bfd_mips_elf_find_inliner_info (bfd *abfd,
+ const char **filename_ptr,
+ const char **functionname_ptr,
+ unsigned int *line_ptr)
+{
+ bfd_boolean found;
+ found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
+ functionname_ptr, line_ptr,
+ & elf_tdata (abfd)->dwarf2_find_line_info);
+ return found;
+}
+
+\f
+/* When are writing out the .options or .MIPS.options section,
+ remember the bytes we are writing out, so that we can install the
+ GP value in the section_processing routine. */
+
+bfd_boolean
+_bfd_mips_elf_set_section_contents (bfd *abfd, sec_ptr section,
+ const void *location,
+ file_ptr offset, bfd_size_type count)
+{
+ if (MIPS_ELF_OPTIONS_SECTION_NAME_P (section->name))
+ {
+ bfd_byte *c;
+
+ if (elf_section_data (section) == NULL)
+ {
+ bfd_size_type amt = sizeof (struct bfd_elf_section_data);
+ section->used_by_bfd = bfd_zalloc (abfd, amt);
+ if (elf_section_data (section) == NULL)
+ return FALSE;
+ }
+ c = mips_elf_section_data (section)->u.tdata;
+ if (c == NULL)
+ {
+ c = bfd_zalloc (abfd, section->size);
+ if (c == NULL)
+ return FALSE;
+ mips_elf_section_data (section)->u.tdata = c;
+ }
+
+ memcpy (c + offset, location, count);
+ }
+
+ return _bfd_elf_set_section_contents (abfd, section, location, offset,
+ count);
+}
+
+/* This is almost identical to bfd_generic_get_... except that some
+ MIPS relocations need to be handled specially. Sigh. */
+
+bfd_byte *
+_bfd_elf_mips_get_relocated_section_contents
+ (bfd *abfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+ asymbol **symbols)
+{
+ /* Get enough memory to hold the stuff */
+ bfd *input_bfd = link_order->u.indirect.section->owner;
+ asection *input_section = link_order->u.indirect.section;
+ bfd_size_type sz;
+
+ long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
+ arelent **reloc_vector = NULL;
+ long reloc_count;
+
+ if (reloc_size < 0)
+ goto error_return;
+
+ reloc_vector = bfd_malloc (reloc_size);
+ if (reloc_vector == NULL && reloc_size != 0)
+ goto error_return;
+
+ /* read in the section */
+ sz = input_section->rawsize ? input_section->rawsize : input_section->size;
+ if (!bfd_get_section_contents (input_bfd, input_section, data, 0, sz))
+ goto error_return;
+
+ reloc_count = bfd_canonicalize_reloc (input_bfd,
+ input_section,
+ reloc_vector,
+ symbols);
+ if (reloc_count < 0)
+ goto error_return;
+
+ if (reloc_count > 0)
+ {
+ arelent **parent;
+ /* for mips */
+ int gp_found;
+ bfd_vma gp = 0x12345678; /* initialize just to shut gcc up */
+
+ {
+ struct bfd_hash_entry *h;
+ struct bfd_link_hash_entry *lh;
+ /* Skip all this stuff if we aren't mixing formats. */
+ if (abfd && input_bfd
+ && abfd->xvec == input_bfd->xvec)
+ lh = 0;
+ else
+ {
+ h = bfd_hash_lookup (&link_info->hash->table, "_gp", FALSE, FALSE);
+ lh = (struct bfd_link_hash_entry *) h;
+ }
+ lookup:
+ if (lh)
+ {
+ switch (lh->type)
+ {
+ case bfd_link_hash_undefined:
+ case bfd_link_hash_undefweak:
+ case bfd_link_hash_common:
+ gp_found = 0;
+ break;
+ case bfd_link_hash_defined:
+ case bfd_link_hash_defweak:
+ gp_found = 1;
+ gp = lh->u.def.value;
+ break;
+ case bfd_link_hash_indirect:
+ case bfd_link_hash_warning:
+ lh = lh->u.i.link;
+ /* @@FIXME ignoring warning for now */
+ goto lookup;
+ case bfd_link_hash_new:
+ default:
+ abort ();
+ }
+ }
+ else
+ gp_found = 0;
+ }
+ /* end mips */
+ for (parent = reloc_vector; *parent != NULL; parent++)
+ {
+ char *error_message = NULL;
+ bfd_reloc_status_type r;
+
+ /* Specific to MIPS: Deal with relocation types that require
+ knowing the gp of the output bfd. */
+ asymbol *sym = *(*parent)->sym_ptr_ptr;
+
+ /* If we've managed to find the gp and have a special
+ function for the relocation then go ahead, else default
+ to the generic handling. */
+ if (gp_found
+ && (*parent)->howto->special_function
+ == _bfd_mips_elf32_gprel16_reloc)
+ r = _bfd_mips_elf_gprel16_with_gp (input_bfd, sym, *parent,
+ input_section, relocatable,
+ data, gp);
+ else
+ r = bfd_perform_relocation (input_bfd, *parent, data,
+ input_section,
+ relocatable ? abfd : NULL,
+ &error_message);
+
+ if (relocatable)
+ {
+ asection *os = input_section->output_section;
+
+ /* A partial link, so keep the relocs */
+ os->orelocation[os->reloc_count] = *parent;
+ os->reloc_count++;
+ }
+
+ if (r != bfd_reloc_ok)
+ {
+ switch (r)
+ {
+ case bfd_reloc_undefined:
+ if (!((*link_info->callbacks->undefined_symbol)
+ (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
+ input_bfd, input_section, (*parent)->address, TRUE)))
+ goto error_return;
+ break;
+ case bfd_reloc_dangerous:
+ BFD_ASSERT (error_message != NULL);
+ if (!((*link_info->callbacks->reloc_dangerous)
+ (link_info, error_message, input_bfd, input_section,
+ (*parent)->address)))
+ goto error_return;
+ break;
+ case bfd_reloc_overflow:
+ if (!((*link_info->callbacks->reloc_overflow)
+ (link_info, NULL,
+ bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
+ (*parent)->howto->name, (*parent)->addend,
+ input_bfd, input_section, (*parent)->address)))
+ goto error_return;
+ break;
+ case bfd_reloc_outofrange:
+ default:
+ abort ();
+ break;
+ }
+
+ }
+ }
+ }
+ if (reloc_vector != NULL)
+ free (reloc_vector);
+ return data;
+
+error_return:
+ if (reloc_vector != NULL)
+ free (reloc_vector);
+ return NULL;
+}
+\f
+static bfd_boolean
+mips_elf_relax_delete_bytes (bfd *abfd,
+ asection *sec, bfd_vma addr, int count)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ unsigned int sec_shndx;
+ bfd_byte *contents;
+ Elf_Internal_Rela *irel, *irelend;
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymend;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+ struct elf_link_hash_entry **start_hashes;
+ unsigned int symcount;
+
+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+ contents = elf_section_data (sec)->this_hdr.contents;
+
+ irel = elf_section_data (sec)->relocs;
+ irelend = irel + sec->reloc_count;
+
+ /* Actually delete the bytes. */
+ memmove (contents + addr, contents + addr + count,
+ (size_t) (sec->size - addr - count));
+ sec->size -= count;
+
+ /* Adjust all the relocs. */
+ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
+ {
+ /* Get the new reloc address. */
+ if (irel->r_offset > addr)
+ irel->r_offset -= count;
+ }
+
+ BFD_ASSERT (addr % 2 == 0);
+ BFD_ASSERT (count % 2 == 0);
+
+ /* Adjust the local symbols defined in this section. */
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
+ if (isym->st_shndx == sec_shndx && isym->st_value > addr)
+ isym->st_value -= count;
+
+ /* Now adjust the global symbols defined in this section. */
+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = start_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
+
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type == bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec)
+ {
+ bfd_vma value = sym_hash->root.u.def.value;
+
+ if (ELF_ST_IS_MICROMIPS (sym_hash->other))
+ value &= MINUS_TWO;
+ if (value > addr)
+ sym_hash->root.u.def.value -= count;
+ }
+ }
+
+ return TRUE;
+}
+
+
+/* Opcodes needed for microMIPS relaxation as found in
+ opcodes/micromips-opc.c. */
+
+struct opcode_descriptor {
+ unsigned long match;
+ unsigned long mask;
+};
+
+/* The $ra register aka $31. */
+
+#define RA 31
+
+/* 32-bit instruction format register fields. */
+
+#define OP32_SREG(opcode) (((opcode) >> 16) & 0x1f)
+#define OP32_TREG(opcode) (((opcode) >> 21) & 0x1f)
+
+/* Check if a 5-bit register index can be abbreviated to 3 bits. */
+
+#define OP16_VALID_REG(r) \
+ ((2 <= (r) && (r) <= 7) || (16 <= (r) && (r) <= 17))
+
+
+/* 32-bit and 16-bit branches. */
+
+static const struct opcode_descriptor b_insns_32[] = {
+ { /* "b", "p", */ 0x40400000, 0xffff0000 }, /* bgez 0 */
+ { /* "b", "p", */ 0x94000000, 0xffff0000 }, /* beq 0, 0 */
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+static const struct opcode_descriptor bc_insn_32 =
+ { /* "bc(1|2)(ft)", "N,p", */ 0x42800000, 0xfec30000 };
+
+static const struct opcode_descriptor bz_insn_32 =
+ { /* "b(g|l)(e|t)z", "s,p", */ 0x40000000, 0xff200000 };
+
+static const struct opcode_descriptor bzal_insn_32 =
+ { /* "b(ge|lt)zal", "s,p", */ 0x40200000, 0xffa00000 };
+
+static const struct opcode_descriptor beq_insn_32 =
+ { /* "b(eq|ne)", "s,t,p", */ 0x94000000, 0xdc000000 };
+
+static const struct opcode_descriptor b_insn_16 =
+ { /* "b", "mD", */ 0xcc00, 0xfc00 };
+
+static const struct opcode_descriptor bz_insn_16 =
+ { /* "b(eq|ne)z", "md,mE", */ 0x8c00, 0xdc00 };
+
+
+/* 32-bit and 16-bit branch EQ and NE zero. */
+
+/* NOTE: All opcode tables have BEQ/BNE in the same order: first the
+ eq and second the ne. This convention is used when replacing a
+ 32-bit BEQ/BNE with the 16-bit version. */
+
+#define BZC32_REG_FIELD(r) (((r) & 0x1f) << 16)
+
+static const struct opcode_descriptor bz_rs_insns_32[] = {
+ { /* "beqz", "s,p", */ 0x94000000, 0xffe00000 },
+ { /* "bnez", "s,p", */ 0xb4000000, 0xffe00000 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+static const struct opcode_descriptor bz_rt_insns_32[] = {
+ { /* "beqz", "t,p", */ 0x94000000, 0xfc01f000 },
+ { /* "bnez", "t,p", */ 0xb4000000, 0xfc01f000 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+static const struct opcode_descriptor bzc_insns_32[] = {
+ { /* "beqzc", "s,p", */ 0x40e00000, 0xffe00000 },
+ { /* "bnezc", "s,p", */ 0x40a00000, 0xffe00000 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+static const struct opcode_descriptor bz_insns_16[] = {
+ { /* "beqz", "md,mE", */ 0x8c00, 0xfc00 },
+ { /* "bnez", "md,mE", */ 0xac00, 0xfc00 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+/* Switch between a 5-bit register index and its 3-bit shorthand. */
+
+#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2)
+#define BZ16_REG_FIELD(r) \
+ (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7)
+
+
+/* 32-bit instructions with a delay slot. */
+
+static const struct opcode_descriptor jal_insn_32_bd16 =
+ { /* "jals", "a", */ 0x74000000, 0xfc000000 };
+
+static const struct opcode_descriptor jal_insn_32_bd32 =
+ { /* "jal", "a", */ 0xf4000000, 0xfc000000 };
+
+static const struct opcode_descriptor jal_x_insn_32_bd32 =
+ { /* "jal[x]", "a", */ 0xf0000000, 0xf8000000 };
+
+static const struct opcode_descriptor j_insn_32 =
+ { /* "j", "a", */ 0xd4000000, 0xfc000000 };
+
+static const struct opcode_descriptor jalr_insn_32 =
+ { /* "jalr[.hb]", "t,s", */ 0x00000f3c, 0xfc00efff };
+
+/* This table can be compacted, because no opcode replacement is made. */
+
+static const struct opcode_descriptor ds_insns_32_bd16[] = {
+ { /* "jals", "a", */ 0x74000000, 0xfc000000 },
+
+ { /* "jalrs[.hb]", "t,s", */ 0x00004f3c, 0xfc00efff },
+ { /* "b(ge|lt)zals", "s,p", */ 0x42200000, 0xffa00000 },
+
+ { /* "b(g|l)(e|t)z", "s,p", */ 0x40000000, 0xff200000 },
+ { /* "b(eq|ne)", "s,t,p", */ 0x94000000, 0xdc000000 },
+ { /* "j", "a", */ 0xd4000000, 0xfc000000 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+/* This table can be compacted, because no opcode replacement is made. */
+
+static const struct opcode_descriptor ds_insns_32_bd32[] = {
+ { /* "jal[x]", "a", */ 0xf0000000, 0xf8000000 },
+
+ { /* "jalr[.hb]", "t,s", */ 0x00000f3c, 0xfc00efff },
+ { /* "b(ge|lt)zal", "s,p", */ 0x40200000, 0xffa00000 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+
+/* 16-bit instructions with a delay slot. */
+
+static const struct opcode_descriptor jalr_insn_16_bd16 =
+ { /* "jalrs", "my,mj", */ 0x45e0, 0xffe0 };
+
+static const struct opcode_descriptor jalr_insn_16_bd32 =
+ { /* "jalr", "my,mj", */ 0x45c0, 0xffe0 };
+
+static const struct opcode_descriptor jr_insn_16 =
+ { /* "jr", "mj", */ 0x4580, 0xffe0 };
+
+#define JR16_REG(opcode) ((opcode) & 0x1f)
+
+/* This table can be compacted, because no opcode replacement is made. */
+
+static const struct opcode_descriptor ds_insns_16_bd16[] = {
+ { /* "jalrs", "my,mj", */ 0x45e0, 0xffe0 },
+
+ { /* "b", "mD", */ 0xcc00, 0xfc00 },
+ { /* "b(eq|ne)z", "md,mE", */ 0x8c00, 0xdc00 },
+ { /* "jr", "mj", */ 0x4580, 0xffe0 },
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+
+/* LUI instruction. */
+
+static const struct opcode_descriptor lui_insn =
+ { /* "lui", "s,u", */ 0x41a00000, 0xffe00000 };
+
+
+/* ADDIU instruction. */
+
+static const struct opcode_descriptor addiu_insn =
+ { /* "addiu", "t,r,j", */ 0x30000000, 0xfc000000 };
+
+static const struct opcode_descriptor addiupc_insn =
+ { /* "addiu", "mb,$pc,mQ", */ 0x78000000, 0xfc000000 };
+
+#define ADDIUPC_REG_FIELD(r) \
+ (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 23)
+
+
+/* Relaxable instructions in a JAL delay slot: MOVE. */
+
+/* The 16-bit move has rd in 9:5 and rs in 4:0. The 32-bit moves
+ (ADDU, OR) have rd in 15:11 and rs in 10:16. */
+#define MOVE32_RD(opcode) (((opcode) >> 11) & 0x1f)
+#define MOVE32_RS(opcode) (((opcode) >> 16) & 0x1f)
+
+#define MOVE16_RD_FIELD(r) (((r) & 0x1f) << 5)
+#define MOVE16_RS_FIELD(r) (((r) & 0x1f) )
+
+static const struct opcode_descriptor move_insns_32[] = {
+ { /* "move", "d,s", */ 0x00000150, 0xffe007ff }, /* addu d,s,$0 */
+ { /* "move", "d,s", */ 0x00000290, 0xffe007ff }, /* or d,s,$0 */
+ { 0, 0 } /* End marker for find_match(). */
+};
+
+static const struct opcode_descriptor move_insn_16 =
+ { /* "move", "mp,mj", */ 0x0c00, 0xfc00 };
+
+
+/* NOP instructions. */
+
+static const struct opcode_descriptor nop_insn_32 =
+ { /* "nop", "", */ 0x00000000, 0xffffffff };
+
+static const struct opcode_descriptor nop_insn_16 =
+ { /* "nop", "", */ 0x0c00, 0xffff };
+
+
+/* Instruction match support. */
+
+#define MATCH(opcode, insn) ((opcode & insn.mask) == insn.match)
+
+static int
+find_match (unsigned long opcode, const struct opcode_descriptor insn[])
+{
+ unsigned long indx;
+
+ for (indx = 0; insn[indx].mask != 0; indx++)
+ if (MATCH (opcode, insn[indx]))
+ return indx;
+
+ return -1;
+}
+
+
+/* Branch and delay slot decoding support. */
+
+/* If PTR points to what *might* be a 16-bit branch or jump, then
+ return the minimum length of its delay slot, otherwise return 0.
+ Non-zero results are not definitive as we might be checking against
+ the second half of another instruction. */
+
+static int
+check_br16_dslot (bfd *abfd, bfd_byte *ptr)
+{
+ unsigned long opcode;
+ int bdsize;
+
+ opcode = bfd_get_16 (abfd, ptr);
+ if (MATCH (opcode, jalr_insn_16_bd32) != 0)
+ /* 16-bit branch/jump with a 32-bit delay slot. */
+ bdsize = 4;
+ else if (MATCH (opcode, jalr_insn_16_bd16) != 0
+ || find_match (opcode, ds_insns_16_bd16) >= 0)
+ /* 16-bit branch/jump with a 16-bit delay slot. */
+ bdsize = 2;
+ else
+ /* No delay slot. */
+ bdsize = 0;
+
+ return bdsize;
+}
+
+/* If PTR points to what *might* be a 32-bit branch or jump, then
+ return the minimum length of its delay slot, otherwise return 0.
+ Non-zero results are not definitive as we might be checking against
+ the second half of another instruction. */
+
+static int
+check_br32_dslot (bfd *abfd, bfd_byte *ptr)
+{
+ unsigned long opcode;
+ int bdsize;
+
+ opcode = bfd_get_micromips_32 (abfd, ptr);
+ if (find_match (opcode, ds_insns_32_bd32) >= 0)
+ /* 32-bit branch/jump with a 32-bit delay slot. */
+ bdsize = 4;
+ else if (find_match (opcode, ds_insns_32_bd16) >= 0)
+ /* 32-bit branch/jump with a 16-bit delay slot. */
+ bdsize = 2;
+ else
+ /* No delay slot. */
+ bdsize = 0;
+
+ return bdsize;
+}
+
+/* If PTR points to a 16-bit branch or jump with a 32-bit delay slot
+ that doesn't fiddle with REG, then return TRUE, otherwise FALSE. */
+
+static bfd_boolean
+check_br16 (bfd *abfd, bfd_byte *ptr, unsigned long reg)
+{
+ unsigned long opcode;
+
+ opcode = bfd_get_16 (abfd, ptr);
+ if (MATCH (opcode, b_insn_16)
+ /* B16 */
+ || (MATCH (opcode, jr_insn_16) && reg != JR16_REG (opcode))
+ /* JR16 */
+ || (MATCH (opcode, bz_insn_16) && reg != BZ16_REG (opcode))
+ /* BEQZ16, BNEZ16 */
+ || (MATCH (opcode, jalr_insn_16_bd32)
+ /* JALR16 */
+ && reg != JR16_REG (opcode) && reg != RA))
+ return TRUE;
+
+ return FALSE;
+}
+
+/* If PTR points to a 32-bit branch or jump that doesn't fiddle with REG,
+ then return TRUE, otherwise FALSE. */
+
+static bfd_boolean
+check_br32 (bfd *abfd, bfd_byte *ptr, unsigned long reg)
+{
+ unsigned long opcode;
+
+ opcode = bfd_get_micromips_32 (abfd, ptr);
+ if (MATCH (opcode, j_insn_32)
+ /* J */
+ || MATCH (opcode, bc_insn_32)
+ /* BC1F, BC1T, BC2F, BC2T */
+ || (MATCH (opcode, jal_x_insn_32_bd32) && reg != RA)
+ /* JAL, JALX */
+ || (MATCH (opcode, bz_insn_32) && reg != OP32_SREG (opcode))
+ /* BGEZ, BGTZ, BLEZ, BLTZ */
+ || (MATCH (opcode, bzal_insn_32)
+ /* BGEZAL, BLTZAL */
+ && reg != OP32_SREG (opcode) && reg != RA)
+ || ((MATCH (opcode, jalr_insn_32) || MATCH (opcode, beq_insn_32))
+ /* JALR, JALR.HB, BEQ, BNE */
+ && reg != OP32_SREG (opcode) && reg != OP32_TREG (opcode)))
+ return TRUE;
+
+ return FALSE;
+}
+
+/* If the instruction encoding at PTR and relocations [INTERNAL_RELOCS,
+ IRELEND) at OFFSET indicate that there must be a compact branch there,
+ then return TRUE, otherwise FALSE. */
+
+static bfd_boolean
+check_relocated_bzc (bfd *abfd, const bfd_byte *ptr, bfd_vma offset,
+ const Elf_Internal_Rela *internal_relocs,
+ const Elf_Internal_Rela *irelend)
+{
+ const Elf_Internal_Rela *irel;
+ unsigned long opcode;
+
+ opcode = bfd_get_micromips_32 (abfd, ptr);
+ if (find_match (opcode, bzc_insns_32) < 0)
+ return FALSE;
+
+ for (irel = internal_relocs; irel < irelend; irel++)
+ if (irel->r_offset == offset
+ && ELF32_R_TYPE (irel->r_info) == R_MICROMIPS_PC16_S1)
+ return TRUE;
+
+ return FALSE;
+}
+
+/* Bitsize checking. */
+#define IS_BITSIZE(val, N) \
+ (((((val) & ((1ULL << (N)) - 1)) ^ (1ULL << ((N) - 1))) \
+ - (1ULL << ((N) - 1))) == (val))
+
+\f
+bfd_boolean
+_bfd_mips_elf_relax_section (bfd *abfd, asection *sec,
+ struct bfd_link_info *link_info,
+ bfd_boolean *again)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ Elf_Internal_Rela *internal_relocs;
+ Elf_Internal_Rela *irel, *irelend;
+ bfd_byte *contents = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* Assume nothing changes. */
+ *again = FALSE;
+
+ /* We don't have to do anything for a relocatable link, if
+ this section does not have relocs, or if this is not a
+ code section. */
+
+ if (link_info->relocatable
+ || (sec->flags & SEC_RELOC) == 0
+ || sec->reloc_count == 0
+ || (sec->flags & SEC_CODE) == 0)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+
+ /* Get a copy of the native relocations. */
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
+ link_info->keep_memory));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ /* Walk through them looking for relaxing opportunities. */
+ irelend = internal_relocs + sec->reloc_count;
+ for (irel = internal_relocs; irel < irelend; irel++)
+ {
+ unsigned long r_symndx = ELF32_R_SYM (irel->r_info);
+ unsigned int r_type = ELF32_R_TYPE (irel->r_info);
+ bfd_boolean target_is_micromips_code_p;
+ unsigned long opcode;
+ bfd_vma symval;
+ bfd_vma pcrval;
+ bfd_byte *ptr;
+ int fndopc;
+
+ /* The number of bytes to delete for relaxation and from where
+ to delete these bytes starting at irel->r_offset. */
+ int delcnt = 0;
+ int deloff = 0;
+
+ /* If this isn't something that can be relaxed, then ignore
+ this reloc. */
+ if (r_type != R_MICROMIPS_HI16
+ && r_type != R_MICROMIPS_PC16_S1
+ && r_type != R_MICROMIPS_26_S1)
+ continue;
+
+ /* Get the section contents if we haven't done so already. */
+ if (contents == NULL)
+ {
+ /* Get cached copy if it exists. */
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ /* Go get them off disk. */
+ else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+ }
+ ptr = contents + irel->r_offset;
+
+ /* Read this BFD's local symbols if we haven't done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf + r_symndx;
+ if (isym->st_shndx == SHN_UNDEF)
+ sym_sec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ sym_sec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ sym_sec = bfd_com_section_ptr;
+ else
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = (isym->st_value
+ + sym_sec->output_section->vma
+ + sym_sec->output_offset);
+ target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (isym->st_other);
+ }
+ else
+ {
+ unsigned long indx;
+ struct elf_link_hash_entry *h;
+
+ /* An external symbol. */
+ indx = r_symndx - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ BFD_ASSERT (h != NULL);
+
+ if (h->root.type != bfd_link_hash_defined
+ && h->root.type != bfd_link_hash_defweak)
+ /* This appears to be a reference to an undefined
+ symbol. Just ignore it -- it will be caught by the
+ regular reloc processing. */
+ continue;
+
+ symval = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ target_is_micromips_code_p = (!h->needs_plt
+ && ELF_ST_IS_MICROMIPS (h->other));
+ }
+
+
+ /* For simplicity of coding, we are going to modify the
+ section contents, the section relocs, and the BFD symbol
+ table. We must tell the rest of the code not to free up this
+ information. It would be possible to instead create a table
+ of changes which have to be made, as is done in coff-mips.c;
+ that would be more work, but would require less memory when
+ the linker is run. */
+
+ /* Only 32-bit instructions relaxed. */
+ if (irel->r_offset + 4 > sec->size)
+ continue;
+
+ opcode = bfd_get_micromips_32 (abfd, ptr);
+
+ /* This is the pc-relative distance from the instruction the
+ relocation is applied to, to the symbol referred. */
+ pcrval = (symval
+ - (sec->output_section->vma + sec->output_offset)
+ - irel->r_offset);
+
+ /* R_MICROMIPS_HI16 / LUI relaxation to nil, performing relaxation
+ of corresponding R_MICROMIPS_LO16 to R_MICROMIPS_HI0_LO16 or
+ R_MICROMIPS_PC23_S2. The R_MICROMIPS_PC23_S2 condition is
+
+ (symval % 4 == 0 && IS_BITSIZE (pcrval, 25))
+
+ where pcrval has first to be adjusted to apply against the LO16
+ location (we make the adjustment later on, when we have figured
+ out the offset). */
+ if (r_type == R_MICROMIPS_HI16 && MATCH (opcode, lui_insn))
+ {
+ bfd_boolean bzc = FALSE;
+ unsigned long nextopc;
+ unsigned long reg;
+ bfd_vma offset;
+
+ /* Give up if the previous reloc was a HI16 against this symbol
+ too. */
+ if (irel > internal_relocs
+ && ELF32_R_TYPE (irel[-1].r_info) == R_MICROMIPS_HI16
+ && ELF32_R_SYM (irel[-1].r_info) == r_symndx)
+ continue;
+
+ /* Or if the next reloc is not a LO16 against this symbol. */
+ if (irel + 1 >= irelend
+ || ELF32_R_TYPE (irel[1].r_info) != R_MICROMIPS_LO16
+ || ELF32_R_SYM (irel[1].r_info) != r_symndx)
+ continue;
+
+ /* Or if the second next reloc is a LO16 against this symbol too. */
+ if (irel + 2 >= irelend
+ && ELF32_R_TYPE (irel[2].r_info) == R_MICROMIPS_LO16
+ && ELF32_R_SYM (irel[2].r_info) == r_symndx)
+ continue;
+
+ /* See if the LUI instruction *might* be in a branch delay slot.
+ We check whether what looks like a 16-bit branch or jump is
+ actually an immediate argument to a compact branch, and let
+ it through if so. */
+ if (irel->r_offset >= 2
+ && check_br16_dslot (abfd, ptr - 2)
+ && !(irel->r_offset >= 4
+ && (bzc = check_relocated_bzc (abfd,
+ ptr - 4, irel->r_offset - 4,
+ internal_relocs, irelend))))
+ continue;
+ if (irel->r_offset >= 4
+ && !bzc
+ && check_br32_dslot (abfd, ptr - 4))
+ continue;
+
+ reg = OP32_SREG (opcode);
+
+ /* We only relax adjacent instructions or ones separated with
+ a branch or jump that has a delay slot. The branch or jump
+ must not fiddle with the register used to hold the address.
+ Subtract 4 for the LUI itself. */
+ offset = irel[1].r_offset - irel[0].r_offset;
+ switch (offset - 4)
+ {
+ case 0:
+ break;
+ case 2:
+ if (check_br16 (abfd, ptr + 4, reg))
+ break;
+ continue;
+ case 4:
+ if (check_br32 (abfd, ptr + 4, reg))
+ break;
+ continue;
+ default:
+ continue;
+ }
+
+ nextopc = bfd_get_micromips_32 (abfd, contents + irel[1].r_offset);
+
+ /* Give up unless the same register is used with both
+ relocations. */
+ if (OP32_SREG (nextopc) != reg)
+ continue;
+
+ /* Now adjust pcrval, subtracting the offset to the LO16 reloc
+ and rounding up to take masking of the two LSBs into account. */
+ pcrval = ((pcrval - offset + 3) | 3) ^ 3;
+
+ /* R_MICROMIPS_LO16 relaxation to R_MICROMIPS_HI0_LO16. */
+ if (IS_BITSIZE (symval, 16))
+ {
+ /* Fix the relocation's type. */
+ irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_HI0_LO16);
+
+ /* Instructions using R_MICROMIPS_LO16 have the base or
+ source register in bits 20:16. This register becomes $0
+ (zero) as the result of the R_MICROMIPS_HI16 being 0. */
+ nextopc &= ~0x001f0000;
+ bfd_put_16 (abfd, (nextopc >> 16) & 0xffff,
+ contents + irel[1].r_offset);
+ }
+
+ /* R_MICROMIPS_LO16 / ADDIU relaxation to R_MICROMIPS_PC23_S2.
+ We add 4 to take LUI deletion into account while checking
+ the PC-relative distance. */
+ else if (symval % 4 == 0
+ && IS_BITSIZE (pcrval + 4, 25)
+ && MATCH (nextopc, addiu_insn)
+ && OP32_TREG (nextopc) == OP32_SREG (nextopc)
+ && OP16_VALID_REG (OP32_TREG (nextopc)))
+ {
+ /* Fix the relocation's type. */
+ irel[1].r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC23_S2);
+
+ /* Replace ADDIU with the ADDIUPC version. */
+ nextopc = (addiupc_insn.match
+ | ADDIUPC_REG_FIELD (OP32_TREG (nextopc)));
-\f
-/* When are writing out the .options or .MIPS.options section,
- remember the bytes we are writing out, so that we can install the
- GP value in the section_processing routine. */
+ bfd_put_micromips_32 (abfd, nextopc,
+ contents + irel[1].r_offset);
+ }
-bfd_boolean
-_bfd_mips_elf_set_section_contents (bfd *abfd, sec_ptr section,
- const void *location,
- file_ptr offset, bfd_size_type count)
-{
- if (MIPS_ELF_OPTIONS_SECTION_NAME_P (section->name))
- {
- bfd_byte *c;
+ /* Can't do anything, give up, sigh... */
+ else
+ continue;
- if (elf_section_data (section) == NULL)
- {
- bfd_size_type amt = sizeof (struct bfd_elf_section_data);
- section->used_by_bfd = bfd_zalloc (abfd, amt);
- if (elf_section_data (section) == NULL)
- return FALSE;
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (r_symndx, R_MIPS_NONE);
+
+ /* Delete the LUI instruction: 4 bytes at irel->r_offset. */
+ delcnt = 4;
+ deloff = 0;
}
- c = mips_elf_section_data (section)->u.tdata;
- if (c == NULL)
+
+ /* Compact branch relaxation -- due to the multitude of macros
+ employed by the compiler/assembler, compact branches are not
+ always generated. Obviously, this can/will be fixed elsewhere,
+ but there is no drawback in double checking it here. */
+ else if (r_type == R_MICROMIPS_PC16_S1
+ && irel->r_offset + 5 < sec->size
+ && ((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0
+ || (fndopc = find_match (opcode, bz_rt_insns_32)) >= 0)
+ && MATCH (bfd_get_16 (abfd, ptr + 4), nop_insn_16))
{
- c = bfd_zalloc (abfd, section->size);
- if (c == NULL)
- return FALSE;
- mips_elf_section_data (section)->u.tdata = c;
- }
+ unsigned long reg;
- memcpy (c + offset, location, count);
- }
+ reg = OP32_SREG (opcode) ? OP32_SREG (opcode) : OP32_TREG (opcode);
- return _bfd_elf_set_section_contents (abfd, section, location, offset,
- count);
-}
+ /* Replace BEQZ/BNEZ with the compact version. */
+ opcode = (bzc_insns_32[fndopc].match
+ | BZC32_REG_FIELD (reg)
+ | (opcode & 0xffff)); /* Addend value. */
-/* This is almost identical to bfd_generic_get_... except that some
- MIPS relocations need to be handled specially. Sigh. */
+ bfd_put_micromips_32 (abfd, opcode, ptr);
-bfd_byte *
-_bfd_elf_mips_get_relocated_section_contents
- (bfd *abfd,
- struct bfd_link_info *link_info,
- struct bfd_link_order *link_order,
- bfd_byte *data,
- bfd_boolean relocatable,
- asymbol **symbols)
-{
- /* Get enough memory to hold the stuff */
- bfd *input_bfd = link_order->u.indirect.section->owner;
- asection *input_section = link_order->u.indirect.section;
- bfd_size_type sz;
+ /* Delete the 16-bit delay slot NOP: two bytes from
+ irel->offset + 4. */
+ delcnt = 2;
+ deloff = 4;
+ }
- long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
- arelent **reloc_vector = NULL;
- long reloc_count;
+ /* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC10_S1. We need
+ to check the distance from the next instruction, so subtract 2. */
+ else if (r_type == R_MICROMIPS_PC16_S1
+ && IS_BITSIZE (pcrval - 2, 11)
+ && find_match (opcode, b_insns_32) >= 0)
+ {
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC10_S1);
- if (reloc_size < 0)
- goto error_return;
+ /* Replace the 32-bit opcode with a 16-bit opcode. */
+ bfd_put_16 (abfd,
+ (b_insn_16.match
+ | (opcode & 0x3ff)), /* Addend value. */
+ ptr);
- reloc_vector = bfd_malloc (reloc_size);
- if (reloc_vector == NULL && reloc_size != 0)
- goto error_return;
+ /* Delete 2 bytes from irel->r_offset + 2. */
+ delcnt = 2;
+ deloff = 2;
+ }
- /* read in the section */
- sz = input_section->rawsize ? input_section->rawsize : input_section->size;
- if (!bfd_get_section_contents (input_bfd, input_section, data, 0, sz))
- goto error_return;
+ /* R_MICROMIPS_PC16_S1 relaxation to R_MICROMIPS_PC7_S1. We need
+ to check the distance from the next instruction, so subtract 2. */
+ else if (r_type == R_MICROMIPS_PC16_S1
+ && IS_BITSIZE (pcrval - 2, 8)
+ && (((fndopc = find_match (opcode, bz_rs_insns_32)) >= 0
+ && OP16_VALID_REG (OP32_SREG (opcode)))
+ || ((fndopc = find_match (opcode, bz_rt_insns_32)) >= 0
+ && OP16_VALID_REG (OP32_TREG (opcode)))))
+ {
+ unsigned long reg;
- reloc_count = bfd_canonicalize_reloc (input_bfd,
- input_section,
- reloc_vector,
- symbols);
- if (reloc_count < 0)
- goto error_return;
+ reg = OP32_SREG (opcode) ? OP32_SREG (opcode) : OP32_TREG (opcode);
- if (reloc_count > 0)
- {
- arelent **parent;
- /* for mips */
- int gp_found;
- bfd_vma gp = 0x12345678; /* initialize just to shut gcc up */
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (r_symndx, R_MICROMIPS_PC7_S1);
- {
- struct bfd_hash_entry *h;
- struct bfd_link_hash_entry *lh;
- /* Skip all this stuff if we aren't mixing formats. */
- if (abfd && input_bfd
- && abfd->xvec == input_bfd->xvec)
- lh = 0;
- else
- {
- h = bfd_hash_lookup (&link_info->hash->table, "_gp", FALSE, FALSE);
- lh = (struct bfd_link_hash_entry *) h;
- }
- lookup:
- if (lh)
- {
- switch (lh->type)
- {
- case bfd_link_hash_undefined:
- case bfd_link_hash_undefweak:
- case bfd_link_hash_common:
- gp_found = 0;
- break;
- case bfd_link_hash_defined:
- case bfd_link_hash_defweak:
- gp_found = 1;
- gp = lh->u.def.value;
- break;
- case bfd_link_hash_indirect:
- case bfd_link_hash_warning:
- lh = lh->u.i.link;
- /* @@FIXME ignoring warning for now */
- goto lookup;
- case bfd_link_hash_new:
- default:
- abort ();
- }
- }
- else
- gp_found = 0;
- }
- /* end mips */
- for (parent = reloc_vector; *parent != NULL; parent++)
- {
- char *error_message = NULL;
- bfd_reloc_status_type r;
+ /* Replace the 32-bit opcode with a 16-bit opcode. */
+ bfd_put_16 (abfd,
+ (bz_insns_16[fndopc].match
+ | BZ16_REG_FIELD (reg)
+ | (opcode & 0x7f)), /* Addend value. */
+ ptr);
- /* Specific to MIPS: Deal with relocation types that require
- knowing the gp of the output bfd. */
- asymbol *sym = *(*parent)->sym_ptr_ptr;
+ /* Delete 2 bytes from irel->r_offset + 2. */
+ delcnt = 2;
+ deloff = 2;
+ }
- /* If we've managed to find the gp and have a special
- function for the relocation then go ahead, else default
- to the generic handling. */
- if (gp_found
- && (*parent)->howto->special_function
- == _bfd_mips_elf32_gprel16_reloc)
- r = _bfd_mips_elf_gprel16_with_gp (input_bfd, sym, *parent,
- input_section, relocatable,
- data, gp);
- else
- r = bfd_perform_relocation (input_bfd, *parent, data,
- input_section,
- relocatable ? abfd : NULL,
- &error_message);
+ /* R_MICROMIPS_26_S1 -- JAL to JALS relaxation for microMIPS targets. */
+ else if (r_type == R_MICROMIPS_26_S1
+ && target_is_micromips_code_p
+ && irel->r_offset + 7 < sec->size
+ && MATCH (opcode, jal_insn_32_bd32))
+ {
+ unsigned long n32opc;
+ bfd_boolean relaxed = FALSE;
- if (relocatable)
+ n32opc = bfd_get_micromips_32 (abfd, ptr + 4);
+
+ if (MATCH (n32opc, nop_insn_32))
{
- asection *os = input_section->output_section;
+ /* Replace delay slot 32-bit NOP with a 16-bit NOP. */
+ bfd_put_16 (abfd, nop_insn_16.match, ptr + 4);
- /* A partial link, so keep the relocs */
- os->orelocation[os->reloc_count] = *parent;
- os->reloc_count++;
+ relaxed = TRUE;
}
+ else if (find_match (n32opc, move_insns_32) >= 0)
+ {
+ /* Replace delay slot 32-bit MOVE with 16-bit MOVE. */
+ bfd_put_16 (abfd,
+ (move_insn_16.match
+ | MOVE16_RD_FIELD (MOVE32_RD (n32opc))
+ | MOVE16_RS_FIELD (MOVE32_RS (n32opc))),
+ ptr + 4);
+
+ relaxed = TRUE;
+ }
+ /* Other 32-bit instructions relaxable to 16-bit
+ instructions will be handled here later. */
- if (r != bfd_reloc_ok)
+ if (relaxed)
{
- switch (r)
- {
- case bfd_reloc_undefined:
- if (!((*link_info->callbacks->undefined_symbol)
- (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
- input_bfd, input_section, (*parent)->address, TRUE)))
- goto error_return;
- break;
- case bfd_reloc_dangerous:
- BFD_ASSERT (error_message != NULL);
- if (!((*link_info->callbacks->reloc_dangerous)
- (link_info, error_message, input_bfd, input_section,
- (*parent)->address)))
- goto error_return;
- break;
- case bfd_reloc_overflow:
- if (!((*link_info->callbacks->reloc_overflow)
- (link_info, NULL,
- bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
- (*parent)->howto->name, (*parent)->addend,
- input_bfd, input_section, (*parent)->address)))
- goto error_return;
- break;
- case bfd_reloc_outofrange:
- default:
- abort ();
- break;
- }
+ /* JAL with 32-bit delay slot that is changed to a JALS
+ with 16-bit delay slot. */
+ bfd_put_micromips_32 (abfd, jal_insn_32_bd16.match, ptr);
+ /* Delete 2 bytes from irel->r_offset + 6. */
+ delcnt = 2;
+ deloff = 6;
}
}
+
+ if (delcnt != 0)
+ {
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Delete bytes depending on the delcnt and deloff. */
+ if (!mips_elf_relax_delete_bytes (abfd, sec,
+ irel->r_offset + deloff, delcnt))
+ goto error_return;
+
+ /* That will change things, so we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
}
- if (reloc_vector != NULL)
- free (reloc_vector);
- return data;
-error_return:
- if (reloc_vector != NULL)
- free (reloc_vector);
- return NULL;
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ {
+ if (! link_info->keep_memory)
+ free (isymbuf);
+ else
+ {
+ /* Cache the symbols for elf_link_input_bfd. */
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+ }
+ }
+
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ {
+ if (! link_info->keep_memory)
+ free (contents);
+ else
+ {
+ /* Cache the section contents for elf_link_input_bfd. */
+ elf_section_data (sec)->this_hdr.contents = contents;
+ }
+ }
+
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return TRUE;
+
+ error_return:
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return FALSE;
}
\f
/* Create a MIPS ELF linker hash table. */
if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
mips_elf_link_hash_newfunc,
- sizeof (struct mips_elf_link_hash_entry)))
+ sizeof (struct mips_elf_link_hash_entry),
+ MIPS_ELF_DATA))
{
free (ret);
return NULL;
ret->procedure_count = 0;
ret->compact_rel_size = 0;
ret->use_rld_obj_head = FALSE;
- ret->rld_value = 0;
+ ret->rld_symbol = NULL;
ret->mips16_stubs_seen = FALSE;
+ ret->use_plts_and_copy_relocs = FALSE;
ret->is_vxworks = FALSE;
ret->small_data_overflow_reported = FALSE;
ret->srelbss = NULL;
ret->plt_entry_size = 0;
ret->lazy_stub_count = 0;
ret->function_stub_size = 0;
+ ret->strampoline = NULL;
+ ret->la25_stubs = NULL;
+ ret->add_stub_section = NULL;
return &ret->root.root;
}
struct mips_elf_link_hash_table *htab;
htab = (struct mips_elf_link_hash_table *) ret;
- htab->is_vxworks = 1;
+ htab->use_plts_and_copy_relocs = TRUE;
+ htab->is_vxworks = TRUE;
}
return ret;
}
+
+/* A function that the linker calls if we are allowed to use PLTs
+ and copy relocs. */
+
+void
+_bfd_mips_elf_use_plts_and_copy_relocs (struct bfd_link_info *info)
+{
+ mips_elf_hash_table (info)->use_plts_and_copy_relocs = TRUE;
+}
\f
/* We need to use a special link routine to handle the .reginfo and
the .mdebug sections. We need to merge all instances of these
asection *rtproc_sec;
Elf32_RegInfo reginfo;
struct ecoff_debug_info debug;
+ struct mips_htab_traverse_info hti;
const struct elf_backend_data *bed = get_elf_backend_data (abfd);
const struct ecoff_debug_swap *swap = bed->elf_backend_ecoff_debug_swap;
HDRR *symhdr = &debug.symbolic_header;
/* Sort the dynamic symbols so that those with GOT entries come after
those without. */
htab = mips_elf_hash_table (info);
+ BFD_ASSERT (htab != NULL);
+
if (!mips_elf_sort_hash_table (abfd, info))
return FALSE;
+ /* Create any scheduled LA25 stubs. */
+ hti.info = info;
+ hti.output_bfd = abfd;
+ hti.error = FALSE;
+ htab_traverse (htab->la25_stubs, mips_elf_create_la25_stub, &hti);
+ if (hti.error)
+ return FALSE;
+
/* Get a value for the GP register. */
if (elf_gp (abfd) == 0)
{
input_section = p->u.indirect.section;
input_bfd = input_section->owner;
- if (bfd_get_flavour (input_bfd) != bfd_target_elf_flavour
- || (get_elf_backend_data (input_bfd)
- ->elf_backend_ecoff_debug_swap) == NULL)
+ if (!is_mips_elf (input_bfd))
{
/* I don't know what a non MIPS ELF bfd would be
doing with a .mdebug section, but I don't really
if (SGI_COMPAT (abfd) && info->shared)
{
/* Create .rtproc section. */
- rtproc_sec = bfd_get_section_by_name (abfd, ".rtproc");
+ rtproc_sec = bfd_get_linker_section (abfd, ".rtproc");
if (rtproc_sec == NULL)
{
flagword flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY
| SEC_LINKER_CREATED | SEC_READONLY);
- rtproc_sec = bfd_make_section_with_flags (abfd,
- ".rtproc",
- flags);
+ rtproc_sec = bfd_make_section_anyway_with_flags (abfd,
+ ".rtproc",
+ flags);
if (rtproc_sec == NULL
|| ! bfd_set_section_alignment (abfd, rtproc_sec, 4))
return FALSE;
static const struct mips_mach_extension mips_mach_extensions[] = {
/* MIPS64r2 extensions. */
+ { bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
+ { bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
{ bfd_mach_mips_sb1, bfd_mach_mipsisa64 },
+ { bfd_mach_mips_xlr, bfd_mach_mipsisa64 },
+ { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64 },
/* MIPS V extensions. */
{ bfd_mach_mipsisa64, bfd_mach_mips5 },
/* R10000 extensions. */
{ bfd_mach_mips12000, bfd_mach_mips10000 },
+ { bfd_mach_mips14000, bfd_mach_mips10000 },
+ { bfd_mach_mips16000, bfd_mach_mips10000 },
/* R5000 extensions. Note: the vr5500 ISA is an extension of the core
vr5400 ISA, but doesn't include the multimedia stuff. It seems
bfd_boolean null_input_bfd = TRUE;
asection *sec;
- /* Check if we have the same endianess */
+ /* Check if we have the same endianness. */
if (! _bfd_generic_verify_endian_match (ibfd, obfd))
{
(*_bfd_error_handler)
return FALSE;
}
- if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
- || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
+ if (!is_mips_elf (ibfd) || !is_mips_elf (obfd))
return TRUE;
if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0)
new_flags &= ~EF_MIPS_UCODE;
old_flags &= ~EF_MIPS_UCODE;
- /* Don't care about the PIC flags from dynamic objects; they are
- PIC by design. */
- if ((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0
- && (ibfd->flags & DYNAMIC) != 0)
- new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC);
+ /* DSOs should only be linked with CPIC code. */
+ if ((ibfd->flags & DYNAMIC) != 0)
+ new_flags |= EF_MIPS_PIC | EF_MIPS_CPIC;
if (new_flags == old_flags)
return TRUE;
for (sec = ibfd->sections; sec != NULL; sec = sec->next)
{
/* Ignore synthetic sections and empty .text, .data and .bss sections
- which are automatically generated by gas. */
- if (strcmp (sec->name, ".reginfo")
+ which are automatically generated by gas. Also ignore fake
+ (s)common sections, since merely defining a common symbol does
+ not affect compatibility. */
+ if ((sec->flags & SEC_IS_COMMON) == 0
+ && strcmp (sec->name, ".reginfo")
&& strcmp (sec->name, ".mdebug")
&& (sec->size != 0
|| (strcmp (sec->name, ".text")
!= ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0))
{
(*_bfd_error_handler)
- (_("%B: warning: linking PIC files with non-PIC files"),
+ (_("%B: warning: linking abicalls files with non-abicalls files"),
ibfd);
ok = TRUE;
}
old_flags &= ~EF_MIPS_ABI;
}
- /* For now, allow arbitrary mixing of ASEs (retain the union). */
+ /* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together
+ and allow arbitrary mixing of the remaining ASEs (retain the union). */
if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE))
{
+ int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
+ int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS;
+ int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16;
+ int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16;
+ int micro_mis = old_m16 && new_micro;
+ int m16_mis = old_micro && new_m16;
+
+ if (m16_mis || micro_mis)
+ {
+ (*_bfd_error_handler)
+ (_("%B: ASE mismatch: linking %s module with previous %s modules"),
+ ibfd,
+ m16_mis ? "MIPS16" : "microMIPS",
+ m16_mis ? "microMIPS" : "MIPS16");
+ ok = FALSE;
+ }
+
elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE;
new_flags &= ~ EF_MIPS_ARCH_ASE;
return "DT_MIPS_GP_VALUE";
case DT_MIPS_AUX_DYNAMIC:
return "DT_MIPS_AUX_DYNAMIC";
+ case DT_MIPS_PLTGOT:
+ return "DT_MIPS_PLTGOT";
+ case DT_MIPS_RWPLT:
+ return "DT_MIPS_RWPLT";
}
}
if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_M16)
fprintf (file, " [mips16]");
+ if (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH_ASE_MICROMIPS)
+ fprintf (file, " [micromips]");
+
if (elf_elfheader (abfd)->e_flags & EF_MIPS_32BITMODE)
fprintf (file, " [32bitmode]");
else
|| sym->st_shndx == SHN_MIPS_ACOMMON
|| sym->st_shndx == SHN_MIPS_SCOMMON);
}
+
+/* Return address for Ith PLT stub in section PLT, for relocation REL
+ or (bfd_vma) -1 if it should not be included. */
+
+bfd_vma
+_bfd_mips_elf_plt_sym_val (bfd_vma i, const asection *plt,
+ const arelent *rel ATTRIBUTE_UNUSED)
+{
+ return (plt->vma
+ + 4 * ARRAY_SIZE (mips_o32_exec_plt0_entry)
+ + i * 4 * ARRAY_SIZE (mips_exec_plt_entry));
+}
+
+void
+_bfd_mips_post_process_headers (bfd *abfd, struct bfd_link_info *link_info)
+{
+ struct mips_elf_link_hash_table *htab;
+ Elf_Internal_Ehdr *i_ehdrp;
+
+ i_ehdrp = elf_elfheader (abfd);
+ if (link_info)
+ {
+ htab = mips_elf_hash_table (link_info);
+ BFD_ASSERT (htab != NULL);
+
+ if (htab->use_plts_and_copy_relocs && !htab->is_vxworks)
+ i_ehdrp->e_ident[EI_ABIVERSION] = 1;
+ }
+}