/* BFD support for handling relocation entries.
- Copyright (C) 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
+ Copyright (C) 1990, 91, 92, 93, 94, 95, 1996, 1997
+ Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/*
SECTION
. bfd_vma addend;
.
. {* Pointer to how to perform the required relocation *}
-. const struct reloc_howto_struct *howto;
+. reloc_howto_type *howto;
.
.} arelent;
type which modifies the bottom two bytes of a four byte word
would not touch the first byte pointed to in a big endian
world.
-
+
o <<addend>>
The <<addend>> is a value provided by the back end to be added (!)
CODE_FRAGMENT
.struct symbol_cache_entry; {* Forward declaration *}
.
-.typedef unsigned char bfd_byte;
-.typedef const struct reloc_howto_struct reloc_howto_type;
-.
.struct reloc_howto_struct
.{
. {* The type field has mainly a documetary use - the back end can
case 2: return 4;
case 3: return 0;
case 4: return 8;
+ case 8: return 16;
case -2: return 4;
default: abort ();
}
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
&& strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
+ && strcmp (abfd->xvec->name, "xcoff-powermac") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
machine word.
FIXME: We should also do overflow checking on the result after
adding in the value contained in the object file. */
- if (howto->complain_on_overflow != complain_overflow_dont)
+ if (howto->complain_on_overflow != complain_overflow_dont
+ && flag == bfd_reloc_ok)
{
bfd_vma check;
/* Get the value that will be used for the relocation, but
starting at bit position zero. */
- if (howto->rightshift > howto->bitpos)
- check = relocation >> (howto->rightshift - howto->bitpos);
- else
- check = relocation << (howto->bitpos - howto->rightshift);
+ check = relocation >> howto->rightshift;
switch (howto->complain_on_overflow)
{
case complain_overflow_signed:
/* The above right shift is incorrect for a signed value.
Fix it up by forcing on the upper bits. */
- if (howto->rightshift > howto->bitpos
+ if (howto->rightshift > 0
&& (bfd_signed_vma) relocation < 0)
check |= ((bfd_vma) - 1
& ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
+ >> howto->rightshift));
if ((bfd_signed_vma) check > reloc_signed_max
|| (bfd_signed_vma) check < reloc_signed_min)
flag = bfd_reloc_overflow;
/* The above right shift is incorrect for a signed
value. See if turning on the upper bits fixes the
overflow. */
- if (howto->rightshift > howto->bitpos
+ if (howto->rightshift > 0
&& (bfd_signed_vma) relocation < 0)
{
check |= ((bfd_vma) - 1
& ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
+ >> howto->rightshift));
if (((bfd_vma) check & ~reloc_bits) != (-1 & ~reloc_bits))
flag = bfd_reloc_overflow;
}
break;
case 1:
- if (relocation)
- {
- short x = bfd_get_16 (abfd, (bfd_byte *) data + addr);
- DOIT (x);
- bfd_put_16 (abfd, x, (unsigned char *) data + addr);
- }
+ {
+ short x = bfd_get_16 (abfd, (bfd_byte *) data + addr);
+ DOIT (x);
+ bfd_put_16 (abfd, x, (unsigned char *) data + addr);
+ }
break;
case 2:
- if (relocation)
- {
- long x = bfd_get_32 (abfd, (bfd_byte *) data + addr);
- DOIT (x);
- bfd_put_32 (abfd, x, (bfd_byte *) data + addr);
- }
+ {
+ long x = bfd_get_32 (abfd, (bfd_byte *) data + addr);
+ DOIT (x);
+ bfd_put_32 (abfd, x, (bfd_byte *) data + addr);
+ }
break;
case -2:
{
}
break;
+ case -1:
+ {
+ long x = bfd_get_16 (abfd, (bfd_byte *) data + addr);
+ relocation = -relocation;
+ DOIT (x);
+ bfd_put_16 (abfd, x, (bfd_byte *) data + addr);
+ }
+ break;
+
case 3:
/* Do nothing */
break;
case 4:
#ifdef BFD64
- if (relocation)
- {
- bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + addr);
- DOIT (x);
- bfd_put_64 (abfd, x, (bfd_byte *) data + addr);
- }
+ {
+ bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + addr);
+ DOIT (x);
+ bfd_put_64 (abfd, x, (bfd_byte *) data + addr);
+ }
#else
abort ();
#endif
{
/* This is a partial relocation, but inplace, so modify the
reloc record a bit.
-
+
If we've relocated with a symbol with a section, change
into a ref to the section belonging to the symbol. */
-
+
reloc_entry->address += input_section->output_offset;
-
+
/* WTF?? */
if (abfd->xvec->flavour == bfd_target_coff_flavour
&& strcmp (abfd->xvec->name, "aixcoff-rs6000") != 0
+ && strcmp (abfd->xvec->name, "xcoff-powermac") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-little") != 0
&& strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
{
/* For m68k-coff, the addend was being subtracted twice during
relocation with -r. Removing the line below this comment
fixes that problem; see PR 2953.
-
+
However, Ian wrote the following, regarding removing the line below,
which explains why it is still enabled: --djm
-
+
If you put a patch like that into BFD you need to check all the COFF
linkers. I am fairly certain that patch will break coff-i386 (e.g.,
SCO); see coff_i386_reloc in coff-i386.c where I worked around the
/* Get the value that will be used for the relocation, but
starting at bit position zero. */
- if (howto->rightshift > howto->bitpos)
- check = relocation >> (howto->rightshift - howto->bitpos);
- else
- check = relocation << (howto->bitpos - howto->rightshift);
+ check = relocation >> howto->rightshift;
switch (howto->complain_on_overflow)
{
case complain_overflow_signed:
/* The above right shift is incorrect for a signed value.
Fix it up by forcing on the upper bits. */
- if (howto->rightshift > howto->bitpos
+ if (howto->rightshift > 0
&& (bfd_signed_vma) relocation < 0)
check |= ((bfd_vma) - 1
& ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
+ >> howto->rightshift));
if ((bfd_signed_vma) check > reloc_signed_max
|| (bfd_signed_vma) check < reloc_signed_min)
flag = bfd_reloc_overflow;
/* The above right shift is incorrect for a signed
value. See if turning on the upper bits fixes the
overflow. */
- if (howto->rightshift > howto->bitpos
+ if (howto->rightshift > 0
&& (bfd_signed_vma) relocation < 0)
{
check |= ((bfd_vma) - 1
& ~((bfd_vma) - 1
- >> (howto->rightshift - howto->bitpos)));
+ >> howto->rightshift));
if (((bfd_vma) check & ~reloc_bits) != (-1 & ~reloc_bits))
flag = bfd_reloc_overflow;
}
break;
case 1:
- if (relocation)
- {
- short x = bfd_get_16 (abfd, (bfd_byte *) data);
- DOIT (x);
- bfd_put_16 (abfd, x, (unsigned char *) data);
- }
+ {
+ short x = bfd_get_16 (abfd, (bfd_byte *) data);
+ DOIT (x);
+ bfd_put_16 (abfd, x, (unsigned char *) data);
+ }
break;
case 2:
- if (relocation)
- {
- long x = bfd_get_32 (abfd, (bfd_byte *) data);
- DOIT (x);
- bfd_put_32 (abfd, x, (bfd_byte *) data);
- }
+ {
+ long x = bfd_get_32 (abfd, (bfd_byte *) data);
+ DOIT (x);
+ bfd_put_32 (abfd, x, (bfd_byte *) data);
+ }
break;
case -2:
{
break;
case 4:
- if (relocation)
- {
- bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data);
- DOIT (x);
- bfd_put_64 (abfd, x, (bfd_byte *) data);
- }
+ {
+ bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data);
+ DOIT (x);
+ bfd_put_64 (abfd, x, (bfd_byte *) data);
+ }
break;
default:
return bfd_reloc_other;
bfd_vma relocation;
/* Sanity check the address. */
- if (address > input_section->_cooked_size)
+ if (address > input_section->_raw_size)
return bfd_reloc_outofrange;
/* This function assumes that we are dealing with a basic relocation
BFD_RELOC_32
ENUMX
BFD_RELOC_26
+ENUMX
+ BFD_RELOC_24
ENUMX
BFD_RELOC_16
ENUMX
The 24-bit relocation is used in some Intel 960 configurations.
+ENUM
+ BFD_RELOC_32_GOT_PCREL
+ENUMX
+ BFD_RELOC_16_GOT_PCREL
+ENUMX
+ BFD_RELOC_8_GOT_PCREL
+ENUMX
+ BFD_RELOC_32_GOTOFF
+ENUMX
+ BFD_RELOC_16_GOTOFF
+ENUMX
+ BFD_RELOC_LO16_GOTOFF
+ENUMX
+ BFD_RELOC_HI16_GOTOFF
+ENUMX
+ BFD_RELOC_HI16_S_GOTOFF
+ENUMX
+ BFD_RELOC_8_GOTOFF
+ENUMX
+ BFD_RELOC_32_PLT_PCREL
+ENUMX
+ BFD_RELOC_24_PLT_PCREL
+ENUMX
+ BFD_RELOC_16_PLT_PCREL
+ENUMX
+ BFD_RELOC_8_PLT_PCREL
+ENUMX
+ BFD_RELOC_32_PLTOFF
+ENUMX
+ BFD_RELOC_16_PLTOFF
+ENUMX
+ BFD_RELOC_LO16_PLTOFF
+ENUMX
+ BFD_RELOC_HI16_PLTOFF
+ENUMX
+ BFD_RELOC_HI16_S_PLTOFF
+ENUMX
+ BFD_RELOC_8_PLTOFF
+ENUMDOC
+ For ELF.
+
+ENUM
+ BFD_RELOC_68K_GLOB_DAT
+ENUMX
+ BFD_RELOC_68K_JMP_SLOT
+ENUMX
+ BFD_RELOC_68K_RELATIVE
+ENUMDOC
+ Relocations used by 68K ELF.
+
ENUM
BFD_RELOC_32_BASEREL
ENUMX
BFD_RELOC_16_BASEREL
+ENUMX
+ BFD_RELOC_LO16_BASEREL
+ENUMX
+ BFD_RELOC_HI16_BASEREL
+ENUMX
+ BFD_RELOC_HI16_S_BASEREL
ENUMX
BFD_RELOC_8_BASEREL
+ENUMX
+ BFD_RELOC_RVA
ENUMDOC
Linkage-table relative.
ENUMX
BFD_RELOC_SPARC_GLOB_JMP
ENUMX
- BFD_RELOC_SPARC_LO7
+ BFD_RELOC_SPARC_7
+ENUMX
+ BFD_RELOC_SPARC_6
+ENUMX
+ BFD_RELOC_SPARC_5
ENUMDOC
Some relocations we're using for SPARC V9 -- subject to change.
ENUM
BFD_RELOC_ALPHA_GPDISP_HI16
ENUMDOC
- Alpha ECOFF relocations. Some of these treat the symbol or "addend"
- in some special way.
+ Alpha ECOFF and ELF relocations. Some of these treat the symbol or
+ "addend" in some special way.
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol. The
addend is the displacement in bytes of the "lda" instruction from
relocations out, and is filled in with the file's GP value on
reading, for convenience.
+ENUM
+ BFD_RELOC_ALPHA_GPDISP
+ENUMDOC
+ The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+ relocation except that there is no accompanying GPDISP_LO16
+ relocation.
+
ENUM
BFD_RELOC_ALPHA_LITERAL
+ENUMX
+ BFD_RELOC_ALPHA_ELF_LITERAL
ENUMX
BFD_RELOC_ALPHA_LITUSE
ENUMDOC
in with the file's GP value on reading, for convenience, as with the
GPDISP_LO16 reloc.
+ The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
+ It should refer to the symbol to be referenced, as with 16_GOTOFF,
+ but it generates output not based on the position within the .got
+ section, but relative to the GP value chosen for the file during the
+ final link stage.
+
The LITUSE reloc, on the instruction using the loaded address, gives
information to the linker that it might be able to use to optimize
away some literal section references. The symbol is ignored (read
"hint" field of a jmp/jsr/ret instruction, for possible branch-
prediction logic which may be provided on some processors.
+ENUM
+ BFD_RELOC_ALPHA_LINKAGE
+ENUMDOC
+ The LINKAGE relocation outputs a linkage pair in the object file,
+ which is filled by the linker.
+
ENUM
BFD_RELOC_MIPS_JMP
ENUMDOC
Bits 27..2 of the relocation address shifted right 2 bits;
simple reloc otherwise.
+ENUM
+ BFD_RELOC_MIPS16_JMP
+ENUMDOC
+ The MIPS16 jump instruction.
+
+ENUM
+ BFD_RELOC_MIPS16_GPREL
+ENUMDOC
+ MIPS16 GP relative reloc.
+
ENUM
BFD_RELOC_HI16
ENUMDOC
ENUMEQX
BFD_RELOC_MIPS_GPREL32
BFD_RELOC_GPREL32
+ENUMX
+ BFD_RELOC_MIPS_GOT_HI16
+ENUMX
+ BFD_RELOC_MIPS_GOT_LO16
+ENUMX
+ BFD_RELOC_MIPS_CALL_HI16
+ENUMX
+ BFD_RELOC_MIPS_CALL_LO16
ENUMDOC
MIPS ELF relocations.
ENUM
BFD_RELOC_PPC_B26
-ENUMDOC
- PowerPC/POWER (RS/6000) relocs.
- 26 bit relative branch. Low two bits must be zero. High 24
- bits installed in bits 6 through 29 of instruction.
-ENUM
+ENUMX
BFD_RELOC_PPC_BA26
-ENUMDOC
- 26 bit absolute branch, like BFD_RELOC_PPC_B26 but absolute.
-ENUM
+ENUMX
BFD_RELOC_PPC_TOC16
+ENUMX
+ BFD_RELOC_PPC_B16
+ENUMX
+ BFD_RELOC_PPC_B16_BRTAKEN
+ENUMX
+ BFD_RELOC_PPC_B16_BRNTAKEN
+ENUMX
+ BFD_RELOC_PPC_BA16
+ENUMX
+ BFD_RELOC_PPC_BA16_BRTAKEN
+ENUMX
+ BFD_RELOC_PPC_BA16_BRNTAKEN
+ENUMX
+ BFD_RELOC_PPC_COPY
+ENUMX
+ BFD_RELOC_PPC_GLOB_DAT
+ENUMX
+ BFD_RELOC_PPC_JMP_SLOT
+ENUMX
+ BFD_RELOC_PPC_RELATIVE
+ENUMX
+ BFD_RELOC_PPC_LOCAL24PC
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR32
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16_LO
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16_HI
+ENUMX
+ BFD_RELOC_PPC_EMB_NADDR16_HA
+ENUMX
+ BFD_RELOC_PPC_EMB_SDAI16
+ENUMX
+ BFD_RELOC_PPC_EMB_SDA2I16
+ENUMX
+ BFD_RELOC_PPC_EMB_SDA2REL
+ENUMX
+ BFD_RELOC_PPC_EMB_SDA21
+ENUMX
+ BFD_RELOC_PPC_EMB_MRKREF
+ENUMX
+ BFD_RELOC_PPC_EMB_RELSEC16
+ENUMX
+ BFD_RELOC_PPC_EMB_RELST_LO
+ENUMX
+ BFD_RELOC_PPC_EMB_RELST_HI
+ENUMX
+ BFD_RELOC_PPC_EMB_RELST_HA
+ENUMX
+ BFD_RELOC_PPC_EMB_BIT_FLD
+ENUMX
+ BFD_RELOC_PPC_EMB_RELSDA
ENUMDOC
- 16 bit TOC relative reference.
+ Power(rs6000) and PowerPC relocations.
ENUM
BFD_RELOC_CTOR
BFD_RELOC_ARM_MULTI
ENUMX
BFD_RELOC_ARM_CP_OFF_IMM
+ENUMX
+ BFD_RELOC_ARM_ADR_IMM
+ENUMX
+ BFD_RELOC_ARM_LDR_IMM
+ENUMX
+ BFD_RELOC_ARM_LITERAL
+ENUMX
+ BFD_RELOC_ARM_IN_POOL
+ENUMX
+ BFD_RELOC_ARM_OFFSET_IMM8
+ENUMX
+ BFD_RELOC_ARM_HWLITERAL
+ENUMX
+ BFD_RELOC_ARM_THUMB_ADD
+ENUMX
+ BFD_RELOC_ARM_THUMB_IMM
+ENUMX
+ BFD_RELOC_ARM_THUMB_SHIFT
+ENUMX
+ BFD_RELOC_ARM_THUMB_OFFSET
ENUMDOC
These relocs are only used within the ARM assembler. They are not
(at present) written to any object files.
+ENUM
+ BFD_RELOC_SH_PCDISP8BY2
+ENUMX
+ BFD_RELOC_SH_PCDISP12BY2
+ENUMX
+ BFD_RELOC_SH_IMM4
+ENUMX
+ BFD_RELOC_SH_IMM4BY2
+ENUMX
+ BFD_RELOC_SH_IMM4BY4
+ENUMX
+ BFD_RELOC_SH_IMM8
+ENUMX
+ BFD_RELOC_SH_IMM8BY2
+ENUMX
+ BFD_RELOC_SH_IMM8BY4
+ENUMX
+ BFD_RELOC_SH_PCRELIMM8BY2
+ENUMX
+ BFD_RELOC_SH_PCRELIMM8BY4
+ENUMX
+ BFD_RELOC_SH_SWITCH16
+ENUMX
+ BFD_RELOC_SH_SWITCH32
+ENUMX
+ BFD_RELOC_SH_USES
+ENUMX
+ BFD_RELOC_SH_COUNT
+ENUMX
+ BFD_RELOC_SH_ALIGN
+ENUMX
+ BFD_RELOC_SH_CODE
+ENUMX
+ BFD_RELOC_SH_DATA
+ENUMX
+ BFD_RELOC_SH_LABEL
+ENUMDOC
+ Hitachi SH relocs. Not all of these appear in object files.
+
COMMENT
{* start-sanitize-arc *}
ENUM
ENUMDOC
Argonaut RISC Core (ARC) relocs.
ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
- not stored in the instruction. High 20 bits installed in bits 7 through 26
- of instruction.
+ not stored in the instruction. The high 20 bits are installed in bits 26
+ through 7 of the instruction.
+ENUM
+ BFD_RELOC_ARC_B26
+ENUMDOC
+ ARC 26 bit absolute branch. The lowest two bits must be zero and are not
+ stored in the instruction. The high 24 bits are installed in bits 23
+ through 0.
COMMENT
{* end-sanitize-arc *}
+COMMENT
+{* start-sanitize-d10v *}
+ENUM
+ BFD_RELOC_D10V_10_PCREL_R
+ENUMDOC
+ Mitsubishi D10V relocs.
+ This is a 10-bit reloc with the right 2 bits
+ assumed to be 0.
+ENUM
+ BFD_RELOC_D10V_10_PCREL_L
+ENUMDOC
+ Mitsubishi D10V relocs.
+ This is a 10-bit reloc with the right 2 bits
+ assumed to be 0. This is the same as the previous reloc
+ except it is in the left container, i.e.,
+ shifted left 15 bits.
+ENUM
+ BFD_RELOC_D10V_18
+ENUMDOC
+ This is an 18-bit reloc with the right 2 bits
+ assumed to be 0.
+ENUM
+ BFD_RELOC_D10V_18_PCREL
+ENUMDOC
+ This is an 18-bit reloc with the right 2 bits
+ assumed to be 0.
+COMMENT
+{* end-sanitize-d10v *}
+
+COMMENT
+{* start-sanitize-m32r *}
+ENUM
+ BFD_RELOC_M32R_24
+ENUMDOC
+ Mitsubishi M32R relocs.
+ This is a 24 bit absolute address.
+ENUM
+ BFD_RELOC_M32R_10_PCREL
+ENUMDOC
+ This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
+ENUM
+ BFD_RELOC_M32R_18_PCREL
+ENUMDOC
+ This is an 18-bit reloc with the right 2 bits assumed to be 0.
+ENUM
+ BFD_RELOC_M32R_26_PCREL
+ENUMDOC
+ This is a 26-bit reloc with the right 2 bits assumed to be 0.
+ENUM
+ BFD_RELOC_M32R_HI16_ULO
+ENUMDOC
+ This is a 16-bit reloc containing the high 16 bits of an address
+ used when the lower 16 bits are treated as unsigned.
+ENUM
+ BFD_RELOC_M32R_HI16_SLO
+ENUMDOC
+ This is a 16-bit reloc containing the high 16 bits of an address
+ used when the lower 16 bits are treated as signed.
+ENUM
+ BFD_RELOC_M32R_LO16
+ENUMDOC
+ This is a 16-bit reloc containing the lower 16 bits of an address.
+COMMENT
+{* end-sanitize-m32r *}
+
+COMMENT
+{* start-sanitize-v850 *}
+ENUM
+ BFD_RELOC_V850_9_PCREL
+ENUMDOC
+ This is a 9-bit reloc
+ENUM
+ BFD_RELOC_V850_22_PCREL
+ENUMDOC
+ This is a 22-bit reloc
+ENUM
+ BFD_RELOC_V850_SDA_OFFSET
+ENUMDOC
+ This is an offset from the short data area pointer..
+ENUM
+ BFD_RELOC_V850_ZDA_OFFSET
+ENUMDOC
+ This is an offset from the zero data area pointer..
+ENUM
+ BFD_RELOC_V850_TDA_OFFSET
+ENUMDOC
+ This is an offset from the tiny data area pointer..
+COMMENT
+{* end-sanitize-v850 *}
+
+ENUM
+ BFD_RELOC_MN10300_32_PCREL
+ENUMDOC
+ This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
+ instruction.
+ENUM
+ BFD_RELOC_MN10300_16_PCREL
+ENUMDOC
+ This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
+ instruction.
ENDSENUM
BFD_RELOC_UNUSED
-
CODE_FRAGMENT
.
.typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
bfd_reloc_type_lookup
SYNOPSIS
- const struct reloc_howto_struct *
+ reloc_howto_type *
bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code);
DESCRIPTION
*/
-const struct reloc_howto_struct *
+reloc_howto_type *
bfd_reloc_type_lookup (abfd, code)
bfd *abfd;
bfd_reloc_code_real_type code;
bfd_default_reloc_type_lookup
SYNOPSIS
- const struct reloc_howto_struct *bfd_default_reloc_type_lookup
+ reloc_howto_type *bfd_default_reloc_type_lookup
(bfd *abfd, bfd_reloc_code_real_type code);
DESCRIPTION
*/
-const struct reloc_howto_struct *
+reloc_howto_type *
bfd_default_reloc_type_lookup (abfd, code)
bfd *abfd;
bfd_reloc_code_real_type code;
default:
BFD_FAIL ();
}
- return (const struct reloc_howto_struct *) NULL;
+ return (reloc_howto_type *) NULL;
}
/*
if (reloc_size < 0)
goto error_return;
- reloc_vector = (arelent **) malloc (reloc_size);
+ reloc_vector = (arelent **) bfd_malloc ((size_t) reloc_size);
if (reloc_vector == NULL && reloc_size != 0)
- {
- bfd_set_error (bfd_error_no_memory);
- goto error_return;
- }
+ goto error_return;
/* read in the section */
if (!bfd_get_section_contents (input_bfd,