MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support

[deliverable/binutils-gdb.git] / binutils / NEWS

diff --git a/binutils/NEWS b/binutils/NEWS
index 753d17f3056634b7db3b58d60721372dca9bf57d..b49e2d31ea96d7e5003eae299757ab034dc1d395 100644 (file)
--- a/binutils/NEWS
+++ b/binutils/NEWS
@@ -1,5 +1,9 @@
 -*- text -*-
 
+* The MIPS port now supports the Imagination interAptiv MR2 processor,
+  which implements the MIPS32r3 ISA, the MIPS16e2 ASE as well as a couple
+  of implementation-specific regular MIPS and MIPS16e2 ASE instructions.
+
 * The SPARC port now supports the SPARC M8 processor, which implements the
   Oracle SPARC Architecture 2017.