+2013-12-07 Mike Frysinger <vapier@gentoo.org>
+
+ * epiphany.opc: Remove +x file mode.
+
+2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
+
+ PR binutils/15241
+ * lm32.cpu (Control and status registers): Add CFG2, PSW,
+ TLBVADDR, TLBPADDR and TLBBADVADDR.
+
+2012-11-30 Oleg Raikhman <oleg@adapteva.com>
+ Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
+ (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
+ (testset-insn): Add NO_DIS attribute to t.l.
+ (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
+ (move-insns): Add NO-DIS attribute to cmov.l.
+ (op-mmr-movts): Add NO-DIS attribute to movts.l.
+ (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
+ (op-rrr): Add NO-DIS attribute to .l.
+ (shift-rrr): Add NO-DIS attribute to .l.
+ (op-shift-rri): Add NO-DIS attribute to i32.l.
+ (bitrl, movtl): Add NO-DIS attribute.
+ (op-iextrrr): Add NO-DIS attribute to .l
+ (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
+ (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
+
+2012-02-27 Alan Modra <amodra@gmail.com>
+
+ * mt.opc (print_dollarhex): Trim values to 32 bits.
+
+2011-12-15 Nick Clifton <nickc@redhat.com>
+
+ * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
+ hosts.
+
+2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * epiphany.opc (parse_branch_addr): Fix type of valuep.
+ Cast value before printing it as a long.
+ (parse_postindex): Fix type of valuep.
+
+2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
+
+ * cpu/epiphany.cpu: New file.
+ * cpu/epiphany.opc: New file.
+
+2011-08-22 Nick Clifton <nickc@redhat.com>
+
+ * fr30.cpu: Newly contributed file.
+ * fr30.opc: Likewise.
+ * ip2k.cpu: Likewise.
+ * ip2k.opc: Likewise.
+ * mep-avc.cpu: Likewise.
+ * mep-avc2.cpu: Likewise.
+ * mep-c5.cpu: Likewise.
+ * mep-core.cpu: Likewise.
+ * mep-default.cpu: Likewise.
+ * mep-ext-cop.cpu: Likewise.
+ * mep-fmax.cpu: Likewise.
+ * mep-h1.cpu: Likewise.
+ * mep-ivc2.cpu: Likewise.
+ * mep-rhcop.cpu: Likewise.
+ * mep-sample-ucidsp.cpu: Likewise.
+ * mep.cpu: Likewise.
+ * mep.opc: Likewise.
+ * openrisc.cpu: Likewise.
+ * openrisc.opc: Likewise.
+ * xstormy16.cpu: Likewise.
+ * xstormy16.opc: Likewise.
+
+2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
+
+ * frv.opc: #undef DEBUG.
+
+2010-07-03 DJ Delorie <dj@delorie.com>
+
+ * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
+
2010-02-11 Doug Evans <dje@sebabeach.org>
* m32r.cpu (HASH-PREFIX): Delete.
* New file.
\f
+Copyright (C) 2003-2012 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
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