ACPICA: Clear PM register write-only bits on reading
[deliverable/linux.git] / drivers / acpi / acpica / hwregs.c
index 611736266f9f5516456dfc090d0862dc4321efdd..7b2fb602b5cbf59a441a98950078e34a6d7f862b 100644 (file)
@@ -207,6 +207,13 @@ acpi_hw_register_read(u32 register_id, u32 * return_value)
                                               xpm1a_control_block,
                                               &acpi_gbl_FADT.
                                               xpm1b_control_block);
+
+               /*
+                * Zero the write-only bits. From the ACPI specification, "Hardware
+                * Write-Only Bits": "Upon reads to registers with write-only bits,
+                * software masks out all write-only bits."
+                */
+               value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
                break;
 
        case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
@@ -222,7 +229,7 @@ acpi_hw_register_read(u32 register_id, u32 * return_value)
        case ACPI_REGISTER_SMI_COMMAND_BLOCK:   /* 8-bit access */
 
                status =
-                   acpi_os_read_port(acpi_gbl_FADT.smi_command, &value, 8);
+                   acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
                break;
 
        default:
@@ -356,7 +363,7 @@ acpi_status acpi_hw_register_write(u32 register_id, u32 value)
                /* SMI_CMD is currently always in IO space */
 
                status =
-                   acpi_os_write_port(acpi_gbl_FADT.smi_command, value, 8);
+                   acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
                break;
 
        default:
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