Merge commit 'gcl/merge' into merge

[deliverable/linux.git] / drivers / ata / ahci.c

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a3241a1a710bc26342a731f98e56af67e6d8b5f8..b8bea100a160439516b3ebbf662dfd7f0b690a2d 100644 (file)
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -113,6 +113,7 @@ enum {
        board_ahci_mcp65        = 6,
        board_ahci_nopmp        = 7,
        board_ahci_yesncq       = 8,
+       board_ahci_nosntf       = 9,
 
        /* global controller registers */
        HOST_CAP                = 0x00, /* host capabilities */
@@ -235,6 +236,7 @@ enum {
        AHCI_HFLAG_NO_SUSPEND           = (1 << 10), /* don't suspend */
        AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as
                                                        link offline */
+       AHCI_HFLAG_NO_SNTF              = (1 << 12), /* no sntf */
 
        /* ap->flags bits */
 
@@ -508,7 +510,7 @@ static const struct ata_port_info ahci_port_info[] = {
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-       /* board_ahci_yesncq */
+       [board_ahci_yesncq] =
        {
                AHCI_HFLAGS     (AHCI_HFLAG_YES_NCQ),
                .flags          = AHCI_FLAG_COMMON,
@@ -516,6 +518,14 @@ static const struct ata_port_info ahci_port_info[] = {
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
+       [board_ahci_nosntf] =
+       {
+               AHCI_HFLAGS     (AHCI_HFLAG_NO_SNTF),
+               .flags          = AHCI_FLAG_COMMON,
+               .pio_mask       = ATA_PIO4,
+               .udma_mask      = ATA_UDMA6,
+               .port_ops       = &ahci_ops,
+       },
 };
 
 static const struct pci_device_id ahci_pci_tbl[] = {
@@ -531,7 +541,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */
        { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
        { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */
-       { PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* ICH8 */
+       { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */
        { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */
        { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */
        { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */
@@ -849,6 +859,12 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
                cap &= ~HOST_CAP_PMP;
        }
 
+       if ((cap & HOST_CAP_SNTF) && (hpriv->flags & AHCI_HFLAG_NO_SNTF)) {
+               dev_printk(KERN_INFO, &pdev->dev,
+                          "controller can't do SNTF, turning off CAP_SNTF\n");
+               cap &= ~HOST_CAP_SNTF;
+       }
+
        if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 &&
            port_map != 1) {
                dev_printk(KERN_INFO, &pdev->dev,
@@ -2988,6 +3004,14 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
                return -ENODEV;
 
+       /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode.
+        * At the moment, we can only use the AHCI mode. Let the users know
+        * that for SAS drives they're out of luck.
+        */
+       if (pdev->vendor == PCI_VENDOR_ID_PROMISE)
+               dev_printk(KERN_INFO, &pdev->dev, "PDC42819 "
+                          "can only drive SATA devices with this driver\n");
+
        /* acquire resources */
        rc = pcim_enable_device(pdev);
        if (rc)