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drm: Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
[deliverable/linux.git] / drivers / char / drm / mga_drv.h
diff --git a/drivers/char/drm/mga_drv.h b/drivers/char/drm/mga_drv.h
index 6059c5a5b10516c0ddf5e48892a5b5cb43e39913..cd94c04e31c00cefa787168aa1f33887d091f7a5 100644 (file)
--- a/drivers/char/drm/mga_drv.h
+++ b/drivers/char/drm/mga_drv.h
@@ -38,11 +38,11 @@
 
 #define DRIVER_NAME            "mga"
 #define DRIVER_DESC            "Matrox G200/G400"
-#define DRIVER_DATE            "20050607"
+#define DRIVER_DATE            "20051102"
 
 #define DRIVER_MAJOR           3
 #define DRIVER_MINOR           2
-#define DRIVER_PATCHLEVEL      0
+#define DRIVER_PATCHLEVEL      1
 
 typedef struct drm_mga_primary_buffer {
        u8 *start;
@@ -62,14 +62,14 @@ typedef struct drm_mga_primary_buffer {
 } drm_mga_primary_buffer_t;
 
 typedef struct drm_mga_freelist {
-       struct drm_mga_freelist *next;
-       struct drm_mga_freelist *prev;
+       struct drm_mga_freelist *next;
+       struct drm_mga_freelist *prev;
        drm_mga_age_t age;
-       drm_buf_t *buf;
+       struct drm_buf *buf;
 } drm_mga_freelist_t;
 
 typedef struct {
-       drm_mga_freelist_t *list_entry;
+       drm_mga_freelist_t *list_entry;
        int discard;
        int dispatched;
 } drm_mga_buf_priv_t;
@@ -78,8 +78,8 @@ typedef struct drm_mga_private {
        drm_mga_primary_buffer_t prim;
        drm_mga_sarea_t *sarea_priv;
 
-       drm_mga_freelist_t *head;
-       drm_mga_freelist_t *tail;
+       drm_mga_freelist_t *head;
+       drm_mga_freelist_t *tail;
 
        unsigned int warp_pipe;
        unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
@@ -109,13 +109,13 @@ typedef struct drm_mga_private {
 
        /**
         * \name MMIO region parameters.
-        * 
+        *
         * \sa drm_mga_private_t::mmio
         */
-       /*@{*/
-       u32 mmio_base;             /**< Bus address of base of MMIO. */
-       u32 mmio_size;             /**< Size of the MMIO region. */
-       /*@}*/
+       /*@{ */
+       u32 mmio_base;             /**< Bus address of base of MMIO. */
+       u32 mmio_size;             /**< Size of the MMIO region. */
+       /*@} */
 
        u32 clear_cmd;
        u32 maccess;
@@ -143,21 +143,29 @@ typedef struct drm_mga_private {
        drm_local_map_t *warp;
        drm_local_map_t *primary;
        drm_local_map_t *agp_textures;
-       
-       DRM_AGP_MEM *agp_mem;
-       unsigned int agp_pages;
+
+       unsigned long agp_handle;
+       unsigned int agp_size;
 } drm_mga_private_t;
 
+extern struct drm_ioctl_desc mga_ioctls[];
+extern int mga_max_ioctl;
+
                                /* mga_dma.c */
-extern int mga_driver_preinit(drm_device_t * dev, unsigned long flags);
-extern int mga_dma_bootstrap(DRM_IOCTL_ARGS);
-extern int mga_dma_init(DRM_IOCTL_ARGS);
-extern int mga_dma_flush(DRM_IOCTL_ARGS);
-extern int mga_dma_reset(DRM_IOCTL_ARGS);
-extern int mga_dma_buffers(DRM_IOCTL_ARGS);
-extern int mga_driver_postcleanup(drm_device_t * dev);
-extern void mga_driver_pretakedown(drm_device_t * dev);
-extern int mga_driver_dma_quiescent(drm_device_t * dev);
+extern int mga_dma_bootstrap(struct drm_device *dev, void *data,
+                            struct drm_file *file_priv);
+extern int mga_dma_init(struct drm_device *dev, void *data,
+                       struct drm_file *file_priv);
+extern int mga_dma_flush(struct drm_device *dev, void *data,
+                        struct drm_file *file_priv);
+extern int mga_dma_reset(struct drm_device *dev, void *data,
+                        struct drm_file *file_priv);
+extern int mga_dma_buffers(struct drm_device *dev, void *data,
+                          struct drm_file *file_priv);
+extern int mga_driver_load(struct drm_device *dev, unsigned long flags);
+extern int mga_driver_unload(struct drm_device * dev);
+extern void mga_driver_lastclose(struct drm_device * dev);
+extern int mga_driver_dma_quiescent(struct drm_device * dev);
 
 extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv);
 
@@ -165,7 +173,7 @@ extern void mga_do_dma_flush(drm_mga_private_t * dev_priv);
 extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv);
 extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv);
 
-extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf );
+extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf);
 
                                /* mga_warp.c */
 extern unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv);
@@ -173,12 +181,12 @@ extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv);
 extern int mga_warp_init(drm_mga_private_t * dev_priv);
 
                                /* mga_irq.c */
-extern int mga_driver_fence_wait(drm_device_t * dev, unsigned int *sequence);
-extern int mga_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
+extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence);
+extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence);
 extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
-extern void mga_driver_irq_preinstall(drm_device_t * dev);
-extern void mga_driver_irq_postinstall(drm_device_t * dev);
-extern void mga_driver_irq_uninstall(drm_device_t * dev);
+extern void mga_driver_irq_preinstall(struct drm_device * dev);
+extern void mga_driver_irq_postinstall(struct drm_device * dev);
+extern void mga_driver_irq_uninstall(struct drm_device * dev);
 extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
                             unsigned long arg);
 
@@ -196,7 +204,7 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
 #define MGA_WRITE( reg, val )  do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
 #define MGA_WRITE8( reg, val )  do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
 
-static inline u32 _MGA_READ(u32 *addr)
+static inline u32 _MGA_READ(u32 * addr)
 {
        DRM_MEMORYBARRIER();
        return *(volatile u32 *)addr;
@@ -218,8 +226,6 @@ static inline u32 _MGA_READ(u32 *addr)
 #define DMAREG1(r)     (u8)(((r - DWGREG1) >> 2) | 0x80)
 #define DMAREG(r)      (ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
 
-
-
 /* ================================================================
  * Helper macross...
  */
@@ -244,7 +250,7 @@ do {                                                                        \
                            dev_priv->prim.high_mark ) {                \
                        if ( MGA_DMA_DEBUG )                            \
                                DRM_INFO( "%s: wrap...\n", __FUNCTION__ );      \
-                       return DRM_ERR(EBUSY);                  \
+                       return -EBUSY;                  \
                }                                                       \
        }                                                               \
 } while (0)
@@ -255,13 +261,12 @@ do {                                                                      \
                if ( mga_do_wait_for_idle( dev_priv ) < 0 ) {           \
                        if ( MGA_DMA_DEBUG )                            \
                                DRM_INFO( "%s: wrap...\n", __FUNCTION__ );      \
-                       return DRM_ERR(EBUSY);                  \
+                       return -EBUSY;                  \
                }                                                       \
                mga_do_dma_wrap_end( dev_priv );                        \
        }                                                               \
 } while (0)
 
-
 /* ================================================================
  * Primary DMA command stream
  */
@@ -346,7 +351,6 @@ do {                                                                        \
        write += DMA_BLOCK_SIZE;                                        \
 } while (0)
 
-
 /* Buffer aging via primary DMA stream head pointer.
  */
 
@@ -373,7 +377,6 @@ do {                                                                        \
        }                                                               \
 } while (0)
 
-
 #define MGA_ENGINE_IDLE_MASK           (MGA_SOFTRAPEN |                \
                                         MGA_DWGENGSTS |                \
                                         MGA_ENDPRDMASTS)
@@ -382,8 +385,6 @@ do {                                                                        \
 
 #define MGA_DMA_DEBUG                  0
 
-
-
 /* A reduced set of the mga registers.
  */
 #define MGA_CRTC_INDEX                 0x1fd4
@@ -644,7 +645,6 @@ do {                                                                        \
 #      define MGA_G400_WR_MAGIC                (1 << 6)
 #      define MGA_G400_WR56_MAGIC              0x46480000      /* 12800.0f */
 
-
 #define MGA_ILOAD_ALIGN                64
 #define MGA_ILOAD_MASK         (MGA_ILOAD_ALIGN - 1)
 
@@ -679,10 +679,10 @@ do {                                                                      \
 
 /* Simple idle test.
  */
-static __inline__ int mga_is_idle( drm_mga_private_t *dev_priv )
+static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv)
 {
-       u32 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
-       return ( status == MGA_ENDPRDMASTS );
+       u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
+       return (status == MGA_ENDPRDMASTS);
 }
 
 #endif
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