dw_dmac: fix style of the comments

[deliverable/linux.git] / drivers / dma / dw_dmac.c

diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index c599558faedaf29128a5a10bb15eaed7dbc5d41c..d6dbb1428200dd616910afa3095b858bef662fcb 100644 (file)
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -173,7 +173,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
                return;
 
        if (dws && dws->cfg_hi == ~0 && dws->cfg_lo == ~0) {
-               /* autoconfigure based on request line from DT */
+               /* Autoconfigure based on request line from DT */
                if (dwc->direction == DMA_MEM_TO_DEV)
                        cfghi = DWC_CFGH_DST_PER(dwc->request_line);
                else if (dwc->direction == DMA_DEV_TO_MEM)
@@ -473,16 +473,16 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
                        (unsigned long long)llp);
 
        list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) {
-               /* initial residue value */
+               /* Initial residue value */
                dwc->residue = desc->total_len;
 
-               /* check first descriptors addr */
+               /* Check first descriptors addr */
                if (desc->txd.phys == llp) {
                        spin_unlock_irqrestore(&dwc->lock, flags);
                        return;
                }
 
-               /* check first descriptors llp */
+               /* Check first descriptors llp */
                if (desc->lli.llp == llp) {
                        /* This one is currently in progress */
                        dwc->residue -= dwc_get_sent(dwc);
@@ -588,7 +588,7 @@ inline dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan)
 }
 EXPORT_SYMBOL(dw_dma_get_dst_addr);
 
-/* called with dwc->lock held and all DMAC interrupts disabled */
+/* Called with dwc->lock held and all DMAC interrupts disabled */
 static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc,
                u32 status_err, u32 status_xfer)
 {
@@ -626,7 +626,7 @@ static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc,
 
                dwc_chan_disable(dw, dwc);
 
-               /* make sure DMA does not restart by loading a new list */
+               /* Make sure DMA does not restart by loading a new list */
                channel_writel(dwc, LLP, 0);
                channel_writel(dwc, CTL_LO, 0);
                channel_writel(dwc, CTL_HI, 0);
@@ -1001,6 +1001,13 @@ static inline void convert_burst(u32 *maxburst)
                *maxburst = 0;
 }
 
+static inline void convert_slave_id(struct dw_dma_chan *dwc)
+{
+       struct dw_dma *dw = to_dw_dma(dwc->chan.device);
+
+       dwc->dma_sconfig.slave_id -= dw->request_line_base;
+}
+
 static int
 set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
 {
@@ -1015,6 +1022,7 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
 
        convert_burst(&dwc->dma_sconfig.src_maxburst);
        convert_burst(&dwc->dma_sconfig.dst_maxburst);
+       convert_slave_id(dwc);
 
        return 0;
 }
@@ -1022,10 +1030,11 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
 static inline void dwc_chan_pause(struct dw_dma_chan *dwc)
 {
        u32 cfglo = channel_readl(dwc, CFG_LO);
+       unsigned int count = 20;        /* timeout iterations */
 
        channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
-       while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY))
-               cpu_relax();
+       while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)
+               udelay(2);
 
        dwc->paused = true;
 }
@@ -1247,7 +1256,7 @@ static bool dw_dma_generic_filter(struct dma_chan *chan, void *param)
        struct dw_dma_filter_args *fargs = param;
        struct dw_dma_slave *dws = &dwc->slave;
 
-       /* ensure the device matches our channel */
+       /* Ensure the device matches our channel */
         if (chan->device != &fargs->dw->dma)
                 return false;
 
@@ -1276,9 +1285,9 @@ static struct dma_chan *dw_dma_xlate(struct of_phandle_args *dma_spec,
        if (dma_spec->args_count != 3)
                return NULL;
 
-       fargs.req = be32_to_cpup(dma_spec->args+0);
-       fargs.src = be32_to_cpup(dma_spec->args+1);
-       fargs.dst = be32_to_cpup(dma_spec->args+2);
+       fargs.req = dma_spec->args[0];
+       fargs.src = dma_spec->args[1];
+       fargs.dst = dma_spec->args[2];
 
        if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS ||
                    fargs.src >= dw->nr_masters ||
@@ -1314,7 +1323,7 @@ int dw_dma_cyclic_start(struct dma_chan *chan)
 
        spin_lock_irqsave(&dwc->lock, flags);
 
-       /* assert channel is idle */
+       /* Assert channel is idle */
        if (dma_readl(dw, CH_EN) & dwc->mask) {
                dev_err(chan2dev(&dwc->chan),
                        "BUG: Attempted to start non-idle channel\n");
@@ -1326,7 +1335,7 @@ int dw_dma_cyclic_start(struct dma_chan *chan)
        dma_writel(dw, CLEAR.ERROR, dwc->mask);
        dma_writel(dw, CLEAR.XFER, dwc->mask);
 
-       /* setup DMAC channel registers */
+       /* Setup DMAC channel registers */
        channel_writel(dwc, LLP, dwc->cdesc->desc[0]->txd.phys);
        channel_writel(dwc, CTL_LO, DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN);
        channel_writel(dwc, CTL_HI, 0);
@@ -1493,7 +1502,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
                last = desc;
        }
 
-       /* lets make a cyclic list */
+       /* Let's make a cyclic list */
        last->lli.llp = cdesc->desc[0]->txd.phys;
 
        dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%llx len %zu "
@@ -1628,6 +1637,7 @@ dw_dma_parse_dt(struct platform_device *pdev)
 
 static int dw_probe(struct platform_device *pdev)
 {
+       const struct platform_device_id *match;
        struct dw_dma_platform_data *pdata;
        struct resource         *io;
        struct dw_dma           *dw;
@@ -1697,7 +1707,7 @@ static int dw_probe(struct platform_device *pdev)
 
        dw->regs = regs;
 
-       /* get hardware configuration parameters */
+       /* Get hardware configuration parameters */
        if (autocfg) {
                max_blk_size = dma_readl(dw, MAX_BLK_SIZE);
 
@@ -1711,13 +1721,18 @@ static int dw_probe(struct platform_device *pdev)
                memcpy(dw->data_width, pdata->data_width, 4);
        }
 
+       /* Get the base request line if set */
+       match = platform_get_device_id(pdev);
+       if (match)
+               dw->request_line_base = (unsigned int)match->driver_data;
+
        /* Calculate all channel mask before DMA setup */
        dw->all_chan_mask = (1 << nr_channels) - 1;
 
-       /* force dma off, just in case */
+       /* Force dma off, just in case */
        dw_dma_off(dw);
 
-       /* disable BLOCK interrupts as well */
+       /* Disable BLOCK interrupts as well */
        channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
 
        err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0,
@@ -1727,7 +1742,7 @@ static int dw_probe(struct platform_device *pdev)
 
        platform_set_drvdata(pdev, dw);
 
-       /* create a pool of consistent memory blocks for hardware descriptors */
+       /* Create a pool of consistent memory blocks for hardware descriptors */
        dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", &pdev->dev,
                                         sizeof(struct dw_desc), 4, 0);
        if (!dw->desc_pool) {
@@ -1768,7 +1783,7 @@ static int dw_probe(struct platform_device *pdev)
 
                dwc->direction = DMA_TRANS_NONE;
 
-               /* hardware configuration */
+               /* Hardware configuration */
                if (autocfg) {
                        unsigned int dwc_params;
 
@@ -1906,7 +1921,8 @@ MODULE_DEVICE_TABLE(of, dw_dma_id_table);
 #endif
 
 static const struct platform_device_id dw_dma_ids[] = {
-       { "INTL9C60", 0 },
+       /* Name,        Request Line Base */
+       { "INTL9C60",   (kernel_ulong_t)16 },
        { }
 };