Merge remote-tracking branch 'sound-asoc/for-next'

[deliverable/linux.git] / drivers / dma / qcom / hidma.h

diff --git a/drivers/dma/qcom/hidma.h b/drivers/dma/qcom/hidma.h
index 231e306f6d87e37f1458f2b85691287943efe32d..e52e207163038847f32de7810de59ab49674f343 100644 (file)
--- a/drivers/dma/qcom/hidma.h
+++ b/drivers/dma/qcom/hidma.h
@@ -1,7 +1,7 @@
 /*
  * Qualcomm Technologies HIDMA data structures
  *
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -20,32 +20,29 @@
 #include <linux/interrupt.h>
 #include <linux/dmaengine.h>
 
-#define TRE_SIZE                       32 /* each TRE is 32 bytes  */
-#define TRE_CFG_IDX                    0
-#define TRE_LEN_IDX                    1
-#define TRE_SRC_LOW_IDX                2
-#define TRE_SRC_HI_IDX                 3
-#define TRE_DEST_LOW_IDX               4
-#define TRE_DEST_HI_IDX                5
-
-struct hidma_tx_status {
-       u8 err_info;                    /* error record in this transfer    */
-       u8 err_code;                    /* completion code                  */
-};
+#define HIDMA_TRE_SIZE                 32 /* each TRE is 32 bytes  */
+#define HIDMA_TRE_CFG_IDX              0
+#define HIDMA_TRE_LEN_IDX              1
+#define HIDMA_TRE_SRC_LOW_IDX          2
+#define HIDMA_TRE_SRC_HI_IDX           3
+#define HIDMA_TRE_DEST_LOW_IDX         4
+#define HIDMA_TRE_DEST_HI_IDX          5
 
 struct hidma_tre {
        atomic_t allocated;             /* if this channel is allocated     */
        bool queued;                    /* flag whether this is pending     */
        u16 status;                     /* status                           */
-       u32 chidx;                      /* index of the tre                 */
+       u32 idx;                        /* index of the tre                 */
        u32 dma_sig;                    /* signature of the tre             */
        const char *dev_name;           /* name of the device               */
        void (*callback)(void *data);   /* requester callback               */
        void *data;                     /* Data associated with this channel*/
        struct hidma_lldev *lldev;      /* lldma device pointer             */
-       u32 tre_local[TRE_SIZE / sizeof(u32) + 1]; /* TRE local copy        */
+       u32 tre_local[HIDMA_TRE_SIZE / sizeof(u32) + 1]; /* TRE local copy  */
        u32 tre_index;                  /* the offset where this was written*/
        u32 int_flags;                  /* interrupt flags                  */
+       u8 err_info;                    /* error record in this transfer    */
+       u8 err_code;                    /* completion code                  */
 };
 
 struct hidma_lldev {
@@ -61,17 +58,15 @@ struct hidma_lldev {
        void __iomem *evca;             /* Event Channel address          */
        struct hidma_tre
                **pending_tre_list;     /* Pointers to pending TREs       */
-       struct hidma_tx_status
-               *tx_status_list;        /* Pointers to pending TREs status*/
        s32 pending_tre_count;          /* Number of TREs pending         */
 
        void *tre_ring;                 /* TRE ring                       */
-       dma_addr_t tre_ring_handle;     /* TRE ring to be shared with HW  */
+       dma_addr_t tre_dma;             /* TRE ring to be shared with HW  */
        u32 tre_ring_size;              /* Byte size of the ring          */
        u32 tre_processed_off;          /* last processed TRE             */
 
        void *evre_ring;                /* EVRE ring                       */
-       dma_addr_t evre_ring_handle;    /* EVRE ring to be shared with HW  */
+       dma_addr_t evre_dma;            /* EVRE ring to be shared with HW  */
        u32 evre_ring_size;             /* Byte size of the ring           */
        u32 evre_processed_off;         /* last processed EVRE             */
 
@@ -93,6 +88,7 @@ struct hidma_chan {
        bool                            allocated;
        char                            dbg_name[16];
        u32                             dma_sig;
+       dma_cookie_t                    last_success;
 
        /*
         * active descriptor on this channel
@@ -145,8 +141,8 @@ enum dma_status hidma_ll_status(struct hidma_lldev *llhndl, u32 tre_ch);
 bool hidma_ll_isenabled(struct hidma_lldev *llhndl);
 void hidma_ll_queue_request(struct hidma_lldev *llhndl, u32 tre_ch);
 void hidma_ll_start(struct hidma_lldev *llhndl);
-int hidma_ll_pause(struct hidma_lldev *llhndl);
-int hidma_ll_resume(struct hidma_lldev *llhndl);
+int hidma_ll_disable(struct hidma_lldev *lldev);
+int hidma_ll_enable(struct hidma_lldev *llhndl);
 void hidma_ll_set_transfer_params(struct hidma_lldev *llhndl, u32 tre_ch,
        dma_addr_t src, dma_addr_t dest, u32 len, u32 flags);
 int hidma_ll_setup(struct hidma_lldev *lldev);
@@ -157,4 +153,6 @@ int hidma_ll_uninit(struct hidma_lldev *llhndl);
 irqreturn_t hidma_ll_inthandler(int irq, void *arg);
 void hidma_cleanup_pending_tre(struct hidma_lldev *llhndl, u8 err_info,
                                u8 err_code);
+int hidma_debug_init(struct hidma_dev *dmadev);
+void hidma_debug_uninit(struct hidma_dev *dmadev);
 #endif