Merge tag 'staging-4.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...

[deliverable/linux.git] / drivers / gpu / drm / amd / powerplay / hwmgr / tonga_hwmgr.h

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h
index d007706a434aff8eef7458090afcf66a227ee062..49168d262cccf2601c6b6d62a914e77b6eb38487 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h
@@ -223,17 +223,17 @@ struct tonga_hwmgr {
        uint32_t                           vddc_vddci_delta;
        uint32_t                           vddc_vddgfx_delta;
 
-       pp_interrupt_registration_info    internal_high_thermal_interrupt_info;
-       pp_interrupt_registration_info    internal_low_thermal_interrupt_info;
-       pp_interrupt_registration_info    smc_to_host_interrupt_info;
+       struct pp_interrupt_registration_info    internal_high_thermal_interrupt_info;
+       struct pp_interrupt_registration_info    internal_low_thermal_interrupt_info;
+       struct pp_interrupt_registration_info    smc_to_host_interrupt_info;
        uint32_t                          active_auto_throttle_sources;
 
-       pp_interrupt_registration_info    external_throttle_interrupt;
-       pp_interrupt_callback             external_throttle_callback;
+       struct pp_interrupt_registration_info    external_throttle_interrupt;
+       irq_handler_func_t             external_throttle_callback;
        void                             *external_throttle_context;
 
-       pp_interrupt_registration_info    ctf_interrupt_info;
-       pp_interrupt_callback             ctf_callback;
+       struct pp_interrupt_registration_info    ctf_interrupt_info;
+       irq_handler_func_t             ctf_callback;
        void                             *ctf_context;
 
        phw_tonga_clock_registers         clock_registers;
@@ -386,30 +386,6 @@ typedef struct tonga_hwmgr tonga_hwmgr;
 
 #define TONGA_UNUSED_GPIO_PIN                        0x7F
 
-/* Following flags shows PCIe link speed supported in driver which are decided by chipset and ASIC */
-#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1        0x00010000
-#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2        0x00020000
-#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3        0x00040000
-#define CAIL_PCIE_LINK_SPEED_SUPPORT_MASK        0xFFFF0000
-#define CAIL_PCIE_LINK_SPEED_SUPPORT_SHIFT       16
-
-/* Following flags shows PCIe link speed supported by ASIC H/W.*/
-#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1   0x00000001
-#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2   0x00000002
-#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3   0x00000004
-#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_MASK   0x0000FFFF
-#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_SHIFT  0
-
-/* Following flags shows PCIe lane width switch supported in driver which are decided by chipset and ASIC */
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X1          0x00010000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X2          0x00020000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X4          0x00040000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X8          0x00080000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X12         0x00100000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X16         0x00200000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_X32         0x00400000
-#define CAIL_PCIE_LINK_WIDTH_SUPPORT_SHIFT       16
-
 #define PP_HOST_TO_SMC_UL(X) cpu_to_be32(X)
 #define PP_SMC_TO_HOST_UL(X) be32_to_cpu(X)
 
@@ -422,6 +398,11 @@ typedef struct tonga_hwmgr tonga_hwmgr;
 #define CONVERT_FROM_HOST_TO_SMC_US(X) ((X) = PP_HOST_TO_SMC_US(X))
 
 int tonga_hwmgr_init(struct pp_hwmgr *hwmgr);
+int tonga_update_vce_dpm(struct pp_hwmgr *hwmgr, const void *input);
+int tonga_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate);
+int tonga_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable);
+int tonga_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable);
+uint32_t tonga_get_xclk(struct pp_hwmgr *hwmgr);
 
 #endif