drm: Replace crtc fb with primary plane fb (v3)

[deliverable/linux.git] / drivers / gpu / drm / gma500 / oaktrail_crtc.c

diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index 8195e859210741cdd37ef00b0d8c6f2aa1070227..2de216c2374f34482f43008e20fab3eaffbb2e2b 100644 (file)
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -599,7 +599,7 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
        struct drm_device *dev = crtc->dev;
        struct drm_psb_private *dev_priv = dev->dev_private;
        struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-       struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
+       struct psb_framebuffer *psbfb = to_psb_fb(crtc->primary->fb);
        int pipe = gma_crtc->pipe;
        const struct psb_offset *map = &dev_priv->regmap[pipe];
        unsigned long start, offset;
@@ -608,7 +608,7 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
        int ret = 0;
 
        /* no fb bound */
-       if (!crtc->fb) {
+       if (!crtc->primary->fb) {
                dev_dbg(dev->dev, "No FB bound\n");
                return 0;
        }
@@ -617,19 +617,19 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
                return 0;
 
        start = psbfb->gtt->offset;
-       offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8);
+       offset = y * crtc->primary->fb->pitches[0] + x * (crtc->primary->fb->bits_per_pixel / 8);
 
-       REG_WRITE(map->stride, crtc->fb->pitches[0]);
+       REG_WRITE(map->stride, crtc->primary->fb->pitches[0]);
 
        dspcntr = REG_READ(map->cntr);
        dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
 
-       switch (crtc->fb->bits_per_pixel) {
+       switch (crtc->primary->fb->bits_per_pixel) {
        case 8:
                dspcntr |= DISPPLANE_8BPP;
                break;
        case 16:
-               if (crtc->fb->depth == 15)
+               if (crtc->primary->fb->depth == 15)
                        dspcntr |= DISPPLANE_15_16BPP;
                else
                        dspcntr |= DISPPLANE_16BPP;