drm/i915: Turn HAS_FPGA_DBG_UNCLAIMED into a device_info flag

[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_drv.c

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 88d78e39bf6dfc0b984dea8295a0bcc2047e7232..624cdfcc1ba3a807081ff320c47fb87691f5f47d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -140,6 +140,16 @@ extern int intel_agp_enabled;
        .subdevice = PCI_ANY_ID,                \
        .driver_data = (unsigned long) info }
 
+#define INTEL_QUANTA_VGA_DEVICE(info) {                \
+       .class = PCI_BASE_CLASS_DISPLAY << 16,  \
+       .class_mask = 0xff0000,                 \
+       .vendor = 0x8086,                       \
+       .device = 0x16a,                        \
+       .subvendor = 0x152d,                    \
+       .subdevice = 0x8990,                    \
+       .driver_data = (unsigned long) info }
+
+
 static const struct intel_device_info intel_i830_info = {
        .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
        .has_overlay = 1, .overlay_needs_physical = 1,
@@ -272,12 +282,19 @@ static const struct intel_device_info intel_ivybridge_m_info = {
        .is_mobile = 1,
 };
 
+static const struct intel_device_info intel_ivybridge_q_info = {
+       GEN7_FEATURES,
+       .is_ivybridge = 1,
+       .num_pipes = 0, /* legal, last one wins */
+};
+
 static const struct intel_device_info intel_valleyview_m_info = {
        GEN7_FEATURES,
        .is_mobile = 1,
        .num_pipes = 2,
        .is_valleyview = 1,
        .display_mmio_offset = VLV_DISPLAY_BASE,
+       .has_llc = 0, /* legal, last one wins */
 };
 
 static const struct intel_device_info intel_valleyview_d_info = {
@@ -285,17 +302,22 @@ static const struct intel_device_info intel_valleyview_d_info = {
        .num_pipes = 2,
        .is_valleyview = 1,
        .display_mmio_offset = VLV_DISPLAY_BASE,
+       .has_llc = 0, /* legal, last one wins */
 };
 
 static const struct intel_device_info intel_haswell_d_info = {
        GEN7_FEATURES,
        .is_haswell = 1,
+       .has_ddi = 1,
+       .has_fpga_dbg = 1,
 };
 
 static const struct intel_device_info intel_haswell_m_info = {
        GEN7_FEATURES,
        .is_haswell = 1,
        .is_mobile = 1,
+       .has_ddi = 1,
+       .has_fpga_dbg = 1,
 };
 
 static const struct pci_device_id pciidlist[] = {              /* aka */
@@ -342,6 +364,7 @@ static const struct pci_device_id pciidlist[] = {           /* aka */
        INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */
        INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */
        INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */
+       INTEL_QUANTA_VGA_DEVICE(&intel_ivybridge_q_info), /* Quanta transcode */
        INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
        INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
        INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
@@ -440,11 +463,13 @@ void intel_detect_pch(struct drm_device *dev)
                                dev_priv->num_pch_pll = 0;
                                DRM_DEBUG_KMS("Found LynxPoint PCH\n");
                                WARN_ON(!IS_HASWELL(dev));
+                               WARN_ON(IS_ULT(dev));
                        } else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
                                dev_priv->pch_type = PCH_LPT;
                                dev_priv->num_pch_pll = 0;
                                DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
                                WARN_ON(!IS_HASWELL(dev));
+                               WARN_ON(!IS_ULT(dev));
                        }
                        BUG_ON(dev_priv->num_pch_pll > I915_NUM_PLLS);
                }
@@ -910,7 +935,11 @@ int i915_reset(struct drm_device *dev)
                        ring->init(ring);
 
                i915_gem_context_init(dev);
-               i915_gem_init_ppgtt(dev);
+               if (dev_priv->mm.aliasing_ppgtt) {
+                       ret = dev_priv->mm.aliasing_ppgtt->enable(dev);
+                       if (ret)
+                               i915_gem_cleanup_aliasing_ppgtt(dev);
+               }
 
                /*
                 * It would make sense to re-init all the other hw state, at
@@ -1178,7 +1207,7 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
 static void
 hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
 {
-       if (IS_HASWELL(dev_priv->dev) &&
+       if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
            (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
                DRM_ERROR("Unknown unclaimed register before writing to %x\n",
                          reg);
@@ -1189,7 +1218,7 @@ hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
 static void
 hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
 {
-       if (IS_HASWELL(dev_priv->dev) &&
+       if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
            (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
                DRM_ERROR("Unclaimed write to %x\n", reg);
                I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);