drm/i915/bdw: New source and header file for LRs, LRCs and Execlists

[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_drv.c

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a361bb9bc2430e4110506d4ff982498791d6644d..ec96f9a9724c809363cd2cd88baf2cd7a31b9a3e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -303,6 +303,7 @@ static const struct intel_device_info intel_broadwell_d_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
        .has_llc = 1,
        .has_ddi = 1,
+       .has_fpga_dbg = 1,
        .has_fbc = 1,
        GEN_DEFAULT_PIPEOFFSETS,
        IVB_CURSOR_OFFSETS,
@@ -314,6 +315,7 @@ static const struct intel_device_info intel_broadwell_m_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
        .has_llc = 1,
        .has_ddi = 1,
+       .has_fpga_dbg = 1,
        .has_fbc = 1,
        GEN_DEFAULT_PIPEOFFSETS,
        IVB_CURSOR_OFFSETS,
@@ -325,6 +327,7 @@ static const struct intel_device_info intel_broadwell_gt3d_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
        .has_llc = 1,
        .has_ddi = 1,
+       .has_fpga_dbg = 1,
        .has_fbc = 1,
        GEN_DEFAULT_PIPEOFFSETS,
        IVB_CURSOR_OFFSETS,
@@ -336,6 +339,7 @@ static const struct intel_device_info intel_broadwell_gt3m_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
        .has_llc = 1,
        .has_ddi = 1,
+       .has_fpga_dbg = 1,
        .has_fbc = 1,
        GEN_DEFAULT_PIPEOFFSETS,
        IVB_CURSOR_OFFSETS,
@@ -477,6 +481,10 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
        if (i915.semaphores >= 0)
                return i915.semaphores;
 
+       /* Until we get further testing... */
+       if (IS_GEN8(dev))
+               return false;
+
 #ifdef CONFIG_INTEL_IOMMU
        /* Enable semaphores on SNB when IO remapping is off */
        if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
@@ -516,24 +524,23 @@ static int i915_drm_freeze(struct drm_device *dev)
                        return error;
                }
 
-               flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-
-
-               intel_suspend_gt_powersave(dev);
-
                /*
                 * Disable CRTCs directly since we want to preserve sw state
-                * for _thaw.
+                * for _thaw. Also, power gate the CRTC power wells.
                 */
                drm_modeset_lock_all(dev);
-               for_each_crtc(dev, crtc) {
-                       dev_priv->display.crtc_disable(crtc);
-               }
+               for_each_crtc(dev, crtc)
+                       intel_crtc_control(crtc, false);
                drm_modeset_unlock_all(dev);
 
                intel_dp_mst_suspend(dev);
+
+               flush_delayed_work(&dev_priv->rps.delayed_resume_work);
+
                intel_runtime_pm_disable_interrupts(dev);
 
+               intel_suspend_gt_powersave(dev);
+
                intel_modeset_suspend_hw(dev);
        }