Revert "drm/i915: Make intel_display_suspend atomic, v2."

[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_drv.h

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ea3368e836264876d1319bf652485b99226d6b1c..9ca683ae2dec99f531f6d69c54c944955f077158 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -130,11 +130,6 @@ struct intel_fbdev {
 
 struct intel_encoder {
        struct drm_encoder base;
-       /*
-        * The new crtc this encoder will be driven from. Only differs from
-        * base->crtc while a modeset is in progress.
-        */
-       struct intel_crtc *new_crtc;
 
        enum intel_output_type type;
        unsigned int cloneable;
@@ -195,12 +190,6 @@ struct intel_connector {
         */
        struct intel_encoder *encoder;
 
-       /*
-        * The new encoder this connector will be driven. Only differs from
-        * encoder while a modeset is in progress.
-        */
-       struct intel_encoder *new_encoder;
-
        /* Reads out the current hw, returning true if the connector is enabled
         * and active (i.e. dpms ON state). */
        bool (*get_hw_state)(struct intel_connector *);
@@ -241,6 +230,13 @@ typedef struct dpll {
        int     p;
 } intel_clock_t;
 
+struct intel_atomic_state {
+       struct drm_atomic_state base;
+
+       bool dpll_set;
+       struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
+};
+
 struct intel_plane_state {
        struct drm_plane_state base;
        struct drm_rect src;
@@ -447,6 +443,9 @@ struct intel_crtc_state {
        int pbn;
 
        struct intel_crtc_scaler_state scaler_state;
+
+       /* w/a for waiting 2 vblanks during crtc enable */
+       enum pipe hsw_workaround_pipe;
 };
 
 struct intel_pipe_wm {
@@ -459,8 +458,10 @@ struct intel_pipe_wm {
 };
 
 struct intel_mmio_flip {
-       struct drm_i915_gem_request *req;
        struct work_struct work;
+       struct drm_i915_private *i915;
+       struct drm_i915_gem_request *req;
+       struct intel_crtc *crtc;
 };
 
 struct skl_pipe_wm {
@@ -526,7 +527,6 @@ struct intel_crtc {
 
        struct intel_initial_plane_config plane_config;
        struct intel_crtc_state *config;
-       bool new_enabled;
 
        /* reset counter value when the last flip was submitted */
        unsigned int reset_counter;
@@ -544,7 +544,6 @@ struct intel_crtc {
        } wm;
 
        int scanline_offset;
-       struct intel_mmio_flip mmio_flip;
 
        struct intel_crtc_atomic_commit atomic;
 
@@ -555,7 +554,15 @@ struct intel_crtc {
 struct intel_plane_wm_parameters {
        uint32_t horiz_pixels;
        uint32_t vert_pixels;
+       /*
+        *   For packed pixel formats:
+        *     bytes_per_pixel - holds bytes per pixel
+        *   For planar pixel formats:
+        *     bytes_per_pixel - holds bytes per pixel for uv-plane
+        *     y_bytes_per_pixel - holds bytes per pixel for y-plane
+        */
        uint8_t bytes_per_pixel;
+       uint8_t y_bytes_per_pixel;
        bool enabled;
        bool scaled;
        u64 tiling;
@@ -619,6 +626,7 @@ struct cxsr_latency {
        unsigned long cursor_hpll_disable;
 };
 
+#define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 #define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, base)
 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
@@ -984,8 +992,8 @@ int intel_pch_rawclk(struct drm_device *dev);
 void intel_mark_busy(struct drm_device *dev);
 void intel_mark_idle(struct drm_device *dev);
 void intel_crtc_restore_mode(struct drm_crtc *crtc);
-void intel_crtc_control(struct drm_crtc *crtc, bool enable);
-void intel_crtc_reset(struct intel_crtc *crtc);
+void intel_display_suspend(struct drm_device *dev);
+int intel_crtc_control(struct drm_crtc *crtc, bool enable);
 void intel_crtc_update_dpms(struct drm_crtc *crtc);
 void intel_encoder_destroy(struct drm_encoder *encoder);
 int intel_connector_init(struct intel_connector *);
@@ -1059,9 +1067,6 @@ intel_rotation_90_or_270(unsigned int rotation)
        return rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270));
 }
 
-unsigned int
-intel_tile_height(struct drm_device *dev, uint32_t bits_per_pixel,
-                 uint64_t fb_modifier);
 void intel_create_rotation_property(struct drm_device *dev,
                                        struct intel_plane *plane);
 
@@ -1077,7 +1082,6 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
 #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
 struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
                                                struct intel_crtc_state *state);
-void intel_put_shared_dpll(struct intel_crtc *crtc);
 
 void vlv_force_pll_on(struct drm_device *dev, enum pipe pipe,
                      const struct dpll *dpll);
@@ -1107,11 +1111,12 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv);
 void hsw_disable_pc8(struct drm_i915_private *dev_priv);
 void broxton_init_cdclk(struct drm_device *dev);
 void broxton_uninit_cdclk(struct drm_device *dev);
-void broxton_set_cdclk(struct drm_device *dev, int frequency);
 void broxton_ddi_phy_init(struct drm_device *dev);
 void broxton_ddi_phy_uninit(struct drm_device *dev);
 void bxt_enable_dc9(struct drm_i915_private *dev_priv);
 void bxt_disable_dc9(struct drm_i915_private *dev_priv);
+void skl_init_cdclk(struct drm_i915_private *dev_priv);
+void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
 void intel_dp_get_m_n(struct intel_crtc *crtc,
                      struct intel_crtc_state *pipe_config);
 void intel_dp_set_m_n(struct intel_crtc *crtc, enum link_m_n_set m_n);
@@ -1359,14 +1364,15 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv);
 void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
 void gen6_rps_idle(struct drm_i915_private *dev_priv);
 void gen6_rps_boost(struct drm_i915_private *dev_priv,
-                   struct drm_i915_file_private *file_priv);
+                   struct intel_rps_client *rps,
+                   unsigned long submitted);
 void intel_queue_rps_boost_for_request(struct drm_device *dev,
-                                      struct drm_i915_gem_request *rq);
+                                      struct drm_i915_gem_request *req);
 void ilk_wm_get_hw_state(struct drm_device *dev);
 void skl_wm_get_hw_state(struct drm_device *dev);
 void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
                          struct skl_ddb_allocation *ddb /* out */);
-
+uint32_t ilk_pipe_pixel_rate(const struct intel_crtc_state *pipe_config);
 
 /* intel_sdvo.c */
 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
@@ -1374,8 +1380,6 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
 
 /* intel_sprite.c */
 int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
-void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
-                              enum plane plane);
 int intel_plane_restore(struct drm_plane *plane);
 int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
                              struct drm_file *file_priv);
@@ -1399,6 +1403,13 @@ int intel_connector_atomic_get_property(struct drm_connector *connector,
 struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);
 void intel_crtc_destroy_state(struct drm_crtc *crtc,
                               struct drm_crtc_state *state);
+struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);
+void intel_atomic_state_clear(struct drm_atomic_state *);
+struct intel_shared_dpll_config *
+intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s);
+void intel_atomic_duplicate_dpll_state(struct drm_i915_private *,
+                                      struct intel_shared_dpll_config *);
+
 static inline struct intel_crtc_state *
 intel_atomic_get_crtc_state(struct drm_atomic_state *state,
                            struct intel_crtc *crtc)