Merge branches 'acpi-smbus', 'acpi-ec' and 'acpi-pci'

[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_lvds.c

diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 881b5d13592ef8075e64786c68e31050f6741d94..7f39b8ad88ae2faaf3ff16949e2792a684997771 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -98,15 +98,11 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
 {
        struct drm_device *dev = encoder->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-       u32 lvds_reg, tmp, flags = 0;
+       struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
+       u32 tmp, flags = 0;
        int dotclock;
 
-       if (HAS_PCH_SPLIT(dev))
-               lvds_reg = PCH_LVDS;
-       else
-               lvds_reg = LVDS;
-
-       tmp = I915_READ(lvds_reg);
+       tmp = I915_READ(lvds_encoder->reg);
        if (tmp & LVDS_HSYNC_POLARITY)
                flags |= DRM_MODE_FLAG_NHSYNC;
        else
@@ -139,8 +135,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder)
        struct drm_device *dev = encoder->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
-       const struct drm_display_mode *adjusted_mode =
-               &crtc->config->base.adjusted_mode;
+       const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
        int pipe = crtc->pipe;
        u32 temp;
 
@@ -289,11 +284,14 @@ intel_lvds_mode_valid(struct drm_connector *connector,
 {
        struct intel_connector *intel_connector = to_intel_connector(connector);
        struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
+       int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 
        if (mode->hdisplay > fixed_mode->hdisplay)
                return MODE_PANEL;
        if (mode->vdisplay > fixed_mode->vdisplay)
                return MODE_PANEL;
+       if (fixed_mode->clock > max_pixclk)
+               return MODE_CLOCK_HIGH;
 
        return MODE_OK;
 }
@@ -941,6 +939,7 @@ void intel_lvds_init(struct drm_device *dev)
        struct drm_display_mode *downclock_mode = NULL;
        struct edid *edid;
        struct drm_crtc *crtc;
+       u32 lvds_reg;
        u32 lvds;
        int pipe;
        u8 pin;
@@ -952,7 +951,7 @@ void intel_lvds_init(struct drm_device *dev)
        if (HAS_PCH_SPLIT(dev)) {
                I915_WRITE(PCH_PP_CONTROL,
                           I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
-       } else {
+       } else if (INTEL_INFO(dev_priv)->gen < 5) {
                I915_WRITE(PP_CONTROL,
                           I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
        }
@@ -963,8 +962,15 @@ void intel_lvds_init(struct drm_device *dev)
        if (dmi_check_system(intel_no_lvds))
                return;
 
+       if (HAS_PCH_SPLIT(dev))
+               lvds_reg = PCH_LVDS;
+       else
+               lvds_reg = LVDS;
+
+       lvds = I915_READ(lvds_reg);
+
        if (HAS_PCH_SPLIT(dev)) {
-               if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
+               if ((lvds & LVDS_DETECTED) == 0)
                        return;
                if (dev_priv->vbt.edp_support) {
                        DRM_DEBUG_KMS("disable LVDS for eDP support\n");
@@ -974,14 +980,25 @@ void intel_lvds_init(struct drm_device *dev)
 
        pin = GMBUS_PIN_PANEL;
        if (!lvds_is_present_in_vbt(dev, &pin)) {
-               u32 reg = HAS_PCH_SPLIT(dev) ? PCH_LVDS : LVDS;
-               if ((I915_READ(reg) & LVDS_PORT_EN) == 0) {
+               if ((lvds & LVDS_PORT_EN) == 0) {
                        DRM_DEBUG_KMS("LVDS is not present in VBT\n");
                        return;
                }
                DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
        }
 
+        /* Set the Panel Power On/Off timings if uninitialized. */
+       if (INTEL_INFO(dev_priv)->gen < 5 &&
+           I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
+               /* Set T2 to 40ms and T5 to 200ms */
+               I915_WRITE(PP_ON_DELAYS, 0x019007d0);
+
+               /* Set T3 to 35ms and Tx to 200ms */
+               I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
+
+               DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
+       }
+
        lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
        if (!lvds_encoder)
                return;
@@ -1040,11 +1057,7 @@ void intel_lvds_init(struct drm_device *dev)
        connector->interlace_allowed = false;
        connector->doublescan_allowed = false;
 
-       if (HAS_PCH_SPLIT(dev)) {
-               lvds_encoder->reg = PCH_LVDS;
-       } else {
-               lvds_encoder->reg = LVDS;
-       }
+       lvds_encoder->reg = lvds_reg;
 
        /* create the scaling mode property */
        drm_mode_create_scaling_mode_property(dev);
@@ -1125,7 +1138,6 @@ void intel_lvds_init(struct drm_device *dev)
        if (HAS_PCH_SPLIT(dev))
                goto failed;
 
-       lvds = I915_READ(LVDS);
        pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
        crtc = intel_get_crtc_for_pipe(dev, pipe);