drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_ringbuffer.c
index b3d8f766fa7f56f42ec7b728b56e3a17799618b6..2908896334f5ede7f622d89f0bafbd65d93cb2d3 100644 (file)
@@ -379,13 +379,33 @@ gen7_render_ring_flush(struct intel_engine_cs *ring,
        return 0;
 }
 
+static int
+gen8_emit_pipe_control(struct intel_engine_cs *ring,
+                      u32 flags, u32 scratch_addr)
+{
+       int ret;
+
+       ret = intel_ring_begin(ring, 6);
+       if (ret)
+               return ret;
+
+       intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(6));
+       intel_ring_emit(ring, flags);
+       intel_ring_emit(ring, scratch_addr);
+       intel_ring_emit(ring, 0);
+       intel_ring_emit(ring, 0);
+       intel_ring_emit(ring, 0);
+       intel_ring_advance(ring);
+
+       return 0;
+}
+
 static int
 gen8_render_ring_flush(struct intel_engine_cs *ring,
                       u32 invalidate_domains, u32 flush_domains)
 {
        u32 flags = 0;
        u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
-       int ret;
 
        flags |= PIPE_CONTROL_CS_STALL;
 
@@ -404,20 +424,7 @@ gen8_render_ring_flush(struct intel_engine_cs *ring,
                flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
        }
 
-       ret = intel_ring_begin(ring, 6);
-       if (ret)
-               return ret;
-
-       intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(6));
-       intel_ring_emit(ring, flags);
-       intel_ring_emit(ring, scratch_addr);
-       intel_ring_emit(ring, 0);
-       intel_ring_emit(ring, 0);
-       intel_ring_emit(ring, 0);
-       intel_ring_advance(ring);
-
-       return 0;
-
+       return gen8_emit_pipe_control(ring, flags, scratch_addr);
 }
 
 static void ring_write_tail(struct intel_engine_cs *ring,
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