drm/nouveau: port all engines to new engine module format

[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / subdev / device / nv04.c

diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
index 5173c785b061e5f5ee84f5a84db0183688de5146..693d200a3e225cb8bd15bbf52b6e8e596ee9f480 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
@@ -33,6 +33,12 @@
 #include <subdev/instmem.h>
 #include <subdev/vm.h>
 
+#include <engine/dmaobj.h>
+#include <engine/fifo.h>
+#include <engine/software.h>
+#include <engine/graph.h>
+#include <engine/disp.h>
+
 int
 nv04_identify(struct nouveau_device *device)
 {
@@ -47,6 +53,11 @@ nv04_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_FB     ] = &nv04_fb_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_FIFO   ] = &nv04_fifo_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] = &nv04_software_oclass;
+               device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;
+               device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
                break;
        case 0x05:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -58,6 +69,11 @@ nv04_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_FB     ] = &nv04_fb_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
+               device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
+               device->oclass[NVDEV_ENGINE_FIFO   ] = &nv04_fifo_oclass;
+               device->oclass[NVDEV_ENGINE_SW     ] = &nv04_software_oclass;
+               device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;
+               device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
                break;
        default:
                nv_fatal(device, "unknown RIVA chipset\n");