drm/nouveau/gpio: split "toggled" interrupt into "went high" / "went low"

[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / subdev / gpio / nv10.c

diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c
index b76e63493f6b17d88d3f2286bee40409363540aa..b0267e58e0d8216fd5a858e6e8e460985ef7920a 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c
@@ -83,34 +83,24 @@ nv10_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
 }
 
 static void
-nv10_gpio_intr(struct nouveau_subdev *subdev)
+nv10_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
 {
-       struct nv10_gpio_priv *priv = (void *)subdev;
-       u32 intr = nv_rd32(priv, 0x001104);
-       u32 hi = (intr & 0x0000ffff) >> 0;
-       u32 lo = (intr & 0xffff0000) >> 16;
-       int i;
-
-       for (i = 0; (hi | lo) && i < 32; i++) {
-               if ((hi | lo) & (1 << i))
-                       nouveau_event_trigger(priv->base.events, 1, i);
-       }
-
-       nv_wr32(priv, 0x001104, intr);
-}
-
-static void
-nv10_gpio_intr_enable(struct nouveau_event *event, int line)
-{
-       nv_wr32(event->priv, 0x001104, 0x00010001 << line);
-       nv_mask(event->priv, 0x001144, 0x00010001 << line, 0x00010001 << line);
+       u32 intr = nv_rd32(gpio, 0x001104);
+       u32 stat = nv_rd32(gpio, 0x001144) & intr;
+       *lo = (stat & 0xffff0000) >> 16;
+       *hi = (stat & 0x0000ffff);
+       nv_wr32(gpio, 0x001104, intr);
 }
 
 static void
-nv10_gpio_intr_disable(struct nouveau_event *event, int line)
+nv10_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
 {
-       nv_wr32(event->priv, 0x001104, 0x00010001 << line);
-       nv_mask(event->priv, 0x001144, 0x00010001 << line, 0x00000000);
+       u32 inte = nv_rd32(gpio, 0x001144);
+       if (type & NVKM_GPIO_LO)
+               inte = (inte & ~(mask << 16)) | (data << 16);
+       if (type & NVKM_GPIO_HI)
+               inte = (inte & ~mask) | data;
+       nv_wr32(gpio, 0x001144, inte);
 }
 
 static int
@@ -128,10 +118,6 @@ nv10_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 
        priv->base.drive = nv10_gpio_drive;
        priv->base.sense = nv10_gpio_sense;
-       priv->base.events->priv = priv;
-       priv->base.events->enable = nv10_gpio_intr_enable;
-       priv->base.events->disable = nv10_gpio_intr_disable;
-       nv_subdev(priv)->intr = nv10_gpio_intr;
        return 0;
 }
 
@@ -175,4 +161,6 @@ nv10_gpio_oclass = &(struct nouveau_gpio_impl) {
                .fini = nv10_gpio_fini,
        },
        .lines = 16,
+       .intr_stat = nv10_gpio_intr_stat,
+       .intr_mask = nv10_gpio_intr_mask,
 }.base;