drm/nouveau: port all engines to new engine module format

[deliverable/linux.git] / drivers / gpu / drm / nouveau / core / subdev / vm / nv50.c

diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
index 6e9bcd212cfcb80733bdd5a5ddc8110456308de5..0f0d3a5de5c2c5912ae551826a7350a3e4c4a60d 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
@@ -154,7 +154,6 @@ nv50_vm_flush(struct nouveau_vm *vm)
        struct nouveau_engine *engine;
        int i;
 
-#if 0
        for (i = 0; i < NVDEV_SUBDEV_NR; i++) {
                if (atomic_read(&vm->engref[i])) {
                        engine = nouveau_engine(vm->vmm, i);
@@ -162,11 +161,6 @@ nv50_vm_flush(struct nouveau_vm *vm)
                                engine->tlb_flush(engine);
                }
        }
-#else
-       nv50_vm_flush_engine(nv_subdev(vm->vmm), 0x06); /* bar */
-       nv50_vm_flush_engine(nv_subdev(vm->vmm), 0x05); /* fifo */
-       nv50_vm_flush_engine(nv_subdev(vm->vmm), 0x00); /* gr */
-#endif
 }
 
 void
@@ -206,6 +200,7 @@ nv50_vmmgr_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
 
+       priv->base.limit = 1ULL << 40;
        priv->base.pgt_bits  = 29 - 12;
        priv->base.spg_shift = 12;
        priv->base.lpg_shift = 16;