drm: Replace pitch with pitches[] in drm_framebuffer

[deliverable/linux.git] / drivers / gpu / drm / nouveau / nv04_crtc.c

diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index 5e45398a9e2deed847a2191260c76611e325b3c5..728d07584d3907046f7987f189230d706b58666d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -364,7 +364,7 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
        regp->CRTC[NV_CIO_CR_VRE_INDEX] = 1 << 5 | XLATE(vertEnd, 0, NV_CIO_CR_VRE_3_0);
        regp->CRTC[NV_CIO_CR_VDE_INDEX] = vertDisplay;
        /* framebuffer can be larger than crtc scanout area. */
-       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = fb->pitch / 8;
+       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = fb->pitches[0] / 8;
        regp->CRTC[NV_CIO_CR_ULINE_INDEX] = 0x00;
        regp->CRTC[NV_CIO_CR_VBS_INDEX] = vertBlankStart;
        regp->CRTC[NV_CIO_CR_VBE_INDEX] = vertBlankEnd;
@@ -377,9 +377,9 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
 
        /* framebuffer can be larger than crtc scanout area. */
        regp->CRTC[NV_CIO_CRE_RPC0_INDEX] =
-               XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
+               XLATE(fb->pitches[0] / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
        regp->CRTC[NV_CIO_CRE_42] =
-               XLATE(fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11);
+               XLATE(fb->pitches[0] / 8, 11, NV_CIO_CRE_42_OFFSET_11);
        regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ?
                                            MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00;
        regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) |
@@ -835,18 +835,18 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
        NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_GENERAL_CONTROL,
                      regp->ramdac_gen_ctrl);
 
-       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3;
+       regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitches[0] >> 3;
        regp->CRTC[NV_CIO_CRE_RPC0_INDEX] =
-               XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
+               XLATE(drm_fb->pitches[0] >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
        regp->CRTC[NV_CIO_CRE_42] =
-               XLATE(drm_fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11);
+               XLATE(drm_fb->pitches[0] / 8, 11, NV_CIO_CRE_42_OFFSET_11);
        crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX);
        crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX);
        crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42);
 
        /* Update the framebuffer location. */
        regp->fb_start = nv_crtc->fb.offset & ~3;
-       regp->fb_start += (y * drm_fb->pitch) + (x * drm_fb->bits_per_pixel / 8);
+       regp->fb_start += (y * drm_fb->pitches[0]) + (x * drm_fb->bits_per_pixel / 8);
        nv_set_crtc_base(dev, nv_crtc->index, regp->fb_start);
 
        /* Update the arbitration parameters. */