drm/nouveau/dma: convert to new-style nvkm_engine

[deliverable/linux.git] / drivers / gpu / drm / nouveau / nvkm / engine / device / nv10.c

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
index c5ecdddfbce38c35d6daa63c2a0901fc3d2f1c48..17a694d60d7a094c239bf5e22adfba64805ce73b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
@@ -28,54 +28,46 @@ nv10_identify(struct nvkm_device *device)
 {
        switch (device->chipset) {
        case 0x10:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x15:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x16:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x1a:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x11:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x17:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x1f:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x18:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv10_gr_oclass;