drm/nouveau/dma: convert to new-style nvkm_engine
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nvkm / engine / device / nv20.c
index 104ed4f093b5e758bf36fd134e3226331d7df807..6b59530743a1cb6082e47cdfbf7ee418eb25c445 100644 (file)
@@ -28,28 +28,24 @@ nv20_identify(struct nvkm_device *device)
 {
        switch (device->chipset) {
        case 0x20:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv20_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x25:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv25_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x28:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv25_gr_oclass;
                device->oclass[NVDEV_ENGINE_DISP   ] =  nv04_disp_oclass;
                break;
        case 0x2a:
-               device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv04_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;
                device->oclass[NVDEV_ENGINE_SW     ] =  nv10_sw_oclass;
                device->oclass[NVDEV_ENGINE_GR     ] = &nv2a_gr_oclass;
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