drm/radeon: add proper support for RADEON_VM_BLOCK_SIZE v2
[deliverable/linux.git] / drivers / gpu / drm / radeon / cik.c
index 745143c2358fc73e920fdccd4c1cec50d54ee884..8d0f1774efbc3f417d45fc2f32a717f0c0548731 100644 (file)
@@ -38,6 +38,7 @@ MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_ce.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_mec.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_mc.bin");
+MODULE_FIRMWARE("radeon/BONAIRE_mc2.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin");
 MODULE_FIRMWARE("radeon/BONAIRE_smc.bin");
@@ -46,6 +47,7 @@ MODULE_FIRMWARE("radeon/HAWAII_me.bin");
 MODULE_FIRMWARE("radeon/HAWAII_ce.bin");
 MODULE_FIRMWARE("radeon/HAWAII_mec.bin");
 MODULE_FIRMWARE("radeon/HAWAII_mc.bin");
+MODULE_FIRMWARE("radeon/HAWAII_mc2.bin");
 MODULE_FIRMWARE("radeon/HAWAII_rlc.bin");
 MODULE_FIRMWARE("radeon/HAWAII_sdma.bin");
 MODULE_FIRMWARE("radeon/HAWAII_smc.bin");
@@ -1703,20 +1705,20 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
        const __be32 *fw_data;
        u32 running, blackout = 0;
        u32 *io_mc_regs;
-       int i, ucode_size, regs_size;
+       int i, regs_size, ucode_size;
 
        if (!rdev->mc_fw)
                return -EINVAL;
 
+       ucode_size = rdev->mc_fw->size / 4;
+
        switch (rdev->family) {
        case CHIP_BONAIRE:
                io_mc_regs = (u32 *)&bonaire_io_mc_regs;
-               ucode_size = CIK_MC_UCODE_SIZE;
                regs_size = BONAIRE_IO_MC_REGS_SIZE;
                break;
        case CHIP_HAWAII:
                io_mc_regs = (u32 *)&hawaii_io_mc_regs;
-               ucode_size = HAWAII_MC_UCODE_SIZE;
                regs_size = HAWAII_IO_MC_REGS_SIZE;
                break;
        default:
@@ -1783,7 +1785,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
        const char *chip_name;
        size_t pfp_req_size, me_req_size, ce_req_size,
                mec_req_size, rlc_req_size, mc_req_size = 0,
-               sdma_req_size, smc_req_size = 0;
+               sdma_req_size, smc_req_size = 0, mc2_req_size = 0;
        char fw_name[30];
        int err;
 
@@ -1797,7 +1799,8 @@ static int cik_init_microcode(struct radeon_device *rdev)
                ce_req_size = CIK_CE_UCODE_SIZE * 4;
                mec_req_size = CIK_MEC_UCODE_SIZE * 4;
                rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
-               mc_req_size = CIK_MC_UCODE_SIZE * 4;
+               mc_req_size = BONAIRE_MC_UCODE_SIZE * 4;
+               mc2_req_size = BONAIRE_MC2_UCODE_SIZE * 4;
                sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
                smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4);
                break;
@@ -1809,6 +1812,7 @@ static int cik_init_microcode(struct radeon_device *rdev)
                mec_req_size = CIK_MEC_UCODE_SIZE * 4;
                rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
                mc_req_size = HAWAII_MC_UCODE_SIZE * 4;
+               mc2_req_size = HAWAII_MC2_UCODE_SIZE * 4;
                sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
                smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4);
                break;
@@ -1904,16 +1908,22 @@ static int cik_init_microcode(struct radeon_device *rdev)
 
        /* No SMC, MC ucode on APUs */
        if (!(rdev->flags & RADEON_IS_IGP)) {
-               snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
+               snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
                err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
-               if (err)
-                       goto out;
-               if (rdev->mc_fw->size != mc_req_size) {
+               if (err) {
+                       snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
+                       err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
+                       if (err)
+                               goto out;
+               }
+               if ((rdev->mc_fw->size != mc_req_size) &&
+                   (rdev->mc_fw->size != mc2_req_size)){
                        printk(KERN_ERR
                               "cik_mc: Bogus length %zu in firmware \"%s\"\n",
                               rdev->mc_fw->size, fw_name);
                        err = -EINVAL;
                }
+               DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
 
                snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
                err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
@@ -5318,6 +5328,7 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
        WREG32(MC_VM_MX_L1_TLB_CNTL,
               (0xA << 7) |
               ENABLE_L1_TLB |
+              ENABLE_L1_FRAGMENT_PROCESSING |
               SYSTEM_ACCESS_MODE_NOT_IN_SYS |
               ENABLE_ADVANCED_DRIVER_MODEL |
               SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU);
@@ -5330,7 +5341,8 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
               CONTEXT1_IDENTITY_ACCESS_MODE(1));
        WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);
        WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |
-              L2_CACHE_BIGK_FRAGMENT_SIZE(6));
+              BANK_SELECT(4) |
+              L2_CACHE_BIGK_FRAGMENT_SIZE(4));
        /* setup context0 */
        WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
        WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
@@ -5366,6 +5378,7 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
               (u32)(rdev->dummy_page.addr >> 12));
        WREG32(VM_CONTEXT1_CNTL2, 4);
        WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) |
+                               PAGE_TABLE_BLOCK_SIZE(RADEON_VM_BLOCK_SIZE - 9) |
                                RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT |
                                RANGE_PROTECTION_FAULT_ENABLE_DEFAULT |
                                DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT |
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