drm/radeon: separate vblank and pflip crtc handling
[deliverable/linux.git] / drivers / gpu / drm / radeon / r600.c
index 647ef407921764692758c56e03f92b737202e317..436e55092e9d1fa3c985c382727e4cde1816970f 100644 (file)
@@ -1748,11 +1748,9 @@ bool r600_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
        if (!(reset_mask & (RADEON_RESET_GFX |
                            RADEON_RESET_COMPUTE |
                            RADEON_RESET_CP))) {
-               radeon_ring_lockup_update(ring);
+               radeon_ring_lockup_update(rdev, ring);
                return false;
        }
-       /* force CP activities */
-       radeon_ring_force_activity(rdev, ring);
        return radeon_ring_test_lockup(rdev, ring);
 }
 
@@ -2604,8 +2602,6 @@ int r600_cp_resume(struct radeon_device *rdev)
        WREG32(CP_RB_BASE, ring->gpu_addr >> 8);
        WREG32(CP_DEBUG, (1 << 27) | (1 << 28));
 
-       ring->rptr = RREG32(CP_RB_RPTR);
-
        r600_cp_start(rdev);
        ring->ready = true;
        r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
@@ -3880,7 +3876,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[0]))
-                                               radeon_crtc_handle_flip(rdev, 0);
+                                               radeon_crtc_handle_vblank(rdev, 0);
                                        rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D1 vblank\n");
                                }
@@ -3906,7 +3902,7 @@ restart_ih:
                                                wake_up(&rdev->irq.vblank_queue);
                                        }
                                        if (atomic_read(&rdev->irq.pflip[1]))
-                                               radeon_crtc_handle_flip(rdev, 1);
+                                               radeon_crtc_handle_vblank(rdev, 1);
                                        rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT;
                                        DRM_DEBUG("IH: D2 vblank\n");
                                }
This page took 0.150092 seconds and 5 git commands to generate.