drm/radeon/kms: reorganize copy callbacks
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_asic.c
index 38a29bcac5d1703cd093bdfe4af93e2f44d3a4a4..6bd15254f643b3a23cea263b4f04ed862d95c7f4 100644 (file)
@@ -151,9 +151,14 @@ static struct radeon_asic r100_asic = {
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
        .get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -211,9 +216,14 @@ static struct radeon_asic r200_asic = {
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
        .get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -270,9 +280,14 @@ static struct radeon_asic r300_asic = {
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
        .get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -330,9 +345,14 @@ static struct radeon_asic r300_asic_pcie = {
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
        .get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -389,9 +409,14 @@ static struct radeon_asic r420_asic = {
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -449,9 +474,14 @@ static struct radeon_asic rs400_asic = {
        .irq_set = &r100_irq_set,
        .irq_process = &r100_irq_process,
        .get_vblank_counter = &r100_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_legacy_get_engine_clock,
        .set_engine_clock = &radeon_legacy_set_engine_clock,
        .get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -509,9 +539,14 @@ static struct radeon_asic rs600_asic = {
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -569,9 +604,14 @@ static struct radeon_asic rs690_asic = {
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r200_copy_dma,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r200_copy_dma,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -629,9 +669,14 @@ static struct radeon_asic rv515_asic = {
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -689,9 +734,14 @@ static struct radeon_asic r520_asic = {
        .irq_set = &rs600_irq_set,
        .irq_process = &rs600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r100_copy_blit,
-       .copy_dma = &r200_copy_dma,
-       .copy = &r100_copy_blit,
+       .copy = {
+               .blit = &r100_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = &r200_copy_dma,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r100_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -748,9 +798,14 @@ static struct radeon_asic r600_asic = {
        .irq_set = &r600_irq_set,
        .irq_process = &r600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -807,9 +862,14 @@ static struct radeon_asic rs780_asic = {
        .irq_set = &r600_irq_set,
        .irq_process = &r600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = NULL,
@@ -866,9 +926,14 @@ static struct radeon_asic rv770_asic = {
        .irq_set = &r600_irq_set,
        .irq_process = &r600_irq_process,
        .get_vblank_counter = &rs600_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -925,9 +990,14 @@ static struct radeon_asic evergreen_asic = {
        .irq_set = &evergreen_irq_set,
        .irq_process = &evergreen_irq_process,
        .get_vblank_counter = &evergreen_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -984,9 +1054,14 @@ static struct radeon_asic sumo_asic = {
        .irq_set = &evergreen_irq_set,
        .irq_process = &evergreen_irq_process,
        .get_vblank_counter = &evergreen_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = NULL,
@@ -1043,9 +1118,14 @@ static struct radeon_asic btc_asic = {
        .irq_set = &evergreen_irq_set,
        .irq_process = &evergreen_irq_process,
        .get_vblank_counter = &evergreen_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -1127,9 +1207,14 @@ static struct radeon_asic cayman_asic = {
        .irq_set = &evergreen_irq_set,
        .irq_process = &evergreen_irq_process,
        .get_vblank_counter = &evergreen_get_vblank_counter,
-       .copy_blit = &r600_copy_blit,
-       .copy_dma = NULL,
-       .copy = &r600_copy_blit,
+       .copy = {
+               .blit = &r600_copy_blit,
+               .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .dma = NULL,
+               .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+       },
        .get_engine_clock = &radeon_atom_get_engine_clock,
        .set_engine_clock = &radeon_atom_set_engine_clock,
        .get_memory_clock = &radeon_atom_get_memory_clock,
@@ -1174,9 +1259,6 @@ int radeon_asic_init(struct radeon_device *rdev)
        else
                rdev->num_crtc = 2;
 
-       /* set the ring used for bo copies */
-       rdev->copy_ring = RADEON_RING_TYPE_GFX_INDEX;
-
        switch (rdev->family) {
        case CHIP_R100:
        case CHIP_RV100:
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