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drm/radeon/kms: add quirk for Acer laptop
[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_atombios.c
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 1c9a9c461762a698f85943e30f1f5e4c354036d0..74bc8dfcb2a25ad31ac9648a3ddd9f2af9a517a9 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -46,7 +46,8 @@ radeon_add_atom_connector(struct drm_device *dev,
                          uint32_t supported_device,
                          int connector_type,
                          struct radeon_i2c_bus_rec *i2c_bus,
-                         bool linkb, uint32_t igp_lane_info);
+                         bool linkb, uint32_t igp_lane_info,
+                         uint16_t connector_object_id);
 
 /* from radeon_legacy_encoder.c */
 extern void
@@ -81,18 +82,18 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_gpio(struct drm_device
 
        i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4;
        i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4;
-       i2c.put_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4;
-       i2c.put_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4;
-       i2c.get_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4;
-       i2c.get_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4;
+       i2c.en_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4;
+       i2c.en_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4;
+       i2c.y_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4;
+       i2c.y_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4;
        i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4;
        i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4;
        i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift);
        i2c.mask_data_mask = (1 << gpio.ucDataMaskShift);
-       i2c.put_clk_mask = (1 << gpio.ucClkEnShift);
-       i2c.put_data_mask = (1 << gpio.ucDataEnShift);
-       i2c.get_clk_mask = (1 << gpio.ucClkY_Shift);
-       i2c.get_data_mask = (1 << gpio.ucDataY_Shift);
+       i2c.en_clk_mask = (1 << gpio.ucClkEnShift);
+       i2c.en_data_mask = (1 << gpio.ucDataEnShift);
+       i2c.y_clk_mask = (1 << gpio.ucClkY_Shift);
+       i2c.y_data_mask = (1 << gpio.ucDataY_Shift);
        i2c.a_clk_mask = (1 << gpio.ucClkA_Shift);
        i2c.a_data_mask = (1 << gpio.ucDataA_Shift);
        i2c.valid = true;
@@ -171,6 +172,15 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
                }
        }
 
+       /* Acer laptop reports DVI-D as DVI-I */
+       if ((dev->pdev->device == 0x95c4) &&
+           (dev->pdev->subsystem_vendor == 0x1025) &&
+           (dev->pdev->subsystem_device == 0x013c)) {
+               if ((*connector_type == DRM_MODE_CONNECTOR_DVII) &&
+                   (supported_device == ATOM_DEVICE_DFP1_SUPPORT))
+                       *connector_type = DRM_MODE_CONNECTOR_DVID;
+       }
+
        return true;
 }
 
@@ -193,6 +203,23 @@ const int supported_devices_connector_convert[] = {
        DRM_MODE_CONNECTOR_DisplayPort
 };
 
+const uint16_t supported_devices_connector_object_id_convert[] = {
+       CONNECTOR_OBJECT_ID_NONE,
+       CONNECTOR_OBJECT_ID_VGA,
+       CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, /* not all boards support DL */
+       CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D, /* not all boards support DL */
+       CONNECTOR_OBJECT_ID_VGA, /* technically DVI-A */
+       CONNECTOR_OBJECT_ID_COMPOSITE,
+       CONNECTOR_OBJECT_ID_SVIDEO,
+       CONNECTOR_OBJECT_ID_LVDS,
+       CONNECTOR_OBJECT_ID_9PIN_DIN,
+       CONNECTOR_OBJECT_ID_9PIN_DIN,
+       CONNECTOR_OBJECT_ID_DISPLAYPORT,
+       CONNECTOR_OBJECT_ID_HDMI_TYPE_A,
+       CONNECTOR_OBJECT_ID_HDMI_TYPE_B,
+       CONNECTOR_OBJECT_ID_SVIDEO
+};
+
 const int object_connector_convert[] = {
        DRM_MODE_CONNECTOR_Unknown,
        DRM_MODE_CONNECTOR_DVII,
@@ -229,7 +256,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
        ATOM_OBJECT_HEADER *obj_header;
        int i, j, path_size, device_support;
        int connector_type;
-       uint16_t igp_lane_info, conn_id;
+       uint16_t igp_lane_info, conn_id, connector_object_id;
        bool linkb;
        struct radeon_i2c_bus_rec ddc_bus;
 
@@ -277,7 +304,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
                                ATOM_DEVICE_CV_SUPPORT)
                                continue;
 
-                       if ((rdev->family == CHIP_RS780) &&
+                       /* IGP chips */
+                       if ((rdev->flags & RADEON_IS_IGP) &&
                            (con_obj_id ==
                             CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) {
                                uint16_t igp_offset = 0;
@@ -311,6 +339,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
                                                connector_type =
                                                    object_connector_convert
                                                    [ct];
+                                               connector_object_id = ct;
                                                igp_lane_info =
                                                    slot_config & 0xffff;
                                        } else
@@ -321,6 +350,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
                                igp_lane_info = 0;
                                connector_type =
                                    object_connector_convert[con_obj_id];
+                               connector_object_id = con_obj_id;
                        }
 
                        if (connector_type == DRM_MODE_CONNECTOR_Unknown)
@@ -425,7 +455,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
                                                  le16_to_cpu(path->
                                                              usDeviceTag),
                                                  connector_type, &ddc_bus,
-                                                 linkb, igp_lane_info);
+                                                 linkb, igp_lane_info,
+                                                 connector_object_id);
 
                }
        }
@@ -435,6 +466,45 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
        return true;
 }
 
+static uint16_t atombios_get_connector_object_id(struct drm_device *dev,
+                                                int connector_type,
+                                                uint16_t devices)
+{
+       struct radeon_device *rdev = dev->dev_private;
+
+       if (rdev->flags & RADEON_IS_IGP) {
+               return supported_devices_connector_object_id_convert
+                       [connector_type];
+       } else if (((connector_type == DRM_MODE_CONNECTOR_DVII) ||
+                   (connector_type == DRM_MODE_CONNECTOR_DVID)) &&
+                  (devices & ATOM_DEVICE_DFP2_SUPPORT))  {
+               struct radeon_mode_info *mode_info = &rdev->mode_info;
+               struct atom_context *ctx = mode_info->atom_context;
+               int index = GetIndexIntoMasterTable(DATA, XTMDS_Info);
+               uint16_t size, data_offset;
+               uint8_t frev, crev;
+               ATOM_XTMDS_INFO *xtmds;
+
+               atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset);
+               xtmds = (ATOM_XTMDS_INFO *)(ctx->bios + data_offset);
+
+               if (xtmds->ucSupportedLink & ATOM_XTMDS_SUPPORTED_DUALLINK) {
+                       if (connector_type == DRM_MODE_CONNECTOR_DVII)
+                               return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
+                       else
+                               return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
+               } else {
+                       if (connector_type == DRM_MODE_CONNECTOR_DVII)
+                               return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
+                       else
+                               return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
+               }
+       } else {
+               return supported_devices_connector_object_id_convert
+                       [connector_type];
+       }
+}
+
 struct bios_connector {
        bool valid;
        uint16_t line_mux;
@@ -593,14 +663,20 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
 
        /* add the connectors */
        for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
-               if (bios_connectors[i].valid)
+               if (bios_connectors[i].valid) {
+                       uint16_t connector_object_id =
+                               atombios_get_connector_object_id(dev,
+                                                     bios_connectors[i].connector_type,
+                                                     bios_connectors[i].devices);
                        radeon_add_atom_connector(dev,
                                                  bios_connectors[i].line_mux,
                                                  bios_connectors[i].devices,
                                                  bios_connectors[i].
                                                  connector_type,
                                                  &bios_connectors[i].ddc_bus,
-                                                 false, 0);
+                                                 false, 0,
+                                                 connector_object_id);
+               }
        }
 
        radeon_link_encoder_connector(dev);
@@ -1066,6 +1142,24 @@ void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable)
        atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 }
 
+uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev)
+{
+       GET_ENGINE_CLOCK_PS_ALLOCATION args;
+       int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock);
+
+       atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
+       return args.ulReturnEngineClock;
+}
+
+uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev)
+{
+       GET_MEMORY_CLOCK_PS_ALLOCATION args;
+       int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock);
+
+       atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
+       return args.ulReturnMemoryClock;
+}
+
 void radeon_atom_set_engine_clock(struct radeon_device *rdev,
                                  uint32_t eng_clock)
 {
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