drm/i915: export error state ref handling

[deliverable/linux.git] / drivers / gpu / drm / radeon / rv6xx_dpm.c

diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c
index e8f07b1223340b7b285e7824ef72a6d243468ad6..0e8b7d9b954b52878f70fcb6c9d810fefb675d18 100644 (file)
--- a/drivers/gpu/drm/radeon/rv6xx_dpm.c
+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c
@@ -1507,10 +1507,45 @@ static void rv6xx_enable_dynamic_pcie_gen2(struct radeon_device *rdev,
        }
 }
 
+static void rv6xx_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
+                                                    struct radeon_ps *new_ps,
+                                                    struct radeon_ps *old_ps)
+{
+       struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
+       struct rv6xx_ps *current_state = rv6xx_get_ps(old_ps);
+
+       if ((new_ps->vclk == old_ps->vclk) &&
+           (new_ps->dclk == old_ps->dclk))
+               return;
+
+       if (new_state->high.sclk >= current_state->high.sclk)
+               return;
+
+       radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
+}
+
+static void rv6xx_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
+                                                   struct radeon_ps *new_ps,
+                                                   struct radeon_ps *old_ps)
+{
+       struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
+       struct rv6xx_ps *current_state = rv6xx_get_ps(old_ps);
+
+       if ((new_ps->vclk == old_ps->vclk) &&
+           (new_ps->dclk == old_ps->dclk))
+               return;
+
+       if (new_state->high.sclk < current_state->high.sclk)
+               return;
+
+       radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
+}
+
 int rv6xx_dpm_enable(struct radeon_device *rdev)
 {
        struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);
        struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
+       int ret;
 
        if (r600_dynamicpm_enabled(rdev))
                return -EINVAL;
@@ -1560,7 +1595,9 @@ int rv6xx_dpm_enable(struct radeon_device *rdev)
 
        if (rdev->irq.installed &&
            r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
-               r600_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
+               ret = r600_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
+               if (ret)
+                       return ret;
                rdev->irq.dpm_thermal = true;
                radeon_irq_set(rdev);
        }
@@ -1630,6 +1667,9 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev)
        struct rv6xx_power_info *pi = rv6xx_get_pi(rdev);
        struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
        struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
+       int ret;
+
+       rv6xx_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
 
        rv6xx_clear_vc(rdev);
        r600_power_level_enable(rdev, R600_POWER_LEVEL_LOW, true);
@@ -1684,8 +1724,11 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev)
        r600_power_level_enable(rdev, R600_POWER_LEVEL_MEDIUM, false);
 
        if (pi->voltage_control) {
-               if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
-                       rv6xx_step_voltage_if_decreasing(rdev, new_ps, old_ps);
+               if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) {
+                       ret = rv6xx_step_voltage_if_decreasing(rdev, new_ps, old_ps);
+                       if (ret)
+                               return ret;
+               }
                rv6xx_enable_dynamic_voltage_control(rdev, true);
        }
 
@@ -1710,6 +1753,8 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev)
        rv6xx_program_vc(rdev);
        rv6xx_program_at(rdev);
 
+       rv6xx_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
+
        return 0;
 }
 
@@ -1821,8 +1866,8 @@ static void rv6xx_parse_pplib_clock_info(struct radeon_device *rdev,
 
        /* patch up boot state */
        if (rps->class & ATOM_PPLIB_CLASSIFICATION_BOOT) {
-               u16 vddc, vddci;
-               radeon_atombios_get_default_voltages(rdev, &vddc, &vddci);
+               u16 vddc, vddci, mvdd;
+               radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);
                pl->mclk = rdev->clock.default_mclk;
                pl->sclk = rdev->clock.default_sclk;
                pl->vddc = vddc;
@@ -1933,7 +1978,7 @@ int rv6xx_dpm_init(struct radeon_device *rdev)
                pi->fb_div_scale = 0;
 
        pi->voltage_control =
-               radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC);
+               radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
 
        pi->gfx_clock_gating = true;