drm/i915: export error state ref handling
[deliverable/linux.git] / drivers / gpu / drm / radeon / sumo_dpm.c
index 81713429db1f90bf7bccf51af0b481cd476ee830..dbad293bfed585ff15dcce5f561dbb9a4664ec82 100644 (file)
@@ -84,11 +84,6 @@ struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev)
        return pi;
 }
 
-u32 sumo_get_xclk(struct radeon_device *rdev)
-{
-       return rdev->clock.spll.reference_freq;
-}
-
 static void sumo_gfx_clockgating_enable(struct radeon_device *rdev, bool enable)
 {
        if (enable)
@@ -124,7 +119,7 @@ static void sumo_mg_clockgating_enable(struct radeon_device *rdev, bool enable)
 static void sumo_program_git(struct radeon_device *rdev)
 {
        u32 p, u;
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
 
        r600_calculate_u_and_p(SUMO_GICST_DFLT,
                               xclk, 16, &p, &u);
@@ -135,7 +130,7 @@ static void sumo_program_git(struct radeon_device *rdev)
 static void sumo_program_grsd(struct radeon_device *rdev)
 {
        u32 p, u;
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
        u32 grs = 256 * 25 / 100;
 
        r600_calculate_u_and_p(1, xclk, 14, &p, &u);
@@ -155,7 +150,7 @@ static void sumo_gfx_powergating_initialize(struct radeon_device *rdev)
        u32 p, u;
        u32 p_c, p_p, d_p;
        u32 r_t, i_t;
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
 
        if (rdev->family == CHIP_PALM) {
                p_c = 4;
@@ -319,7 +314,7 @@ static void sumo_calculate_bsp(struct radeon_device *rdev,
                               u32 high_clk)
 {
        struct sumo_power_info *pi = sumo_get_pi(rdev);
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
 
        pi->pasi = 65535 * 100 / high_clk;
        pi->asi = 65535 * 100 / high_clk;
@@ -466,7 +461,7 @@ void sumo_clear_vc(struct radeon_device *rdev)
 void sumo_program_sstp(struct radeon_device *rdev)
 {
        u32 p, u;
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
 
        r600_calculate_u_and_p(SUMO_SST_DFLT,
                               xclk, 16, &p, &u);
@@ -727,15 +722,6 @@ static void sumo_enable_boost(struct radeon_device *rdev,
                sumo_boost_state_enable(rdev, false);
 }
 
-static void sumo_update_current_power_levels(struct radeon_device *rdev,
-                                            struct radeon_ps *rps)
-{
-       struct sumo_ps *new_ps = sumo_get_ps(rps);
-       struct sumo_power_info *pi = sumo_get_pi(rdev);
-
-       pi->current_ps = *new_ps;
-}
-
 static void sumo_set_forced_level(struct radeon_device *rdev, u32 index)
 {
        WREG32_P(CG_SCLK_DPM_CTRL_3, FORCE_SCLK_STATE(index), ~FORCE_SCLK_STATE_MASK);
@@ -918,7 +904,7 @@ static void sumo_start_am(struct radeon_device *rdev)
 
 static void sumo_program_ttp(struct radeon_device *rdev)
 {
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
        u32 p, u;
        u32 cg_sclk_dpm_ctrl_5 = RREG32(CG_SCLK_DPM_CTRL_5);
 
@@ -964,7 +950,7 @@ static void sumo_program_dc_hto(struct radeon_device *rdev)
 {
        u32 cg_sclk_dpm_ctrl_4 = RREG32(CG_SCLK_DPM_CTRL_4);
        u32 p, u;
-       u32 xclk = sumo_get_xclk(rdev);
+       u32 xclk = radeon_get_xclk(rdev);
 
        r600_calculate_u_and_p(100000,
                               xclk, 14, &p, &u);
@@ -1089,11 +1075,6 @@ static void sumo_apply_state_adjust_rules(struct radeon_device *rdev,
        u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */
        u32 i;
 
-       /* point to the hw copy since this function will modify the ps */
-       pi->hw_ps = *ps;
-       rdev->pm.dpm.hw_ps.ps_priv = &pi->hw_ps;
-       ps = &pi->hw_ps;
-
        if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
                return sumo_patch_thermal_state(rdev, ps, current_ps);
 
@@ -1192,14 +1173,39 @@ static int sumo_set_thermal_temperature_range(struct radeon_device *rdev,
        return 0;
 }
 
+static void sumo_update_current_ps(struct radeon_device *rdev,
+                                  struct radeon_ps *rps)
+{
+       struct sumo_ps *new_ps = sumo_get_ps(rps);
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+
+       pi->current_rps = *rps;
+       pi->current_ps = *new_ps;
+       pi->current_rps.ps_priv = &pi->current_ps;
+}
+
+static void sumo_update_requested_ps(struct radeon_device *rdev,
+                                    struct radeon_ps *rps)
+{
+       struct sumo_ps *new_ps = sumo_get_ps(rps);
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+
+       pi->requested_rps = *rps;
+       pi->requested_ps = *new_ps;
+       pi->requested_rps.ps_priv = &pi->requested_ps;
+}
+
 int sumo_dpm_enable(struct radeon_device *rdev)
 {
        struct sumo_power_info *pi = sumo_get_pi(rdev);
+       int ret;
 
        if (sumo_dpm_enabled(rdev))
                return -EINVAL;
 
-       sumo_enable_clock_power_gating(rdev);
+       ret = sumo_enable_clock_power_gating(rdev);
+       if (ret)
+               return ret;
        sumo_program_bootup_state(rdev);
        sumo_init_bsp(rdev);
        sumo_reset_am(rdev);
@@ -1225,11 +1231,15 @@ int sumo_dpm_enable(struct radeon_device *rdev)
 
        if (rdev->irq.installed &&
            r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
-               sumo_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
+               ret = sumo_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
+               if (ret)
+                       return ret;
                rdev->irq.dpm_thermal = true;
                radeon_irq_set(rdev);
        }
 
+       sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
+
        return 0;
 }
 
@@ -1252,19 +1262,34 @@ void sumo_dpm_disable(struct radeon_device *rdev)
                rdev->irq.dpm_thermal = false;
                radeon_irq_set(rdev);
        }
+
+       sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
 }
 
-int sumo_dpm_set_power_state(struct radeon_device *rdev)
+int sumo_dpm_pre_set_power_state(struct radeon_device *rdev)
 {
        struct sumo_power_info *pi = sumo_get_pi(rdev);
-       struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;
-       struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;
+       struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
+       struct radeon_ps *new_ps = &requested_ps;
+
+       sumo_update_requested_ps(rdev, new_ps);
 
        if (pi->enable_dynamic_patch_ps)
-               sumo_apply_state_adjust_rules(rdev, new_ps, old_ps);
+               sumo_apply_state_adjust_rules(rdev,
+                                             &pi->requested_rps,
+                                             &pi->current_rps);
+
+       return 0;
+}
+
+int sumo_dpm_set_power_state(struct radeon_device *rdev)
+{
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+       struct radeon_ps *new_ps = &pi->requested_rps;
+       struct radeon_ps *old_ps = &pi->current_rps;
+
        if (pi->enable_dpm)
                sumo_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
-       sumo_update_current_power_levels(rdev, new_ps);
        if (pi->enable_boost) {
                sumo_enable_boost(rdev, new_ps, false);
                sumo_patch_boost_state(rdev, new_ps);
@@ -1293,6 +1318,14 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev)
        return 0;
 }
 
+void sumo_dpm_post_set_power_state(struct radeon_device *rdev)
+{
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+       struct radeon_ps *new_ps = &pi->requested_rps;
+
+       sumo_update_current_ps(rdev, new_ps);
+}
+
 void sumo_dpm_reset_asic(struct radeon_device *rdev)
 {
        sumo_program_bootup_state(rdev);
@@ -1751,7 +1784,8 @@ void sumo_dpm_fini(struct radeon_device *rdev)
 
 u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low)
 {
-       struct sumo_ps *requested_state = sumo_get_ps(rdev->pm.dpm.requested_ps);
+       struct sumo_power_info *pi = sumo_get_pi(rdev);
+       struct sumo_ps *requested_state = sumo_get_ps(&pi->requested_rps);
 
        if (low)
                return requested_state->levels[0].sclk;
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