[media] omap3isp: video: Split format info bpp field into width and bpp

[deliverable/linux.git] / drivers / media / video / omap3isp / ispvideo.c

diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c
index b37379d39cdd888c72731377bb49886361b285e8..6a1137d877899a60e2b9b5264ab8d1a33f55f22c 100644 (file)
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -53,67 +53,67 @@
 static struct isp_format_info formats[] = {
        { V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,
          V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,
-         V4L2_PIX_FMT_GREY, 8, },
+         V4L2_PIX_FMT_GREY, 8, 1, },
        { V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y10_1X10,
          V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y8_1X8,
-         V4L2_PIX_FMT_Y10, 10, },
+         V4L2_PIX_FMT_Y10, 10, 2, },
        { V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y10_1X10,
          V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y8_1X8,
-         V4L2_PIX_FMT_Y12, 12, },
+         V4L2_PIX_FMT_Y12, 12, 2, },
        { V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8,
          V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8,
-         V4L2_PIX_FMT_SBGGR8, 8, },
+         V4L2_PIX_FMT_SBGGR8, 8, 1, },
        { V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8,
          V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8,
-         V4L2_PIX_FMT_SGBRG8, 8, },
+         V4L2_PIX_FMT_SGBRG8, 8, 1, },
        { V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8,
          V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8,
-         V4L2_PIX_FMT_SGRBG8, 8, },
+         V4L2_PIX_FMT_SGRBG8, 8, 1, },
        { V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,
          V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,
-         V4L2_PIX_FMT_SRGGB8, 8, },
+         V4L2_PIX_FMT_SRGGB8, 8, 1, },
        { V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8, V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8,
          V4L2_MBUS_FMT_SBGGR10_1X10, 0,
-         V4L2_PIX_FMT_SBGGR10DPCM8, 8, },
+         V4L2_PIX_FMT_SBGGR10DPCM8, 8, 1, },
        { V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8, V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8,
          V4L2_MBUS_FMT_SGBRG10_1X10, 0,
-         V4L2_PIX_FMT_SGBRG10DPCM8, 8, },
+         V4L2_PIX_FMT_SGBRG10DPCM8, 8, 1, },
        { V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,
          V4L2_MBUS_FMT_SGRBG10_1X10, 0,
-         V4L2_PIX_FMT_SGRBG10DPCM8, 8, },
+         V4L2_PIX_FMT_SGRBG10DPCM8, 8, 1, },
        { V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8, V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8,
          V4L2_MBUS_FMT_SRGGB10_1X10, 0,
-         V4L2_PIX_FMT_SRGGB10DPCM8, 8, },
+         V4L2_PIX_FMT_SRGGB10DPCM8, 8, 1, },
        { V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR10_1X10,
          V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR8_1X8,
-         V4L2_PIX_FMT_SBGGR10, 10, },
+         V4L2_PIX_FMT_SBGGR10, 10, 2, },
        { V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG10_1X10,
          V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG8_1X8,
-         V4L2_PIX_FMT_SGBRG10, 10, },
+         V4L2_PIX_FMT_SGBRG10, 10, 2, },
        { V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG10_1X10,
          V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG8_1X8,
-         V4L2_PIX_FMT_SGRBG10, 10, },
+         V4L2_PIX_FMT_SGRBG10, 10, 2, },
        { V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB10_1X10,
          V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB8_1X8,
-         V4L2_PIX_FMT_SRGGB10, 10, },
+         V4L2_PIX_FMT_SRGGB10, 10, 2, },
        { V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR10_1X10,
          V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR8_1X8,
-         V4L2_PIX_FMT_SBGGR12, 12, },
+         V4L2_PIX_FMT_SBGGR12, 12, 2, },
        { V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG10_1X10,
          V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG8_1X8,
-         V4L2_PIX_FMT_SGBRG12, 12, },
+         V4L2_PIX_FMT_SGBRG12, 12, 2, },
        { V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG10_1X10,
          V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG8_1X8,
-         V4L2_PIX_FMT_SGRBG12, 12, },
+         V4L2_PIX_FMT_SGRBG12, 12, 2, },
        { V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB10_1X10,
          V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB8_1X8,
-         V4L2_PIX_FMT_SRGGB12, 12, },
+         V4L2_PIX_FMT_SRGGB12, 12, 2, },
        { V4L2_MBUS_FMT_UYVY8_1X16, V4L2_MBUS_FMT_UYVY8_1X16,
          V4L2_MBUS_FMT_UYVY8_1X16, 0,
-         V4L2_PIX_FMT_UYVY, 16, },
+         V4L2_PIX_FMT_UYVY, 16, 2, },
        { V4L2_MBUS_FMT_YUYV8_1X16, V4L2_MBUS_FMT_YUYV8_1X16,
          V4L2_MBUS_FMT_YUYV8_1X16, 0,
-         V4L2_PIX_FMT_YUYV, 16, },
+         V4L2_PIX_FMT_YUYV, 16, 2, },
 };
 
 const struct isp_format_info *
@@ -161,7 +161,7 @@ static unsigned int isp_video_mbus_to_pix(const struct isp_video *video,
        if (WARN_ON(i == ARRAY_SIZE(formats)))
                return 0;
 
-       min_bpl = pix->width * ALIGN(formats[i].bpp, 8) / 8;
+       min_bpl = pix->width * formats[i].bpp;
 
        /* Clamp the requested bytes per line value. If the maximum bytes per
         * line value is zero, the module doesn't support user configurable line
@@ -921,7 +921,8 @@ static int isp_video_check_external_subdevs(struct isp_video *video,
                return ret;
        }
 
-       pipe->external_bpp = omap3isp_video_format_info(fmt.format.code)->bpp;
+       pipe->external_width =
+               omap3isp_video_format_info(fmt.format.code)->width;
 
        memset(&ctrls, 0, sizeof(ctrls));
        memset(&ctrl, 0, sizeof(ctrl));