#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
+#include <linux/version.h>
#include <asm/io.h>
/* fixme: this is ugly */
*/
static struct mtd_info *au1550_mtd = NULL;
static void __iomem *p_nand;
-static int nand_width = 1; /* default x8*/
+static int nand_width = 1; /* default x8 */
/*
* Define partitions for flash device
*/
-const static struct mtd_partition partition_info[] = {
+static const struct mtd_partition partition_info[] = {
{
- .name = "NAND FS 0",
- .offset = 0,
- .size = 8*1024*1024
- },
+ .name = "NAND FS 0",
+ .offset = 0,
+ .size = 8 * 1024 * 1024},
{
- .name = "NAND FS 1",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
+ .name = "NAND FS 1",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL}
};
-#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
-
/**
* au_read_byte - read one byte from the chip
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
writeb(buf[i], this->IO_ADDR_W);
au_sync();
}
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
buf[i] = readb(this->IO_ADDR_R);
au_sync();
}
int i;
struct nand_chip *this = mtd->priv;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
if (buf[i] != readb(this->IO_ADDR_R))
return -EFAULT;
au_sync();
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
writew(p[i], this->IO_ADDR_W);
au_sync();
}
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
p[i] = readw(this->IO_ADDR_R);
au_sync();
}
u16 *p = (u16 *) buf;
len >>= 1;
- for (i=0; i<len; i++) {
+ for (i = 0; i < len; i++) {
if (p[i] != readw(this->IO_ADDR_R))
return -EFAULT;
au_sync();
{
register struct nand_chip *this = mtd->priv;
- switch(cmd){
+ switch (cmd) {
+
+ case NAND_CTL_SETCLE:
+ this->IO_ADDR_W = p_nand + MEM_STNAND_CMD;
+ break;
+
+ case NAND_CTL_CLRCLE:
+ this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
+ break;
- case NAND_CTL_SETCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; break;
- case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break;
+ case NAND_CTL_SETALE:
+ this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR;
+ break;
- case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break;
case NAND_CTL_CLRALE:
this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
- /* FIXME: Nobody knows why this is neccecary,
+ /* FIXME: Nobody knows why this is necessary,
* but it works only that way */
udelay(1);
break;
case NAND_CTL_SETNCE:
/* assert (force assert) chip enable */
- au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break;
+ au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL);
break;
case NAND_CTL_CLRNCE:
- /* deassert chip enable */
- au_writel(0, MEM_STNDCTL); break;
+ /* deassert chip enable */
+ au_writel(0, MEM_STNDCTL);
break;
}
/*
* Main initialization routine
*/
-int __init au1xxx_nand_init (void)
+static int __init au1xxx_nand_init(void)
{
struct nand_chip *this;
- u16 boot_swapboot = 0; /* default value */
+ u16 boot_swapboot = 0; /* default value */
int retval;
u32 mem_staddr;
u32 nand_phys;
/* Allocate memory for MTD device structure and private data */
- au1550_mtd = kmalloc (sizeof(struct mtd_info) +
- sizeof (struct nand_chip), GFP_KERNEL);
+ au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!au1550_mtd) {
- printk ("Unable to allocate NAND MTD dev structure.\n");
+ printk("Unable to allocate NAND MTD dev structure.\n");
return -ENOMEM;
}
/* Get pointer to private data */
- this = (struct nand_chip *) (&au1550_mtd[1]);
+ this = (struct nand_chip *)(&au1550_mtd[1]);
/* Initialize structures */
- memset((char *) au1550_mtd, 0, sizeof(struct mtd_info));
- memset((char *) this, 0, sizeof(struct nand_chip));
+ memset(au1550_mtd, 0, sizeof(struct mtd_info));
+ memset(this, 0, sizeof(struct nand_chip));
/* Link the private data with the MTD structure */
au1550_mtd->priv = this;
+ au1550_mtd->owner = THIS_MODULE;
- /* disable interrupts */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
-
- /* disable NAND boot */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
+ /* MEM_STNDCTL: disable ints, disable nand boot */
+ au_writel(0, MEM_STNDCTL);
#ifdef CONFIG_MIPS_PB1550
/* set gpio206 high */
- au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR);
+ au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR);
- boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
- ((bcsr->status >> 6) & 0x1);
+ boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1);
switch (boot_swapboot) {
- case 0:
- case 2:
- case 8:
- case 0xC:
- case 0xD:
- /* x16 NAND Flash */
- nand_width = 0;
- break;
- case 1:
- case 9:
- case 3:
- case 0xE:
- case 0xF:
- /* x8 NAND Flash */
- nand_width = 1;
- break;
- default:
- printk("Pb1550 NAND: bad boot:swap\n");
- retval = -EINVAL;
- goto outmem;
+ case 0:
+ case 2:
+ case 8:
+ case 0xC:
+ case 0xD:
+ /* x16 NAND Flash */
+ nand_width = 0;
+ break;
+ case 1:
+ case 9:
+ case 3:
+ case 0xE:
+ case 0xF:
+ /* x8 NAND Flash */
+ nand_width = 1;
+ break;
+ default:
+ printk("Pb1550 NAND: bad boot:swap\n");
+ retval = -EINVAL;
+ goto outmem;
}
#endif
/* make controller and MTD agree */
if (NAND_CS == 0)
- nand_width = au_readl(MEM_STCFG0) & (1<<22);
+ nand_width = au_readl(MEM_STCFG0) & (1 << 22);
if (NAND_CS == 1)
- nand_width = au_readl(MEM_STCFG1) & (1<<22);
+ nand_width = au_readl(MEM_STCFG1) & (1 << 22);
if (NAND_CS == 2)
- nand_width = au_readl(MEM_STCFG2) & (1<<22);
+ nand_width = au_readl(MEM_STCFG2) & (1 << 22);
if (NAND_CS == 3)
- nand_width = au_readl(MEM_STCFG3) & (1<<22);
-
+ nand_width = au_readl(MEM_STCFG3) & (1 << 22);
/* Set address of hardware control function */
this->hwcontrol = au1550_hwcontrol;
this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
/* Scan to find existence of the device */
- if (nand_scan (au1550_mtd, 1)) {
+ if (nand_scan(au1550_mtd, 1)) {
retval = -ENXIO;
goto outio;
}
/* Register the partitions */
- add_mtd_partitions(au1550_mtd, partition_info, NB_OF(partition_info));
+ add_mtd_partitions(au1550_mtd, partition_info, ARRAY_SIZE(partition_info));
return 0;
outio:
- iounmap ((void *)p_nand);
+ iounmap((void *)p_nand);
outmem:
- kfree (au1550_mtd);
+ kfree(au1550_mtd);
return retval;
}
/*
* Clean up routine
*/
-#ifdef MODULE
-static void __exit au1550_cleanup (void)
+static void __exit au1550_cleanup(void)
{
- struct nand_chip *this = (struct nand_chip *) &au1550_mtd[1];
+ struct nand_chip *this = (struct nand_chip *)&au1550_mtd[1];
/* Release resources, unregister device */
- nand_release (au1550_mtd);
+ nand_release(au1550_mtd);
/* Free the MTD device structure */
- kfree (au1550_mtd);
+ kfree(au1550_mtd);
/* Unmap */
- iounmap ((void *)p_nand);
+ iounmap((void *)p_nand);
}
+
module_exit(au1550_cleanup);
-#endif
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Embedded Edge, LLC");
projects / deliverable / linux.git / blobdiff