mtd: gpmi: initialize the timing registers only one time

[deliverable/linux.git] / drivers / mtd / nand / gpmi-nand / gpmi-nand.h

diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index ce5daa1609203923caee19f576be884c27919a97..7ac25c1e58f96aedc383e96d8c0897d6903c872f 100644 (file)
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -22,14 +22,15 @@
 #include <linux/dma-mapping.h>
 #include <linux/fsl/mxs-dma.h>
 
+#define GPMI_CLK_MAX 5 /* MX6Q needs five clocks */
 struct resources {
-       void          *gpmi_regs;
-       void          *bch_regs;
+       void __iomem  *gpmi_regs;
+       void __iomem  *bch_regs;
        unsigned int  bch_low_interrupt;
        unsigned int  bch_high_interrupt;
        unsigned int  dma_low_channel;
        unsigned int  dma_high_channel;
-       struct clk    *clock;
+       struct clk    *clock[GPMI_CLK_MAX];
 };
 
 /**
@@ -121,6 +122,11 @@ struct nand_timing {
 };
 
 struct gpmi_nand_data {
+       /* flags */
+#define GPMI_ASYNC_EDO_ENABLED (1 << 0)
+#define GPMI_TIMING_INIT_OK    (1 << 1)
+       int                     flags;
+
        /* System Interface */
        struct device           *dev;
        struct platform_device  *pdev;
@@ -131,6 +137,7 @@ struct gpmi_nand_data {
 
        /* Flash Hardware */
        struct nand_timing      timing;
+       int                     timing_mode;
 
        /* BCH */
        struct bch_geometry     bch_geometry;
@@ -188,16 +195,28 @@ struct gpmi_nand_data {
  * @data_setup_in_cycles:      The data setup time, in cycles.
  * @data_hold_in_cycles:       The data hold time, in cycles.
  * @address_setup_in_cycles:   The address setup time, in cycles.
+ * @device_busy_timeout:       The timeout waiting for NAND Ready/Busy,
+ *                             this value is the number of cycles multiplied
+ *                             by 4096.
  * @use_half_periods:          Indicates the clock is running slowly, so the
  *                             NFC DLL should use half-periods.
  * @sample_delay_factor:       The sample delay factor.
+ * @wrn_dly_sel:               The delay on the GPMI write strobe.
  */
 struct gpmi_nfc_hardware_timing {
+       /* for HW_GPMI_TIMING0 */
        uint8_t  data_setup_in_cycles;
        uint8_t  data_hold_in_cycles;
        uint8_t  address_setup_in_cycles;
+
+       /* for HW_GPMI_TIMING1 */
+       uint16_t device_busy_timeout;
+#define GPMI_DEFAULT_BUSY_TIMEOUT      0x500 /* default busy timeout value.*/
+
+       /* for HW_GPMI_CTRL1 */
        bool     use_half_periods;
        uint8_t  sample_delay_factor;
+       uint8_t  wrn_dly_sel;
 };
 
 /**
@@ -246,6 +265,7 @@ extern int start_dma_with_bch_irq(struct gpmi_nand_data *,
 
 /* GPMI-NAND helper function library */
 extern int gpmi_init(struct gpmi_nand_data *);
+extern int gpmi_extra_init(struct gpmi_nand_data *);
 extern void gpmi_clear_bch(struct gpmi_nand_data *);
 extern void gpmi_dump_info(struct gpmi_nand_data *);
 extern int bch_set_geometry(struct gpmi_nand_data *);