{
uint32_t tmp;
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
/* Does CE state need to be changed? */
tmp = readl(SLC_CFG(host->io_base));
static int lpc32xx_nand_device_ready(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
int rdy = 0;
if ((readl(SLC_STAT(host->io_base)) & SLCSTAT_NAND_READY) != 0)
static uint8_t lpc32xx_nand_read_byte(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
return (uint8_t)readl(SLC_DATA(host->io_base));
}
static void lpc32xx_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
/* Direct device read with no ECC */
while (len-- > 0)
static void lpc32xx_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
/* Direct device write with no ECC */
while (len-- > 0)
void *mem, int len, enum dma_transfer_direction dir)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
struct dma_async_tx_descriptor *desc;
int flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
int res;
int read)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
int i, status = 0;
unsigned long timeout;
int res;
struct nand_chip *chip, uint8_t *buf,
int oob_required, int page)
{
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
int stat, i, status;
uint8_t *oobecc, tmpecc[LPC32XX_ECC_SAVE_SIZE];
const uint8_t *buf,
int oob_required, int page)
{
- struct lpc32xx_nand_host *host = chip->priv;
+ struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
uint8_t *pb = chip->oob_poi + chip->ecc.layout->eccpos[0];
int error;
chip = &host->nand_chip;
mtd = nand_to_mtd(chip);
- chip->priv = host;
+ nand_set_controller_data(chip, host);
nand_set_flash_node(chip, pdev->dev.of_node);
mtd->owner = THIS_MODULE;
mtd->dev.parent = &pdev->dev;