drivers: net: davinci_mdio: split reset function on init_clk and enable

[deliverable/linux.git] / drivers / net / ethernet / ti / davinci_mdio.c

diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 4e7c9b9b042a3724ee9b8dda0b19e2f441caf836..b206fd38844888c967e0472fc8b65cb06fa3af00 100644 (file)
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -90,19 +90,18 @@ static const struct mdio_platform_data default_pdata = {
 struct davinci_mdio_data {
        struct mdio_platform_data pdata;
        struct davinci_mdio_regs __iomem *regs;
-       spinlock_t      lock;
        struct clk      *clk;
        struct device   *dev;
        struct mii_bus  *bus;
-       bool            suspended;
        unsigned long   access_time; /* jiffies */
        /* Indicates that driver shouldn't modify phy_mask in case
         * if MDIO bus is registered from DT.
         */
        bool            skip_scan;
+       u32             clk_div;
 };
 
-static void __davinci_mdio_reset(struct davinci_mdio_data *data)
+static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
 {
        u32 mdio_in, div, mdio_out_khz, access_time;
 
@@ -111,9 +110,7 @@ static void __davinci_mdio_reset(struct davinci_mdio_data *data)
        if (div > CONTROL_MAX_DIV)
                div = CONTROL_MAX_DIV;
 
-       /* set enable and clock divider */
-       __raw_writel(div | CONTROL_ENABLE, &data->regs->control);
-
+       data->clk_div = div;
        /*
         * One mdio transaction consists of:
         *      32 bits of preamble
@@ -134,12 +131,18 @@ static void __davinci_mdio_reset(struct davinci_mdio_data *data)
                data->access_time = 1;
 }
 
+static void davinci_mdio_enable(struct davinci_mdio_data *data)
+{
+       /* set enable and clock divider */
+       __raw_writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
+}
+
 static int davinci_mdio_reset(struct mii_bus *bus)
 {
        struct davinci_mdio_data *data = bus->priv;
        u32 phy_mask, ver;
 
-       __davinci_mdio_reset(data);
+       davinci_mdio_enable(data);
 
        /* wait for scan logic to settle */
        msleep(PHY_MAX_ADDR * data->access_time);
@@ -190,7 +193,7 @@ static inline int wait_for_user_access(struct davinci_mdio_data *data)
                 * operation
                 */
                dev_warn(data->dev, "resetting idled controller\n");
-               __davinci_mdio_reset(data);
+               davinci_mdio_enable(data);
                return -EAGAIN;
        }
 
@@ -225,13 +228,6 @@ static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)
        if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
                return -EINVAL;
 
-       spin_lock(&data->lock);
-
-       if (data->suspended) {
-               spin_unlock(&data->lock);
-               return -ENODEV;
-       }
-
        reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) |
               (phy_id << 16));
 
@@ -255,8 +251,6 @@ static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)
                break;
        }
 
-       spin_unlock(&data->lock);
-
        return ret;
 }
 
@@ -270,13 +264,6 @@ static int davinci_mdio_write(struct mii_bus *bus, int phy_id,
        if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
                return -EINVAL;
 
-       spin_lock(&data->lock);
-
-       if (data->suspended) {
-               spin_unlock(&data->lock);
-               return -ENODEV;
-       }
-
        reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) |
                   (phy_id << 16) | (phy_data & USERACCESS_DATA));
 
@@ -295,8 +282,6 @@ static int davinci_mdio_write(struct mii_bus *bus, int phy_id,
                break;
        }
 
-       spin_unlock(&data->lock);
-
        return 0;
 }
 
@@ -356,26 +341,24 @@ static int davinci_mdio_probe(struct platform_device *pdev)
        data->bus->parent       = dev;
        data->bus->priv         = data;
 
-       pm_runtime_enable(&pdev->dev);
-       pm_runtime_get_sync(&pdev->dev);
        data->clk = devm_clk_get(dev, "fck");
        if (IS_ERR(data->clk)) {
                dev_err(dev, "failed to get device clock\n");
-               ret = PTR_ERR(data->clk);
-               data->clk = NULL;
-               goto bail_out;
+               return PTR_ERR(data->clk);
        }
 
        dev_set_drvdata(dev, data);
        data->dev = dev;
-       spin_lock_init(&data->lock);
 
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        data->regs = devm_ioremap_resource(dev, res);
-       if (IS_ERR(data->regs)) {
-               ret = PTR_ERR(data->regs);
-               goto bail_out;
-       }
+       if (IS_ERR(data->regs))
+               return PTR_ERR(data->regs);
+
+       davinci_mdio_init_clk(data);
+
+       pm_runtime_enable(&pdev->dev);
+       pm_runtime_get_sync(&pdev->dev);
 
        /* register the mii bus
         * Create PHYs from DT only in case if PHY child nodes are explicitly
@@ -429,18 +412,12 @@ static int davinci_mdio_suspend(struct device *dev)
        struct davinci_mdio_data *data = dev_get_drvdata(dev);
        u32 ctrl;
 
-       spin_lock(&data->lock);
-
        /* shutdown the scan state machine */
        ctrl = __raw_readl(&data->regs->control);
        ctrl &= ~CONTROL_ENABLE;
        __raw_writel(ctrl, &data->regs->control);
        wait_for_idle(data);
 
-       data->suspended = true;
-       spin_unlock(&data->lock);
-       pm_runtime_put_sync(data->dev);
-
        /* Select sleep pin state */
        pinctrl_pm_select_sleep_state(dev);
 
@@ -454,14 +431,8 @@ static int davinci_mdio_resume(struct device *dev)
        /* Select default pin state */
        pinctrl_pm_select_default_state(dev);
 
-       pm_runtime_get_sync(data->dev);
-
-       spin_lock(&data->lock);
        /* restart the scan state machine */
-       __davinci_mdio_reset(data);
-
-       data->suspended = false;
-       spin_unlock(&data->lock);
+       davinci_mdio_enable(data);
 
        return 0;
 }