qlcnic: FW dump support

[deliverable/linux.git] / drivers / net / qlcnic / qlcnic_hdr.h

diff --git a/drivers/net/qlcnic/qlcnic_hdr.h b/drivers/net/qlcnic/qlcnic_hdr.h
index 726ef555b6bc6e3bdc3b3e29c3beff6cbd122dee..d14506f764e0d4ff43729cf8f22cbd730236b130 100644 (file)
--- a/drivers/net/qlcnic/qlcnic_hdr.h
+++ b/drivers/net/qlcnic/qlcnic_hdr.h
@@ -492,10 +492,10 @@ enum {
 
 #define TEST_AGT_CTRL  (0x00)
 
-#define TA_CTL_START   1
-#define TA_CTL_ENABLE  2
-#define TA_CTL_WRITE   4
-#define TA_CTL_BUSY    8
+#define TA_CTL_START   BIT_0
+#define TA_CTL_ENABLE  BIT_1
+#define TA_CTL_WRITE   BIT_2
+#define TA_CTL_BUSY    BIT_3
 
 /*
  *   Register offsets for MN
@@ -765,6 +765,38 @@ struct qlcnic_legacy_intr_set {
 #define QLCNIC_MAX_PCI_FUNC    8
 #define QLCNIC_MAX_VLAN_FILTERS        64
 
+/* FW dump defines */
+#define MIU_TEST_CTR           0x41000090
+#define MIU_TEST_ADDR_LO       0x41000094
+#define MIU_TEST_ADDR_HI       0x41000098
+#define FLASH_ROM_WINDOW       0x42110030
+#define FLASH_ROM_DATA         0x42150000
+
+static const u32 MIU_TEST_READ_DATA[] = {
+       0x410000A8, 0x410000AC, 0x410000B8, 0x410000BC, };
+
+#define QLCNIC_FW_DUMP_REG1    0x00130060
+#define QLCNIC_FW_DUMP_REG2    0x001e0000
+#define QLCNIC_FLASH_SEM2_LK   0x0013C010
+#define QLCNIC_FLASH_SEM2_ULK  0x0013C014
+#define QLCNIC_FLASH_LOCK_ID   0x001B2100
+
+#define QLCNIC_RD_DUMP_REG(addr, bar0, data) do {                      \
+       writel((addr & 0xFFFF0000), (void *) (bar0 +                    \
+               QLCNIC_FW_DUMP_REG1));                                  \
+       readl((void *) (bar0 + QLCNIC_FW_DUMP_REG1));                   \
+       *data = readl((void *) (bar0 + QLCNIC_FW_DUMP_REG2 +            \
+               LSW(addr)));                                            \
+} while (0)
+
+#define QLCNIC_WR_DUMP_REG(addr, bar0, data) do {                      \
+       writel((addr & 0xFFFF0000), (void *) (bar0 +                    \
+               QLCNIC_FW_DUMP_REG1));                                  \
+       readl((void *) (bar0 + QLCNIC_FW_DUMP_REG1));                   \
+       writel(data, (void *) (bar0 + QLCNIC_FW_DUMP_REG2 + LSW(addr)));\
+       readl((void *) (bar0 + QLCNIC_FW_DUMP_REG2 + LSW(addr)));       \
+} while (0)
+
 /* PCI function operational mode */
 enum {
        QLCNIC_MGMT_FUNC        = 0,