[PATCH] bcm43xx: Fix array overrun in bcm43xx_geo_init

[deliverable/linux.git] / drivers / net / tg3.h

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index baa34c4721dbe63000e969a5f797781bb70e3a08..0e29b885d449d7cafcdcbae7f8311b9df39796a6 100644 (file)
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -138,6 +138,7 @@
 #define   ASIC_REV_5752                         0x06
 #define   ASIC_REV_5780                         0x08
 #define   ASIC_REV_5714                         0x09
+#define   ASIC_REV_5755                         0x0a
 #define   ASIC_REV_5787                         0x0b
 #define  GET_CHIP_REV(CHIP_REV_ID)     ((CHIP_REV_ID) >> 8)
 #define   CHIPREV_5700_AX               0x70
@@ -456,6 +457,7 @@
 #define  RX_MODE_PROMISC                0x00000100
 #define  RX_MODE_NO_CRC_CHECK           0x00000200
 #define  RX_MODE_KEEP_VLAN_TAG          0x00000400
+#define  RX_MODE_IPV6_CSUM_ENABLE       0x01000000
 #define MAC_RX_STATUS                  0x0000046c
 #define  RX_STATUS_REMOTE_TX_XOFFED     0x00000001
 #define  RX_STATUS_XOFF_RCVD            0x00000002
@@ -1340,6 +1342,7 @@
 #define  GRC_LCLCTRL_CLEARINT          0x00000002
 #define  GRC_LCLCTRL_SETINT            0x00000004
 #define  GRC_LCLCTRL_INT_ON_ATTN       0x00000008
+#define  GRC_LCLCTRL_GPIO_UART_SEL     0x00000010      /* 5755 only */
 #define  GRC_LCLCTRL_USE_SIG_DETECT    0x00000010      /* 5714/5780 only */
 #define  GRC_LCLCTRL_USE_EXT_SIG_DETECT        0x00000020      /* 5714/5780 only */
 #define  GRC_LCLCTRL_GPIO_INPUT3       0x00000020
@@ -1441,6 +1444,9 @@
 #define  FLASH_5755VENDOR_ATMEL_FLASH_1         0x03400001
 #define  FLASH_5755VENDOR_ATMEL_FLASH_2         0x03400002
 #define  FLASH_5755VENDOR_ATMEL_FLASH_3         0x03400000
+#define  FLASH_5755VENDOR_ATMEL_FLASH_4         0x00000003
+#define  FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ    0x03c00003
+#define  FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ   0x03c00002
 #define  FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ    0x03000003
 #define  FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ   0x03000002
 #define  FLASH_5787VENDOR_MICRO_EEPROM_64KHZ    0x03000000
@@ -2165,8 +2171,7 @@ struct tg3 {
 #define TG3_FLAG_PCIX_MODE             0x00020000
 #define TG3_FLAG_PCI_HIGH_SPEED                0x00040000
 #define TG3_FLAG_PCI_32BIT             0x00080000
-#define TG3_FLAG_NO_TX_PSEUDO_CSUM     0x00100000
-#define TG3_FLAG_NO_RX_PSEUDO_CSUM     0x00200000
+#define TG3_FLAG_SRAM_USE_CONFIG       0x00100000
 #define TG3_FLAG_SERDES_WOL_CAP                0x00400000
 #define TG3_FLAG_JUMBO_RING_ENABLE     0x00800000
 #define TG3_FLAG_10_100_ONLY           0x01000000
@@ -2210,6 +2215,7 @@ struct tg3 {
 #define TG3_FLG2_HW_TSO_2              0x08000000
 #define TG3_FLG2_HW_TSO                        (TG3_FLG2_HW_TSO_1 | TG3_FLG2_HW_TSO_2)
 #define TG3_FLG2_1SHOT_MSI             0x10000000
+#define TG3_FLG2_PHY_JITTER_BUG                0x20000000
 
        u32                             split_mode_max_reqs;
 #define SPLIT_MODE_5704_MAX_REQ                3
@@ -2259,6 +2265,7 @@ struct tg3 {
 #define PHY_ID_BCM5752                 0x60008100
 #define PHY_ID_BCM5714                 0x60008340
 #define PHY_ID_BCM5780                 0x60008350
+#define PHY_ID_BCM5755                 0xbc050cc0
 #define PHY_ID_BCM5787                 0xbc050ce0
 #define PHY_ID_BCM8002                 0x60010140
 #define PHY_ID_INVALID                 0xffffffff
@@ -2286,7 +2293,7 @@ struct tg3 {
         (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
         (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
         (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
-        (X) == PHY_ID_BCM8002)
+        (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM8002)
 
        struct tg3_hw_stats             *hw_stats;
        dma_addr_t                      stats_mapping;